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VNQ830PEP-E
User Manual
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ST VNQ830PEP-E User Manual

Features
Type R
VNQ830PEP-E 60mΩ
1. Per each channel.
DS(on)
(1)
I
OUT
14A
(1)
V
CC
36V
VNQ830PEP-E
Quad channel high side driver
■ CMOS compatible inputs
■ On-state open load detection
■ Off-state open load detection
■ Shorted load protection
■ Undervoltage and overvoltage shutdown
■ Loss of ground protection
■ Very low standby current
■ Reverse battery protection
In compliance with the 2002/95/EC european
■
(a)
directive
a. See Application schematic on page 16

Table 1. Device summary

PowerSSO-24
Description
The VNQ830PEP-E is a monolithic device made using| STMicroelectronics VIPower™ M0-3 Technology. The VNQ830PEP-E is intended for driving any type of multiple load with one side connected to ground.
The Active V device against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects the open load condition in both the on and off-state.
In the off-state the device detects if the output is shorted to V in the case where the ground pin becomes disconnected.
pin voltage clamp protects the
CC
. The device automatically turns off
CC
Package
Tube Tape and reel
PowerSSO-24 VNQ830PEP-E VNQ830PEPTR-E
July 2009 Doc ID 10871 Rev 7 1/27
Order codes
www.st.com
1
Contents VNQ830PEP-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2 Solution 2: a diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
) in the ground line . . . . . . . . . . . . . . . . . . . . 17
GND
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 Maximum demagnetization energy (V
= 13.5V) . . . . . . . . . . . . . . . . . . 19
CC
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2/27 Doc ID 10871 Rev 7
VNQ830PEP-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. V Table 8. Switching (V
Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 14. Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 15. Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 17. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
= 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
Doc ID 10871 Rev 7 3/27
List of figures VNQ830PEP-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 14. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 28. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 20
Figure 29. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 21
Figure 30. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 21
Figure 31. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 33. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4/27 Doc ID 10871 Rev 7
VNQ830PEP-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V
CC
V
GND
INPUT1
STATUS1
INPUT2
STATUS2
INPUT3
STATUS3
INPUT4
STATUS4
CC
CLAMP
OVERTEMP. 1
LOGIC
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPENLOAD ON 1
OPENLOAD OFF 1

Figure 2. Configuration diagram (top view)

V
CC
GND INPUT1 STATUS1 INPUT2 STATUS2 INPUT3 STATUS3 INPUT4 STATUS4 N.C. V
CC
INPUT2
CONTROL & PROTECT ION EQUIVALENT TO
STATUS2
CHANNEL1
INPUT3
CONTROL & PROTECT ION EQUIVALENT TO
STATUS3
CHANNEL1
INPUT4
CONTROL & PROTECTION EQUIVALENT TO
STATUS4
CHANNEL1
OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4
OUTPUT1
V
CC
OUTPUT2
V
CC
OUTPUT3
V
CC
OUTPUT4
TAB = V

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input
CC
Floating X X X X
To ground X
Through 10KΩ
resistor
Doc ID 10871 Rev 7 5/27
Electrical specifications VNQ830PEP-E

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
- V
- I
I
- I
I
V
T
CC
CC
GND
OUT
OUT
I
IN
STAT
ESD
P
tot
T
T
c
stg
DC supply voltage 41 V
Reverse DC supply voltage - 0.3 V
DC reverse ground pin current - 200 mA
DC output current Internally limited A
Reverse DC output current - 12 A
DC input current +/- 10 mA
DC Status current +/- 10 mA
Electrostatic discharge (human body model: R=1.5KΩ; C = 100pF)
– Input – Status – Output –V
CC
Power dissipation (per island) at T
Junction operating temperature Internally limited °C
j
= 25°C 83 W
lead
4000 4000 5000 5000
Case operating temperature - 40 to 150 °C
Storage temperature - 55 to 150 °C
V V V V

2.2 Thermal data

Table 4. Thermal data (per island)

Symbol Parameter Value Unit
R
thj-case
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.
2. When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.
6/27 Doc ID 10871 Rev 7
Thermal resistance junction-case 1.5 °C/W
Thermal resistance junction-ambient (one chip ON)
56
(1)
41.7
(2)
°C/W
VNQ830PEP-E Electrical specifications

2.3 Electrical characteristics

Note: V
Values specified in this section are for 8V < V
CC
otherwise stated.

Figure 3. Current and voltage conventions

I
INn
V
INn
I
STATn
INPUTn
STATUSn
V
STATn
GND
= V
Fn

Table 5. Power output

CCn
- V
during reverse battery condition.
OUTn
< 36V; -40°C < Tj < 150°C, unless
I
S
V
(*)
F1
V
CC
I
OUTn
V
CC
OUTPUTn
V
OUTn
I
GND
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
R
I
L(off1)
I
L(off2)
Operating supply
CC
voltage
Undervoltage shutdown 3 4 5.5 V
USD
Overvoltage shutdown 36 V
OV
I
= 2A; Tj = 25°C
On-state resistance
ON
Supply current
I
S
Off-state output current V
Off-state output current V
OUT
= 2A; V
I
OUT
Off-state; V
= V
V
IN
OUT
Off-state; V V
= V
IN
OUT
= 25°C
T
j
On-state; V
= 0A
I
OUT
= V
IN
OUT
= 0V; V
IN
> 8V
CC
= 13V;
CC
= 0V
= 13V;
CC
= 0V;
= 13V; V
CC
IN
= 5V;
= 0V 0 50 µA
= 3.5V -75 0 µA
OUT
5.5 13 36 V
65
120mΩmΩ
20
60
µA
20
40
µA
8.5
13.5
mA
Doc ID 10871 Rev 7 7/27
Electrical specifications VNQ830PEP-E
Table 5. Power output (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
= V
I
L(off3)
I
L(off4)

Table 6. Protections

Off-state output current
Off-state output current
IN
= 125°C
T
j
V
= V
IN
= 25°C
T
j
Symbol Parameter Test conditions Min. Typ. Max. Unit
OUT
OUT
= 0V; V
= 0V; V
CC
CC
= 13V;
= 13V;
5µA
3µA
T
T
t
SDL
I
V
demag
Shutdown temperature 150 175 200 °C
TSD
T
Reset temperature 135 °C
R
Thermal hysteresis 7 15 °C
hyst
Status delay in overload conditions
Current limitation
lim
Turn-off output clamp voltage
> T
T
j
TSD
V
= 13V
CC
5.5V < V
= 2A; L = 6mH
I
OUT
CC
< 36V
14 18 23
-41V
V
CC
CC
-48V
20 µs
A
23
CC
55
A
­V
Note: To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.

Tabl e 7. VCC - output diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
F
Table 8. Switching (V
Symbol Parameter Test conditions Min. Typ. Max. Unit
Forward on voltage - I
= 13V; Tj = 25°C)
CC
= 1.3A; Tj = 150°C - - 0.6 V
OUT
R
t
d(on)
t
d(off)
dV
OUT
dV
OUT
Turn-on delay time
Turn-off delay time
/dt
Turn-on voltage slope
(on)
/dt
Turn-off voltage slope
(off)
L
to V
R
L
to V
R
L
V
OUT
R
L
to V
8/27 Doc ID 10871 Rev 7
= 6.5Ω from VIN rising edge
= 1.3V (see Figure 5)
OUT
= 6.5Ω from VIN falling edge
= 11.7V (see Figure 5)
OUT
= 6.5Ω from V
OUT
= 1.3V to
= 10.4V (see Figure 5)
= 6.5Ω from V
= 1.3V (see Figure 5)
OUT
OUT
= 11.7V
-30 -µs
-30 -µs
See
-
-
Figure 10
See
Figure 12
-V/µs
-V/µs
VNQ830PEP-E Electrical specifications

Table 9. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
V
I(hyst)
V

Table 10. Status pin

Input low level 1.25 V
IL
Low level input current V
IL
Input high level 3.25 V
IH
High level input current V
IH
= 1.25V 1 µA
IN
= 3.25V 10 µA
IN
Input hysteresis voltage 0.5 V
Input clamp voltage
ICL
I
IN
I
IN
= 1mA = -1mA
66.8
- 0.7
8V
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
STAT
I
LSTAT
C
STAT
V

Table 11. Open-load detection

Status low output voltage I
STAT
Status leakage current Normal operation; V
Status pin input capacitance Normal operation; V
I
Status clamp voltage
SCL
STAT
I
STAT
= 1.6mA 0.5 V
= 5V 10 µA
STAT
= 5V 100 pF
STAT
= 1mA = - 1mA
66.8
- 0.7
8V
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
I
t
DOL(on)
V
t
DOL(off)
Open-load on-state detection threshold V
OL
Open-load on-state detection delay I
Open-load off-state voltage detection
OL
threshold
= 5V 35 70 140 mA
IN
= 0A 200 µs
OUT
= 0V 1.5 2.5 3.5 V
V
IN
Open-load detection delay at turn-off 1000 µs

Figure 4. Status timings

OPEN LOAD STATUS TIMING (with external pull-up)
V
> V
OUT
V
INn
V
STATn
t
DOL(off)
I
< I
OUT
t
DOL(on)
OL
OL
OVER TEMP STATUS TIMING
V
INn
V
STATn
t
SDL
Tj > T
TSD
t
SDL
Doc ID 10871 Rev 7 9/27
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