ST VNQ830M-E User Manual

VNQ830M-E

QUAD CHANNEL HIGH SIDE DRIVER

Table 1. General Features

Figure 1. Package

Type	RDS(on)	Iout	VCC
VNQ830M-E	60mΩ (*)	6A (*)	36V

(*) Per each channel

■CMOS COMPATIBLE INPUTS

■OPEN DRAIN STATUS OUTPUTS

■ON STATE OPEN LOAD DETECTION

■OFF STATE OPEN LOAD DETECTION

■SHORTED LOAD PROTECTION

■UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN

■LOSS OF GROUND PROTECTION

■VERY LOW STAND-BY CURRENT

■REVERSE BATTERY PROTECTION (**)

■IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE

DESCRIPTION

The VNQ830M-E is a quad HSD formed by assembling two VND830M-E chips in the same SO-28 package. The VND830M-E is a monolithic device made by using STMicroelectronics VIPower M0-3 Technology. The VNQ830M-E is intended for driving any type of multiple loads with one side connected to ground.

Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).

SO-28 (DOUBLE ISLAND)

Active current limitation combined with thermal shutdown and automatic restart protects the device against overload.

The device detects open load condition both in on and off state. The openload threshold is aimed at detecting the 5W/12V standard bulb as an openload fault in the on state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection

Table 2. Order Codes

Package	Tube	Tape and Reel
SO-28	VNQ830M-E	VNQ830MTR-E
Note: (**) See application schematic at page 10
		Rev. 1
October 2004		1/21

VNQ830M-E

Figure 2. Block Diagram

			VCC1,2
	Vcc	OVERVOLTAGE
	CLAMP
		UNDERVOLTAGE
GND1,2		CLAMP 1
INPUT1			OUTPUT1
		DRIVER 1
STATUS1			CLAMP 2
		CURRENT LIMITER 1	DRIVER 2
		LOGIC
			OUTPUT2
	OVERTEMP. 1
		OPENLOAD ON 1
			CURRENT LIMITER 2
INPUT2
		OPENLOAD OFF 1	OPENLOAD ON 2
STATUS2
			OPENLOAD OFF 2
	OVERTEMP. 2
			VCC3,4
	Vcc	OVERVOLTAGE
	CLAMP
		UNDERVOLTAGE
GND3,4		CLAMP 3
INPUT3		DRIVER 3	OUTPUT3
STATUS3			CLAMP 4
		CURRENT LIMITER 3	DRIVER 4
		LOGIC
	OVERTEMP. 3		OUTPUT4
		OPENLOAD ON 3
INPUT4			CURRENT LIMITER 4
		OPENLOAD OFF 3	OPENLOAD ON 4
STATUS4
			OPENLOAD OFF 4
	OVERTEMP. 4
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					VNQ830M-E
Table 3. Absolute Maximum Ratings
Symbol		Parameter		Value		Unit
VCC	DC Supply Voltage			41		V
- VCC	Reverse DC Supply Voltage			- 0.3		V
- IGND	DC Reverse Ground Pin Current			- 200		mA
IOUT	DC Output Current			Internally Limited		A
- IOUT	Reverse DC Output Current			- 6		A
IIN	DC Input Current			+/- 10		mA
ISTAT	DC Status Current			+/- 10		mA
	Electrostatic Discharge (Human Body Model:
	R=1.5KΩ; C=100pF)			4000		V
	- INPUT
VESD				4000		V
	- STATUS
				5000		V
	- OUTPUT
				5000		V
	- VCC
Ptot	Power Dissipation Tpins=25°C			6.25		W
	Maximum Switching Energy
EMAX	(L=1mH; R =0Ω; V	=13.5V; T	=150ºC;	77		mJ
	L	bat	jstart
	IL=10.5A)
Tj	Junction Operating Temperature			Internally Limited		°C
Tstg	Storage Temperature			- 55 to 150		°C

Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins

VCC1,2			1	28		VCC1,2
GND 1,2						OUTPUT1
INPUT1						OUTPUT1
STATUS1						OUTPUT1
STATUS2						OUTPUT2
INPUT2						OUTPUT2
VCC1,2						OUTPUT2
VCC3,4						OUTPUT3
GND 3,4						OUTPUT3
INPUT3						OUTPUT3
						OUTPUT4
STATUS3
STATUS4						OUTPUT4
INPUT4						OUTPUT4
VCC3,4			14	15		VCC3,4

Connection / Pin	Status	N.C.	Output	Input
Floating	X	X	X	X
To Ground		X		Through 10KΩ resistor

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VNQ830M-E

Figure 4. Current and Voltage Conventions

IS3,4				IS1,2
VCC3,4		VCC3,4	VCC1,2	VF1 (*)	VCC1,2
	IIN1
VIN1	ISTAT1	INPUT1		IOUT1
		STATUS1
V	IIN2		OUTPUT1
					VOUT1
STAT1		INPUT2		IOUT2
VIN2	ISTAT2
		STATUS2	OUTPUT2
	IIN3			VOUT2
VSTAT2
VIN3	ISTAT3	INPUT3		IOUT3
			OUTPUT3
		STATUS3		VOUT3
	IIN4
VSTAT3
		INPUT4		IOUT4
VIN4	ISTAT4		OUTPUT4
		STATUS4		VOUT4
VSTAT4
		GND3,4	GND1,2
		IGND3,4		IGND1,2
(*) VFn = VCCn - VOUTn during reverse battery condition

Table 4. Thermal Data (Per island)

Symbol	Parameter	Value			Unit
Rthj-lead	Thermal Resistance Junction-lead per chip	20			°C/W
Rthj-amb	Thermal Resistance Junction-ambient	60 (1)		44 (2)	°C/W
Rthj-amb	Thermal Resistance Junction-ambient (two chips ON)	46 (1)		31 (2)	°C/W

Note: 1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35μm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow

Note: 2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35μm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow

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VNQ830M-E

ELECTRICAL CHARACTERISTICS

(8V<VCC<36V; -40°C< T j <150°C, unless otherwise specified) (Per each channel)

Table 5. Power Output

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
VCC (**)	Operating Supply Voltage		5.5	13	36	V
VUSD (**)	Undervoltage Shut-down		3	4	5.5	V
VOV (**)	Overvoltage Shut-down		36			V
Ron	On State Resistance	IOUT=2A; Tj=25°C			60	mΩ
		IOUT=2A; VCC>8V			120	mΩ
		Off State; VCC=13V; VIN=VOUT=0V		12	40	μA
IS (**)	Supply Current	Off State; VCC=13V; VIN=VOUT=0V; Tj		12	25	μA
		=25°C
		On State; VCC=13V; VIN=5V; IOUT=0A		5	7	mA
IL(off1)	Off State Output Current	VIN=VOUT=0V	0		50	μA
IL(off2)	Off State Output Current	VIN=0V; VOUT=3.5V	-75		0	μA
IL(off3)	Off State Output Current	VIN=VOUT=0V; VCC=13V; Tj =125°C			5	μA
IL(off4)	Off State Output Current	VIN=VOUT=0V; VCC=13V; Tj =25°C			3	μA

Note: (**) Per island

Table 6. Protection (Per each channel) (See note 1)

	Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
	TTSD	Shut-down Temperature		150	175	200	°C
	TR	Reset Temperature		135			°C
	Thyst	Thermal Hysteresis		7	15		°C
	tSDL	Status Delay in Overload	Tj>TTSD			20	μs
		Conditions
	Ilim	Current limitation		6	10.5	15	A
			5.5V<VCC<36V			15	A
	Vdemag	Turn-off Output Clamp	IOUT=2A; L=6mH	VCC-41	VCC-48	VCC-55	V
		Voltage

Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles

Table 7. VCC - Output Diode (Per each channel)

Symbol	Parameter	Test Conditions	Min	Typ	Max	Unit
VF	Forward on Voltage	-IOUT=1.3A; Tj=150°C			0.6	V

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VNQ830M-E

ELECTRICAL CHARACTERISTICS (continued)

Table 8. Status Pin (Per each channel)

Symbol	Parameter	Test Conditions	Min	Typ	Max	Unit
VSTAT	Status Low Output Voltage	ISTAT=1.6mA			0.5	V
ILSTAT	Status Leakage Current	Normal Operation; VSTAT=5V			10	μA
CSTAT	Status Pin Input	Normal Operation; VSTAT=5V			100	pF
	Capacitance
VSCL	Status Clamp Voltage	ISTAT=1mA	6	6.8	8	V
		ISTAT=-1mA		-0.7		V

Table 9. Switching (Per each channel) (VCC=13V)

Symbol	Parameter	Test Conditions	Min	Typ	Max	Unit
td(on)	Turn-on Delay Time	RL=6.5Ω from VIN rising edge to		30		μs
		VOUT=1.3V
td(off)	Turn-off Delay Time	RL=6.5Ω from VIN falling edge to		30		μs
		VOUT=11.7V
		RL=6.5Ω from VOUT=1.3V to		See		V/μs
dVOUT/dt(on)	Turn-on Voltage Slope			relative
		VOUT=10.4V
				diagram
		RL=6.5Ω from VOUT=11.7V to		See		V/μs
dVOUT/dt(off)	Turn-off Voltage Slope			relative
		VOUT=1.3V
				diagram

Table 10. Openload Detection (Per each channel)

	Symbol	Parameter	Test Conditions	Min	Typ	Max	Unit
	IOL	Openload ON State	VIN=5V	0.6	0.9	1.2	A
		Detection Threshold
	tDOL(on)	Openload ON State	IOUT=0A			200	μs
		Detection Delay
		Openload OFF State
	VOL	Voltage Detection	VIN=0V	1.5	2.5	3.5	V
		Threshold
	tDOL(off)	Openload Detection Delay				1000	μs
		at Turn Off

Table 11. Logic Input (Per each channel)

Symbol	Parameter	Test Conditions	Min	Typ	Max	Unit
VIL	Input Low Level				1.25	V
IIL	Low Level Input Current	VIN=1.25V	1			μA
VIH	Input High Level		3.25			V
IIH	High Level Input Current	VIN=3.25V			10	μA
VI(hyst)	Input Hysteresis Voltage		0.5			V
VICL	Input Clamp Voltage	IIN=1mA	6	6.8	8	V
		IIN=-1mA		-0.7		V

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				VNQ830M-E
	Table 12. Truth Table
	CONDITIONS	INPUT	OUTPUT	SENSE
	Normal Operation	L	L	H
		H	H	H
		L	L	H
	Current Limitation	H	X	(Tj < TTSD) H
		H	X	(Tj > TTSD) L
	Overtemperature	L	L	H
		H	L	L
	Undervoltage	L	L	X
		H	L	X
	Overvoltage	L	L	H
		H	L	H
	Output Voltage > VOL	L	H	L
		H	H	H
	Output Current < IOL	L	L	H
		H	H	L

Figure 5.

OPEN LOAD STATUS TIMING (with external pull-up)

VOUT > VOL

IOUT < IOL

VINn

VSTATn

tDOL(off)

tDOL(on)

OVER TEMP STATUS TIMING

Tj > TTSD

VINn

VSTATn

tSDL			tSDL

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