ST VNQ830M-E User Manual

VNQ830M-E
QUAD CHANNEL HIGH SIDE DRIVER
Table 1. General Features
Type R
VNQ830M-E 60m
(*) Per each channel
CMOS COMPATIBLE INPUTS
ON STATE OP EN L OAD DET ECTIO N
OFF STATE OPEN LOAD DETECTION
SHOR T E D L O A D PROTE C TION
UNDERVOLTAGE AND OVERVOLTAGE
DS(on)
(*) 6A (*) 36V
I
out
V
CC
SHUTDOWN
LOSS OF GROUND PROTECTION
VERY LOW STAND-BY CURRENT
REVERSE BATTERY PROTECTION (**)
IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECT IVE
DESCRIPTION
The VNQ830M-E is a quad HSD formed by assembling two VND830M-E chips in the same SO-28 package. The VND830M-E is a monolithic device made by using| STMicroelectronics VIPower M0-3 Technology. The VNQ830M-E is intended for driving any type of multiple loads with one side connected to ground.
Activ e V
pin voltage clamp pro tects the device
CC
against low energy spikes (see ISO7637 transient compatibility table).
Figure 1. Package
SO-28 (DOUBLE ISLAND)
Active current limitation combined with thermal shutdown and automatic restart protects the device against overload.
The device detects open load condition both in on and off state. The openload t hreshold is aim ed at detecting the 5W/12V standard bulb as an openload fault in the on state. Outp ut shorted to
is detected in the off state. Device
V
CC
automatically turns off in case of ground pin disconnection
Table 2. Order Codes
Package Tube Tape and Reel
SO-28
Note: (**) See appli c a t i on sche m atic at pa ge 10
VNQ830M-E VNQ830MTR-E
Rev. 1
1/21October 2004
VNQ830M-E
Figure 2. Block Diagram
V
cc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
V
CC1,2
GND1,2
INPUT1
STATUS1
INPUT2
STATUS2
GND3,4
INPUT3
STATUS3
INPUT4
STATUS4
OVERTEMP. 1
OVERTEMP. 2
V
cc
CLAMP
OVERTEMP. 3
LOGIC
LOGIC
CLAM P 1
DRIVER 1
CURRENT LIMITER 1
OPENLOAD ON 1
OPENLOAD OFF 1
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 3
DRIVER 3
CURRENT LIMITE R 3
OPENLOAD ON 3
OPENLOAD OFF 3
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPENLOAD ON 2
OPENLOAD OFF 2
CLAMP 4
DRIVER 4
CURRENT LIMITER 4
OPENLOAD ON 4
OUTPUT1
OUTPUT2
V
CC3,4
OUTPUT3
OUTPUT4
2/21
OVERTEMP. 4
OPENLOAD OFF 4
VNQ830M-E
Table 3. Absolute Maximum Ratings
Symbol Parameter Value Unit
V
- V
- I I
OUT
- I
I
STAT
V
P
E
T
CC
CC
GND
OUT
I
IN
ESD
tot
MAX
T
j
stg
DC Supply Voltage 41 V Reverse DC Supply Voltage - 0.3 V DC Reverse Ground Pin Current - 200 mA DC Output Current Internally Limited A Reverse DC Output Current - 6 A DC Input Current +/- 10 mA DC Status Current +/- 10 mA Electrostatic Discharge (Human Body Model:
R=1.5KΩ; C=100pF)
- INPUT
- STATUS
- OUTPUT
- V
CC
Power Dissipation T
=25°C 6.25 W
pins
4000 4000 5000 5000
Maximum Switching Energy (L=1mH; R
I
=10.5A)
L
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC;
77 mJ
Junction Operating Temperature Internally Limited °C Storage Temperature - 55 to 150 °C
V V V V
Figure 3. Con fig urat i on Dia g ra m (Top View) & Sugg est ed C o nnections for Unu sed and N.C. Pins
VCC1,2 GND 1,2 INPUT1 STA TUS1 STA TUS2
INPUT2
1,2
V
CC
VCC3,4 GND 3,4 INPUT3
STATUS3 STA TUS4 INPUT4
3,4
V
CC
1
14
Connection / Pin Status N.C. Output Input
Floating X X X X To Ground X Through 10Kresistor
28
VCC1,2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2
OUTPUT2
OUTPUT3 OUTPUT3 OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
V
15
3,4
CC
3/21
VNQ830M-E
Figure 4. Current and Voltage Conventions
V
CC3,4
V
IN1
(*) VFn = V
V
STAT1
CCn
V
- V
I
S3,4
I
IN1
I
STAT1
I
IN2
I
IN2
V
STAT2
V
IN3
V
STAT3
during reverse battery condition
OUTn
STAT2
I
IN3
I
STAT3
I
IN4
I
STAT4
V
IN4
V
STAT4
INPUT1 STATUS1
INPUT2 STATUS2
INPUT3
STATUS3
INPUT4 STATUS4
GND
V
CC3,4
3,4
I
GND3,4
V
CC1,2
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
GND
1,2
I
GND1,2
I
OUT1
I
OUT2
I
OUT3
I
OUT4
V
OUT4
V
V
F1
OUT3
I
S1,2
V
OUT1
V
CC1,2
(*)
V
OUT2
Table 4. Thermal Data (Per islan d )
Symbol Parameter Value Unit
R
thj-lead
R
thj-amb
R
thj-amb
Thermal Resistance Junction-lead per chip 20 °C/W
Thermal Resistance Junction-ambient 60 Thermal Resistance Junction-ambient (two chips ON) 46
(1) (1)
44 31
(2) (2)
°C/W °C/W
Note: 1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting an d no arti ficial ai r flow
Note: 2. When mounted on a standard single-sided FR-4 board with 6cm
2
of Cu (at least 3 5µm thick) connected to all VCC pins. Hori zontal
mounting an d no arti fi cial ai r flow
4/21
VNQ830M-E
ELECTRICAL CHARACTERISTICS
(8V<V
(Per each channel)
Table 5. Po we r Ou t put
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
V
Note: (**) Per island
<36V; -40°C< Tj <150°C, unless otherwise specified)
CC
(**) Operating Supply Voltage 5.5 13 36 V
CC
(**) Undervoltage Shut-down 3 4 5.5 V
USD
(**) Overvoltage Shut- down 36 V
OV
I
R
on
(**) Supply Current
I
S
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
On State Resistance
Off State Output Current VIN=V Off State Output Current VIN=0V; V Off State Output Current VIN=V Off State Output Current VIN=V
=2A; Tj=25°C
OUT
I
=2A; VCC>8V
OUT
Off State; V Off State; V
=13V; VIN=V
CC
=13V; VIN=V
CC
OUT OUT
=25°C On State; VCC=13V; VIN=5V; I
=0V 0 50 µA
OUT
=3.5V -75 0 µA
OUT
=0V; VCC=13V; Tj =125°C 5 µA
OUT
=0V; VCC=13V; Tj =25°C 3 µA
OUT
=0V =0V; Tj
=0A
OUT
12
12
5
60
120
40
25
7
m m
µA
µA
mA
Table 6. Protection (Per each channel) (See note 1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
T
TSD
T
T
hyst
t
SDL
I
lim
V
demag
Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
Table 7. V
Symbol Parameter Test Conditions Min Typ Max Unit
V
Shut-down Temperature 150 175 200 °C Reset Temperature 135 °C
R
Thermal Hysteresis 7 15 °C Status Delay in Overload
Conditions
Current limitation
Turn-off Output Clamp Voltage
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the durat i on and number of activation cycl es
- Output Diode (Per each channel)
CC
Forward on Voltage -I
F
T
j>TTSD
20 µs
6 10.5 15
5.5V<V
I
OUT
OUT
<36V
CC
=2A; L=6mH VCC-41 VCC-48 VCC-55 V
=1.3A; Tj=150°C 0.6 V
15
A A
5/21
VNQ830M-E
ELECTRICAL CHARACTERISTICS (continued) Table 8. Status Pin (Per each channel)
Symbol Parameter Test Conditions Min Typ Max Unit
V
I
LSTAT
C
V
STAT
STAT
SCL
Status Low Output Voltage I
=1.6mA 0.5 V
STAT
Status Leakage Current Normal Operation; V Status Pin Input
Capacitance Status Clamp Voltage
Normal Operation; V I
=1mA
STAT
=-1mA
I
STAT
=5V 10 µA
STAT
=5V 100 pF
STAT
6 6.8
-0.7
8V
V
Table 9. Switching (Per each channel) (V
CC
=13V)
Symbol Parameter Test Conditions Min Typ Max Unit
=6.5from VIN rising edge to
R
L
V
=1.3V
OUT
=6.5from VIN falling edge to
R
L
V
=11.7V
OUT
=6.5from V
R
L
V
=10.4V
OUT
=6.5from V
R
L
V
=1.3V
OUT
OUT
OUT
(Per each channel)
=1.3V to
=11.7V to
30 µs
30 µs
See
relative
diagram
See
relative
diagram
dV
dV
t
t
OUT
OUT
d(on)
d(off)
Turn-on Delay Time
Turn-off Delay Time
/dt
Turn-on Voltage Slope
(on)
/dt
Turn-off Voltage Slope
(off)
Table 10. Openload Detection
Symbol Parameter Test Conditions Min Typ Max Unit
I
OL
t
DOL(on)
Openload ON State Detection Threshold Openload ON State Detection Delay
=5V 0.6 0.9 1.2 A
V
IN
I
=0A 200 µs
OUT
Openload OFF State
V
OL
Voltage Detection
V
=0V 1.5 2.5 3.5 V
IN
Threshold Openload Detection Delay
t
DOL(off)
at Turn Off
1000 µs
V/µs
V/µs
Table 11. Logic Input
(Per each channel)
Symbol Parameter Test Conditions Min Typ Max Unit
V
V
V
IL
I
IL
V
IH
I
IH
I(hyst)
ICL
Input Low Level 1.25 V Low Level Input Current VIN=1.25V 1 µA Input High Level 3.25 V High Level Input Current VIN=3.25V 10 µA Input Hysteresis Voltage 0.5 V
Input Clamp Voltage
I
IN
I
IN
=1mA =-1mA
6 6.8
-0.7
8V
6/21
V
Tabl e 12. Truth Tabl e
CONDITIONS INPUT OUTPUT SENSE
VNQ830M-E
Normal Operation
L
H
L
Current Limitation
H H
Overtemperature
Undervoltage
Overvoltage
Output Voltage > V
Output Current < I
OL
OL
L
H
L
H
L
H
L
H
L
H
Figure 5.
OPEN LOAD STATUS TIMING (with external pull-up)
V
> V
OUT
OL
V
INn
I
OUT
< I
L
H
L X X
(T
(T
< T
j
> T
j
L
L
L
L
L
L H
H
L H
TSD
TSD
H H
H
) H
) L
H
L
X X
H H
L
H H
L
OVER TEMP STATUS TIMING
OL
V
INn
Tj > T
TSD
V
STA Tn
t
DOL(off)
t
DOL(on)
V
STATn
t
SDL
t
SDL
7/21
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