ST VNQ830 User Manual
Features
Type R
VNQ830 65 mΩ
1. Per each channel.
DS(on)
(1)
I
OUT
6A 36V
V
VNQ830
Quad channel high-side driver
CC
■ CMOS compatible inputs
■ Open Drain status outputs
■ On-state open-load detection
■ Off-state open-load detection
■ Shorted load protection
■ Undervoltage and overvoltage shutdown
■ Loss of ground protection
■ Very low standby current
■ Reverse battery protection
SO-28 (double island)
Description
The VNQ830 is a quad HSD formed by
assembling two VND830 chips in the same SO-28
package. The VND830 is a monolithic device
made using| STMicroelectronics™ VIPower™
M0-3 Technology. The device is intended for
driving any type of multiple load with one side
connected to ground.
The active V
device against low energy spikes (see ISO7637
transient compatibility table). Active current
limitation combined with thermal shutdown and
automatic restart protects the device against
overload. The device detects the open load
condition in both the on and off state.
In the off state the device detects if the output is
shorted to V
in the case where the ground pin becomes
disconnected.
pin voltage clamp protects the
CC
. The device automatically turns off
CC
Table 1. Device summary
Order codes
Package
Tube Tape and reel
SO-28 (double island) VNQ830 VNQ83013TR
February 2011 Doc ID 7390 Rev 4 1/28
www.st.com
1
Contents VNQ830
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 18
3.1.2 Solution 2: a diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
) in the ground line . . . . . . . . . . . . . . . . . . . . 19
GND
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.5 Maximum demagnetization energy (V
= 13.5V) . . . . . . . . . . . . . . . . . . 21
CC
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28 Doc ID 7390 Rev 4
VNQ830 List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. V
Table 8. Switching (V
Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 13. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 14. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 15. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 16. Thermal calculation according to the PCB heatsink area . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 17. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 18. SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 19. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
= 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CC
Doc ID 7390 Rev 4 3/28
List of figures VNQ830
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 21. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 22. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 23. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 23
Figure 29. Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. Thermal fitting model of a quad channel HSD in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 31. SO-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 32. SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. SO-28 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4/28 Doc ID 7390 Rev 4
VNQ830 Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
CC1,2
V
cc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
GND1,2
INPUT1
STAT US1
INPUT2
STAT US2
GND3,4
INPUT3
STAT US3
INPUT4
STAT US4
OVERTEMP. 1
OVERTEMP. 2
V
cc
CLAMP
OVERTEMP. 3
OVERTEMP. 4
LOGIC
LOGIC
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPENLOAD ON 1
OPENLOAD OFF 1
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 3
DRIVER 3
CURRENT LIMITER 3
OPENLOAD ON 3
OPENLOAD OFF 3
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPENLOAD ON 2
OPENLOAD OFF 2
CLAMP 4
DRIVER 4
CURRENT LIMITER 4
OPENLOAD ON 4
OPENLOAD OFF 4
OUTPUT1
OUTPUT2
V
CC3,4
OUTPUT3
OUTPUT4
Doc ID 7390 Rev 4 5/28
Block diagram and pin description VNQ830
Figure 2. Configuration diagram (top view)
VCC1,2
GND 1,2
INPUT1
STATUS1
STATUS2
INPUT2
1,2
V
CC
3,4
V
CC
GND 3,4
INPUT3
STATUS3
STATUS4
INPUT4
V
3,4
CC
1
14
28
V
1,2
CC
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
3,4
V
15
CC
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X
Through 10KΩ
resistor
6/28 Doc ID 7390 Rev 4
VNQ830 Electrical specifications
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
-V
-I
GND
I
OUT
-I
OUT
I
I
STAT
V
ESD
E
MAX
P
T
DC supply voltage 41 V
CC
Reverse DC supply voltage -0.3 V
CC
DC reverse ground pin current -200 mA
DC output current Internally limited A
Reverse DC output current -6 A
DC input current +/- 10 mA
IN
DC Status current +/- 10 mA
Electrostatic discharge (human body model: R=1.5KΩ;
C = 100pF)
–INPUT
–STATUS
–OUTPUT
–V
CC
4000
4000
5000
5000
Maximum switching energy
(L = 2.5 mH; R
=9A)
I
L
Power dissipation (per island) at T
tot
Junction operating temperature Internally limited °C
T
j
Storage temperature -55 to 150 °C
stg
= 0 Ω; V
L
= 13.5 V; T
bat
= 150 °C;
jstart
= 25 °C 6.25 W
lead
140 mJ
V
V
V
V
Doc ID 7390 Rev 4 7/28
Electrical specifications VNQ830
2.2 Thermal data
Table 4. Thermal data (per island)
Symbol Parameter Value Unit
R
thj-lead
R
thj-amb
R
thj-amb
Thermal resistance junction-lead 20 °C/W
Thermal resistance junction-ambient
(one chip ON)
Thermal resistance junction-ambient
(two chips ON)
1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 µm thick) connected
to all V
2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 µm thick) connected to
all V
pins. Horizontal mounting and no artificial air flow.
CC
pins. Horizontal mounting and no artificial air flow.
CC
2.3 Electrical characteristics
Values specified in this section are for 8V < V
otherwise stated.
Figure 3. Current and voltage conventions
I
S3,4
V
CC3,4
I
IN1
V
STAT3
V
I
STAT1
I
IN2
I
STAT2
I
IN3
I
STAT3
I
IN4
I
STAT4
IN4
V
STAT4
V
IN1
V
STAT1
V
IN2
V
STAT2
V
IN3
INPUT1
STATUS1
INPUT2
STATUS2
INPUT3
STATUS3
INPUT4
STATUS4
GND
(1)
60
(1)
46
< 36V; -40 °C < Tj < 150 °C, unless
CC
I
S1,2
V
CC3,4
3,4
I
GND3,4
V
CC1,2
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
GND
V
(*)
F1
I
OUT1
I
OUT2
V
V
OUT3
I
OUT3
I
OUT4
V
OUT4
1,2
I
GND1,2
OUT2
44
31
V
(2)
(2)
OUT1
V
°C/W
°C/W
CC1,2
Note: V
Fn
= V
CCn
- V
during reverse battery condition.
OUTn
8/28 Doc ID 7390 Rev 4
VNQ830 Electrical specifications
Table 5. P owe r
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
R
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Table 6. Protections
Operating supply
CC
voltage
Undervoltage shutdown 3 4 5.5 V
USD
Overvoltage shutdown 36 V
OV
On-state resistance
ON
I
Supply current
S
Off-state output current V
Off-state output current V
Off-state output current
Off-state output current
5.5 13 36 V
I
= 2 A; Tj = 25 °C 65 mΩ
OUT
= 2 A; V
I
OUT
Off-state; V
V
= V
IN
OUT
Off-state; V
= V
V
IN
OUT
On-state; V
I
= 0 A
OUT
= V
IN
OUT
= 0 V; V
IN
V
= V
IN
OUT
> 8 V 130 mΩ
CC
= 13 V;
CC
= 0 V
= 13 V;
CC
= 0 V; Tj = 25 °C
= 13 V; V
CC
IN
= 5 V;
12 40 µA
12 25 µA
57mA
= 0 V 0 50 µA
= 3.5 V -75 0 µA
OUT
= 0 V; V
CC
= 13 V;
Tj=125°C
= V
V
IN
=25°C
T
j
OUT
= 0 V; V
CC
= 13 V;
5µA
3µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
T
T
t
SDL
I
V
demag
Shutdown temperature 150 175 200 °C
TSD
Reset temperature 135 °C
R
Thermal hysteresis 7 15 °C
hyst
Status delay in overload
conditions
Current limitation
lim
Turn-off output clamp voltage I
T
> T
j
TSD
V
= 13 V 6 9 15 A
CC
5.5 V < V
OUT
< 36 V 15 A
CC
-41V
V
= 2A; L = 6mH
CC
CC
-48V
20 µs
-
CC
55
V
Note: To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
Table 7. VCC - output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
F
Forward on voltage -I
= 1.2 A; Tj = 150 °C — — 0.6 V
OUT
Doc ID 7390 Rev 4 9/28
Loading...