ST VNQ810P-E User Manual

Features
Type R
VNQ810P-E 160mΩ
1. Per each channel.
DS(on)
(1)
I
OUT
3.5A
(1)
V
CC
36V
VNQ810P-E
Quad channel high-side driver
ECOPACK
Automotive Grade: compliance with AEC
®
guidelines
Very low standby current
CMOS compatible input
On-state open-load detection
Off-state open-load detection
Thermal shutdown protection and diagnosis
Undervoltage shutdown
Overvoltage clamp
Output stuck to V
Load current limitation
Reverse battery protection
Electrostatic discharge protection
detection
CC
SO-28 (double island)
Description
The VNQ810P-E is a quad HSD formed by assembling two VND810P-E chips in the same SO-28 package. The VNQ810P-E is a monolithic device made by using STMicroelectronics VIPower™ M0-3 technology, intended for driving any kind of load with one side connected to ground. Active V device against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open-load condition both in on and off-state. Output shorted to V Device automatically turns off in case of ground pin disconnection.
pin voltage clamp protects the
CC
is detected in the off-state.
CC

Table 1. Device summary

Order codes
Package
Tube Tape and reel
SO-28 (double island) VNQ810P-E VNQ810PTR-E
April 2010 Doc ID 17387 Rev 1 1/28
www.st.com
1
Contents VNQ810P-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 17
3.1.2 Solution 2: a diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
) in the ground line . . . . . . . . . . . . . . . . . . . . 18
GND
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5 Maximum demagnetization energy (V
= 13.5V) . . . . . . . . . . . . . . . . . . 20
CC
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2 SO-28 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28 Doc ID 17387 Rev 1
VNQ810P-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. V
Table 8. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Switching (V
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Electrical transient requirements on V Table 14. Electrical transient requirements on V Table 15. Electrical transient requirements on V
Table 16. Thermal calculation according to the PCB heatsink area . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 17. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 18. SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 19. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
= 13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
pin (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
pin (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
pin (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
Doc ID 17387 Rev 1 3/28
List of figures VNQ810P-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 14. I
Figure 15. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. On-state resistance vs T Figure 18. On-state resistance vs V
Figure 19. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 21. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. SO-28 (double island) maximum turn-off current versus load inductance . . . . . . . . . . . . . 20
Figure 27. SO-28 double island PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. SO-28 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Thermal fitting model of a quad channel HSD in SO-28. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. SO-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. SO-28 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
LIM
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
CC
4/28 Doc ID 17387 Rev 1
VNQ810P-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V
CC1,2
V
cc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
GND1,2
INPUT1
STAT US1
INPUT2
STAT US2
GND3,4
INPUT3
STAT US3
INPUT4
STAT US4
OVERTEMP. 1
OVERTEMP. 2
V
cc
CLAMP
OVERTEMP. 3
OVERTEMP. 4
LOGIC
LOGIC
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPENLOAD ON 1
OPENLOAD OFF 1
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 3
DRIVER 3
CURRENT LIMITER 3
OPENLOAD ON 3
OPENLOAD OFF 3
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPENLOAD ON 2
OPENLOAD OFF 2
CLAMP 4
DRIVER 4
CURRENT LIMITER 4
OPENLOAD ON 4
OPENLOAD OFF 4
OUTPUT1
OUTPUT2
V
CC3,4
OUTPUT3
OUTPUT4
Doc ID 17387 Rev 1 5/28
Block diagram and pin description VNQ810P-E

Figure 2. Configuration diagram (top view)

VCC1,2
1
GND 1,2
INPUT1
STATUS1
STATUS2
INPUT2
1,2
V
CC
3,4
V
CC
GND 3,4
INPUT3
STATUS3
STATUS4
INPUT4
V
3,4
CC

Table 2. Suggested connections for unused and not connected pins

14
28
15
V
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
V
CC
CC
1,2
3,4
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X
Through 10 KΩ
resistor
6/28 Doc ID 17387 Rev 1
VNQ810P-E Electrical specifications

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the Ta bl e 5 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
-V
-I
I
OUT
-I
I
STAT
V
E
P
T
CC
CC
GND
OUT
I
IN
ESD
MAX
tot
T
j
stg
DC supply voltage 41 V
Reverse DC supply voltage -0.3 V
DC reverse ground pin current -200 mΑ
DC output current Internally limited A
Reverse DC output current -6 A
DC input current +/-10 mA
DC Status current +/-10 mA
Electrostatic discharge (human body model: R = 1.5 KΩ; C=100pF)
- INPUT
- STATUS
- OUTPUT
- V
CC
Maximum switching energy (L = 2.5 mH; R
= 0 Ω; V
L
= 13.5 V; T
bat
Power dissipation (per island) at T
= 150 °C; IL = 9 A)
jstart
= 25°C 6.25 W
lead
4000 4000 5000 5000
23 mJ
V V V V
Junction operating temperature Internally limited °C
Storage temperature - 55 to 150 °C

2.2 Thermal data

Table 4. Thermal data (per island)

Symbol Parameter Value Unit
R
thj-lead
R
thj-amb
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all V
2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick) connected to all V
Thermal resistance junction-lead 20 °C/W
Thermal resistance junction-ambient (one chip ON) 60
Thermal resistance junction-ambient (two chips ON) 46
pins. Horizontal mounting and no artificial air flow.
CC
pins. Horizontal mounting and no artificial air flow.
CC
(1)
(1)
44
31
(2)
(2)
°C/W
°C/W
Doc ID 17387 Rev 1 7/28
Electrical specifications VNQ810P-E

2.3 Electrical characteristics

Values specified in this section are for 8 V < V
CC
otherwise stated.

Figure 3. Current and voltage conventions

I
S3,4
V
INPUT1
STATUS1
INPUT2
STATUS2
INPUT3
STATUS3
INPUT4
STATUS4
GND
CC3,4
3,4
V
CC3,4
V
IN1
V
STAT1
V
IN2
V
STAT2
V
IN3
V
STAT3
V
1. VFn = V

Table 5. Power output

CCn
- V
during reverse battery condition.
OUTn
I
IN1
I
STAT1
I
IN2
I
STAT2
I
IN3
I
STAT3
I
IN4
I
STAT4
IN4
V
STAT4
< 36 V; -40 °C < Tj < 150 °C, unless
I
S1,2
I
GND3,4
V
CC1,2
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
GND
1,2
I
GND1,2
I
OUT1
I
OUT2
I
OUT3
I
OUT4
V
OUT4
V
V
OUT3
(1)
F1
V
OUT1
V
OUT2
V
CC1,2
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
V
CC
V
USD
V
OV
R
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
1. Per island.
Operating supply voltage 5.5 13 36 V
(1)
Undervoltage shutdown 3 4 5.5 V
(1)
Overvoltage shutdown 36 V
= 1 A; Tj = 25 °C
I
On-state resistance
ON
Supply current
I
S
Off-state output current V
Off-state output current V
Off-state output current
Off-state output current
OUT
= 1 A; V
I
OUT
Off-state; V V
= V
IN
OUT
Off-state; V
= V
V
IN
OUT
On-state; V
=0A
I
OUT
= V
IN
OUT
= 0V; V
IN
V
= V
IN
OUT
Tj=125°C
= V
V
IN
OUT
=25°C
T
j
> 8 V
CC
= 13 V;
CC
= 0 V
= 13 V;
CC
= 0 V; Tj = 25 °C
= 13 V; V
CC
IN
= 5 V;
12 40 µA
12 25 µA
= 0 V 0 50 µA
= 3.5 V -75 0 µA
OUT
= 0V; V
= 0V; V
CC
CC
= 13 V;
= 13 V;
160 320mΩmΩ
57mA
A
A
8/28 Doc ID 17387 Rev 1
VNQ810P-E Electrical specifications

Table 6. Protections

(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
T
t
V
demag
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

Tabl e 7. VCC - output diode

Shutdown temperature 150 175 200 °C
TSD
T
Reset temperature 135 °C
R
Thermal hysteresis 7 15 °C
hyst
Status delay in overload
SDL
conditions
Current limitation
I
lim
Turn-off output clamp voltage I
diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
> T
T
j
TSD
V
= 13 V 3.5 5 7.5 A
CC
5.5 V < V
= 1A; L = 6mH VCC-41 VCC-48 VCC-55 V
OUT
< 36 V 7.5 A
CC
20 µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V

Table 8. Status pin

Forward on voltage -I
F
= 0.5 A; Tj = 150 °C - - 0.6 V
OUT
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
LSTAT
C
V
Table 9. Switching (V
Status low output voltage I
STAT
STAT
Status leakage current Normal operation; V
Status pin Input capacitance Normal operation; V
STAT
I
Status clamp voltage
SCL
CC
= 13V)
STAT
I
STAT
= 1.6mA 0.5 V
= 5 V 10 µA
STAT
= 5 V 100 pF
STAT
= 1 mA 6 6.8 8 V
= - 1 mA -0.7 V
Symbol Parameter Test conditions Min. Typ. Max. Unit
= 13 Ω from VIN rising edge
R
t
d(on)
t
d(off)
dV
/dt
OUT
dV
/dt
OUT
Turn-on delay time
Turn-off delay time
Turn-on voltage slope
(on)
Turn-off voltage slope
(off)
L
to V
R edge to V
R to V
R to V
= 1.3 V
OUT
= 13 Ω from VIN falling
L
= 13 Ω from V
L
OUT
= 13 Ω from V
L
OUT
= 11.7 V
OUT
= 10.4 V
= 1.3 V
OUT
OUT
= 1.3 V
= 11.7 V
-30 -µs
-30 -µs
See
-
-
Figure 10
See
Figure 12
-V/µs
-V/µs
Doc ID 17387 Rev 1 9/28
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