®
VNQ600A
QUAD CHAN NEL HIGH SIDE SOLID STATE RELAY
TYPE R
DS(on)
(*) I
lim
V
CC
VNQ600A 35mΩ 25A 36 V
(*) Per each channel
■ DC SHORT CIRCUIT CURRENT: 25A
■ CMOS COMPATIBLE INPUTS
■ PROPORTIONAL LOAD CURRENT SENSE
■ UNDERVOLTAGE & OVERVOLTAGE
SHUT-DOWN
n
■ OVERVOLTAGE CLAMP
■ THERMAL SHUT-DOWN
■ CURRENT LIMITATION
■ VERY LOW STAND-BY POWER DISSIPATION
■ PROTECTION AGAINST:
LOSS OF GROUND & LOSS OF VCC
n
■ REVERSE BATTERY PROTECTION (**)
SO-28 VNQ600A VNQ600A13TR
package. The VND600 is a monolithic device
designed in| STMicroelectronics VIPower M0-3
Technology. The VNQ600A is intended for driving
any type of multiple loads with one side connected
to ground. This device has four independent
SO-28 (DOUBLE ISLAND)
ORDER CODES
PACKAGE TUBE T&R
channels and four analog sense outputs which
deliver currents proportional to the outputs
DESCRIPTION
The VNQ600A is a quad HSD formed by
assembling two VND600 chips in the same SO-28
currents. Active current limitation combined with
thermal shut-down and automatic restart protect
the device against overload . Device auto mati call y
turns off in case of ground pin disconnection.
ABSOLUTE MAXIMUM RATING
Symbol Parameter Value Unit
V
-V
I
OUT
I
I
V
CSENSE
I
GND
V
ESD
E
MAX
P
T
T
Supply voltage ( continuous) 41 V
CC
Reverse supply voltage (continuous) -0.3 V
CC
Output current ( continuo us), for each channel 15 A
Reverse output current (continu ous), for each channel -15 A
R
Input current +/- 10 mA
IN
Current sense maximum voltage
Ground current at T
< 25°C (continuous) -200 mA
pins
-3
+15
Electro static Discharge ( Human Body M odel: R=1.5KΩ; C=100pF)
- INPUT
- CURRENT SENSE
- OUTPUT
- V
CC
Maxim u m Sw itchin g En ergy
(L=0.11m H ; R
Power dissipation (per island) at T
tot
Junction operat ing temperature Internally Limited ° C
j
Storage temperature -55 to 150 °C
stg
=0Ω; V
L
=13.5V ; T
bat
=150ºC ; IL=40A)
jstart
=25°C 6.25 W
lead
4000
2000
5000
5000
126 mJ
V
V
V
V
V
V
(**) See app lication sch em atic at page 9.
June 20 03 1/18
VNQ600A
BLOCK DIAGRAM
OVERVOLTAGE
UNDERVOLT AGE
1,2
V
CC
INPUT 1
INPUT 2
GND 1,2
INPUT 3
INPUT 4
GND 3,4
OVERTEMP. 1
OVERTEMP. 2
OVERTEMP. 3
OVERTEMP. 4
LOGIC
LOGIC
DRIVER 1
I
OUT1
DRIVER 2
I
OUT2
OVERVOLT AGE
UNDERVOLTAGE
DRIVER 3
I
OUT3
DRIVER 4
I
OUT4
DEMA G 1
I
LIM1
K
DEMAG 2
I
LIM2
K
DEMAG 3
I
LIM3
K
DEMAG 4
I
LIM4
K
OUTPUT 1
CURRENT
SENSE 1
OUTPUT 2
CURRENT
SENSE 2
3,4
V
CC
OUTPUT 3
CURRENT
SENSE 3
OUTPUT 4
CURRENT
SENSE 4
2/18
CURRENT AND VOLTAGE CO NVENTIONS
I
VNQ600A
S1,2
I
IN1
SENSE3
V
IN4
I
SENSE1
I
IN2
I
SENSE2
I
IN3
I
SENSE3
I
IN4
I
SENSE4
V
SENSE4
V
IN1
V
SENSE1
V
IN2
V
SENSE2
V
IN3
V
CONNECTION DIAGRAM ( TOP VIEW)
VCC1,2
GND 1,2
INPUT2
INPUT1
CURRENT
CURRENT SENS E 2
V
CC
V
CC
GND 3,4
INPUT4
INPUT3
CURRENT SE NSE 3
CURRENT SE NSE 4
V
CC
SENSE 1
1,2
3,4
3,4
V
CC1,2
INPUT1
CUR. SENSE1
INPUT2
CUR. SENSE2
INPUT3
CUR. SENSE3
INPUT4
CUR. SENSE4
GND
1,2
1
14 15
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
I
GND1,2
V
CC3,4
GND
V
CC3,4
V
CC1,2
I
S3,4
I
OUT1
I
OUT2
I
OUT3
V
OUT3
I
OUT4
V
OUT4
3,4
I
GND3,4
28
V
1,2
CC
V
OUT2
V
OUT1
OUTPUT 1
OUTPUT 1
OUTPUT 1
OUTPUT 2
OUTPUT 2
OUTPUT 2
OUTPUT 3
OUTPUT 3
OUTPUT 3
OUTPUT 4
OUTPUT 4
OUTPUT 4
V
3,4
CC
3/18
VNQ600A
THERMAL DATA (Per island)
Symbol Parameter Value Unit
R
thj-lead
R
thj-amb
R
thj-amb
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at leas t 35µ m thick) connected to all VCC pins.
Horizontal mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C; unless otherwise specified)
(Per each channel)
POWER
Symbol Parame ter Test Conditions Min Typ Max Uni t
(**) Operating supply voltage 5.5 13 36 V
V
CC
(**) Undervoltage sh ut-down 3 4 5.5 V
V
USD
(**) Overvolta ge shut-down 36 V
V
OV
R
ON
V
clamp
I
(**) Supply cu rrent
S
I
L(off1)
I
L(off 2)
I
L(off 3)
I
L(off4)
Ther m al re si s ta nce Junction-lead 20 °C/W
Thermal resistan ce Junction-ambient (one chip ON) 60 (*) °C/W
Thermal resistan ce Junction-ambient (two chips ON ) 46 (*) °C/W
On state res istance
1,2,3,4=5A; Tj=25°C
I
OUT
I
1,2,3,4=5A; Tj=150°C
OUT
I
1,2,3,4=3A; V
OUT
CC
=6V
35
70
120
Clamp Volt age ICC=20mA (see note 1) 41 48 55 V
Off Stat e; V
Off Stat e; V
T
=25°C
j
On State; V
=3.9K Ω
R
SENSE
Off state output current VIN=V
OUT
Off State Output Current VIN=0V; V
Off State Output Current VIN=V
Off State Output Current VIN=V
OUT
OUT
=13V; VIN=V
CC
=13V; VIN=V
CC
OUT
OUT
=0V
=0V;
12
12
=13V; VIN=5V; I
CC
OUT
=0A;
=0V 0 50 µA
=3.5V -75 0 µA
OUT
=0V; Vcc=13V; Tj =125°C 5 µA
=0V; Vcc=13V; Tj =25°C 3 µA
40
25
6
mΩ
mΩ
mΩ
µA
µA
mA
SWITCHING (VCC=13V)
Symbol Parameter Test Conditions Min Typ Max Unit
t
D(on)
t
D(off)
/dt)onTurn-on voltage slope R1=2.6Ω channels 1,2,3,4 ( see fig. 1) 0.20 V/µs
(dV
OUT
/dt)
(dV
OUT
Turn-on del a y time R1=2.6Ω channels 1,2,3,4 ( see fig. 1) 40 µs
Turn-off delay time R1=2.6Ω channels 1,2,3,4 (see fig. 1) 40 µs
Turn-off voltage slope R1=2.6Ω channels 1,2,3,4 ( see fig. 1) 0.20 V/µs
off
PROTECTIONS
Symbol Parameter Te st Conditions Mi n Typ Max Unit
I
lim
T
TSD
T
R
T
hyst
V
demag
V
ON
(**) Per island
=13V
V
DC Short circuit current
CC
5.5V<V
CC
<36V
Thermal shut-down
temper ature
Thermal reset
temper ature
Thermal hysteresis 7 15 °C
Turn-off output voltage
clamp
Output voltage dr op
limitation
I
=2A; L= 6m H VCC-41 VCC-48 VCC-55 V
OUT
=0.5A; Tj= -40°C.. .+150°C 50 mV
I
OUT
25 40 70
70
150 175 200 °C
135 °C
4/18
1
A
A
VNQ600A
CURRENT SENSE (9V < V
< 16V) (See Fig. 3)
CC
Symbol Parameter Test Conditions Min Typ Max Unit
I
K
dK
1/K1
K
dK2/K
K
dK3/K
V
SENSE1,2
V
SENSEH
1
2
3
I
OUT/ISENSE
Current Sense Ratio Drift
I
OUT/ISENSE
Current Sense Ratio Drift
2
I
OUT/ISENSE
Current Sense Ratio Drift
3
Max analog sense output
voltage
Analog sense output voltage in
overtemperature condition
Analog Sense Output
R
VSENSEH
t
DSENSE
Impeda nce in
Overtem peratur e Condition
Current sense delay response to 90% I
=0.35A ; V
OUT1,2
T
= -40°C. .. +150°C
j
I
or I
OUT1
V
SENSE
open; Tj= -40°C...150° C
I
=2A; V
OUT
T
= 25°C...+150°C
j
or I
I
OUT1
other channels open;
T
=-40°C...150°C
j
I
=4A; V
OUT
T
= 25°C...+150°C
j
or I
I
OUT1
=0.5A;
OUT2
=0.5V; other channels
SENSE
=5A; V
OUT2
SENSE
=15A; V
OUT2
other channels open;
=-40°C...150°C
T
j
=5.5V; I
V
CC
R
SENSE
V
CC
R
SENSE
VCC=13V; R
=10KΩ
>8V; I
=10KΩ
OUT1,2
OUT1,2
SENSE
VCC=13V; Tj>T
open
(see note 2) 500 µs
SENSE
=0.5V;
SENSE
3300 4350 6000
-10 +10 %
=2.5V; Tj=-40°C
=4V;
SENSE
3900
4150
4850
4850
6000
5800
-6 +6 %
=4V; Tj=-40°C
=4V;
SENSE
4150
4400
4900
4900
6000
5750
-6 +6 %
=2A;
=4A;
2
4
=3.9K Ω 5V
; All channels
TSD
400 Ω
V
V
LOGIC INPUT
Symbol Parameter Test Conditions Min Typ Max Unit
V
IL
V
IH
V
I(hyst)
I
IL
I
IH
V
ICL
Note 1: V
clamp
Note 2: current sense signal delay after pos itive input sl ope.
Note: Sense pin doesn’t have to be left float ing.
Low level input voltage 1.25 V
High level input voltage 3.25 V
Input hysteres is voltag e 0.5 V
Low level input current VIN=1.25V 20 65 µA
High level input current VIN=3.25V 75 110 µA
=1mA
I
Input clamp voltage
and VOV are correlated. Typical difference is 5V.
IN
I
= -1mA
IN
66.8
-0.7
8V
V
5/18
2
TRUTH TABLE (per channel)
CONDITIONS INPUT OUTPUT SENSE
Normal op eration
Overtemperature
Undervoltage
Overvoltage
Short circuit to GND
Short circuit to V
Negative output voltage
clamp
CC
VNQ600A
L
H
L
H
L
H
L
H
L
H
H
L
H
LL 0
L
H
L
L
L
L
L
L
L
L
L
(T
j<TTSD
(T
j>TTSD
H
H
0
Nominal
0
V
SENSEH
0
0
0
0
0
) 0
) V
SENSEH
0
< Nomin a l
6/18
VNQ600A
ELECTRICAL TRANS IENT REQUIREMENTS
ISO T/R
7637/1
Test Pulse
1 -25V -50V -75V -100V 2ms, 10 Ω
2 +25V +50V +75V +100V 0.2ms, 10Ω
3a -25V -50V -100V -150V 0.1 µ s, 50Ω
3b +25V +50V +75V + 100V 0.1µs, 50Ω
4 -4V -5V -6V -7V 100ms, 0.01Ω
5 +26.5V +46.5V +66.5V +86.5V 400ms, 2Ω
Test LevelsITest Le velsIITest Levels
Test Levels
III
IV
Test Levels
Delays and Impedance
ISO T/R
7637/1
Test Levels ResultITest Levels ResultIITest Levels Result
Test Pulse
1 CC CC
2CCCC
3a CCCC
3b CCCC
4CCCC
5CEEE
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
E
One or more function s of the devi ce is not performe d as designed after exposure and cannot be
returned to proper operati on without replaci ng the device.
Figur e 1: Switching Characteristics (Resistive load RL=2.6Ω)
V
OUT
80%
dV
/dt
OUT
(on)
10%
I
SENSE
t
r
90%
t
f
dV
OUT
Test Levels Result
III
/dt
(off)
IV
t
7/18
1
INPUT
t
d(on)
90%
t
DSENSE
t
d(off)
t
t
Figure 2: Waveforms (per each chip)
INPUT
n
LOAD CURRENT
SENSE
n
V
CC
INPUT
n
LOAD CURREN T
SENSE
n
V
CC
INPUT
n
LOAD CURRENT
SENSE
n
n
V
USD
n
V
VCC < V
n
VNQ600A
NORMAL OPERATION
UNDERVOLTA GE
V
USDhyst
OVERVOLT AGE
OV
VCC > V
OV
OV
INPUT
n
LOAD CURRENT
LOAD VOLTAGE
SENSE
n
INPUT
n
LOAD VOLTAGE
LOAD CURRENT
SENSE
n
T
j
INPUT
n
LOAD CURREN T
SENSE
n
SHORT TO GROU ND
n
n
SHORT TO V
n
n
<Nominal
T
TSD
T
R
n
OVERTEMPERATURE
CC
<Nominal
I
SENSE
=
V
SENSEH
R
SENSE
8/18
VNQ600A
APPLICATION SCHEMAT IC
+5V
R
prot
R
prot
R
prot
µ
C
R
prot
R
prot
R
prot
R
prot
R
prot
INPUT1
C. SENSE 1
INPUT2
C. SENSE 2
INPUT3
C. SENSE 3
INPUT4
C. SENSE 4
GND1,2
V
CC1,2
V
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
GND3,4
CC3,4
D
ld
R
SENSE1,2,3,4
V
Note: Channels 3 & 4 h ave the same internal circuit as channel 1 & 2 .
will
and the status output values. This shift will vary
depending on how man y devic es are ON in the ca se of
several high side drivers s haring the same R
If the calculated power dissipation leads to a large resistor
or seve ral de vic es have to s hare t he s ame r esisto r then
the ST suggests to utilize Solution 2 (see below).
Solution 2:
A resistor (R
D
GND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network wi ll produce a shift (
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resi stor net work.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are grea ter tha n the ones sh own in the
ISO T/R 7637/1 table.
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Soluti on 1: Resistor in the ground line (R
can be us ed with any t ype of load.
The fo llowin g is an indicati on on how to dimen sion the
resistor.
R
GND
1) R
2) R
where -I
be found in the absolute maximum rating section of the
≤ 600mV / 2(I
GND
≥ (−VCC) / (-I
GND
is the DC re vers e grou nd pi n cu rren t an d can
GND
GND
S(on)max
)
).
device’s datasheet.
Power Dissipation in R
battery situations) is:
= (-VCC)2/R
P
D
GND
(when VCC<0: during reverse
GND
This resistor can be shared amongst several different
HSD. Please note t ha t the value of this resi s tor should be
calcul ated with form ula (1) wher e I
sum of the maximum on-state currents of the different
S(on)max
devices.
Please note that if the microprocessor ground is not
common with the device ground then the R
produce a shift (I
S(on)max
* R
) in the input thresholds
GND
only). This
GND
becomes t he
GND
R
GND
GND
A diode (D
GND
if the devi ce will be driving a n inducti ve load.
D
GND
) in the gro und line.
GND
=1kΩ) should be inserted in parallel to
j
600mV) in t he
GND
.
9/18
1
VNQ600A
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (R
in line to prevent the µC I/Os pins to latch-up.
The v alu e of t he se resistors is a comp ro m ise betw een the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
≤ R
-V
CCpeak/Ilatchup
Figure 3: I
I
OUT/ISENSE
OUT/ISENSE
≤ (V
prot
versus I
OHµC-VIH-VGND
OUT
) / I
prot
IHmax
6500
6000
5500
max.Tj=25. ..150° C
5000
4500
min.Tj=25 ...1 50 °C
Calculation example:
For V
CCpeak
5kΩ ≤ R
)
Recommended R
= - 100V an d I
≤ 6kΩ.
prot
value is 5kΩ.
prot
≥ 20mA; V
latchup
max.Tj=-40°C
typical value
OHµC
≥ 4.5V
4000
min.Tj=-40°C
3500
3000
0246810121416
I
(A)
OUT
10/18
VNQ600A
Off State Output Current
IL(off1) (uA)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Off state
Vcc=36V
Vin=Vout=0V
Tc (°C)
Input Clamp Voltage
Vicl (V)
8
7.8
7.6
7.4
7.2
7
6.8
6.6
6.4
6.2
6
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
High Level Input Current
Iih (uA)
5
4.5
3.5
2.5
1.5
0.5
Vin=3.25V
4
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175
Input High Level
Vih (V)
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
-50 -25 0 25 50 75 100 125 150 175
Input Hysteresis VoltageInput Low Level
Tc (°C)
Tc (°C)
Vil (V)
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
11/18
Vhyst (V)
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50 -25 0 25 50 75 100 125 150 1 75
Tc (°C)
Overvoltage Shutdown
I
LIM
Vs T
VNQ600A
case
Vov (V)
50
48
46
44
42
40
38
36
34
32
30
-50 -25 0 25 50 75 100 125 150 175
Ilim (A)
80
70
60
50
40
30
20
10
0
Vcc=13V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Turn-on Voltage Slope Turn-off Voltage Slope
dVout/dt(on) (V/ms)
750
700
650
600
550
500
450
400
350
300
250
Vcc=13V
Rl=2.6Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
dVout/dt(off) (V/ms)
500
450
400
350
300
250
200
150
100
50
Vcc=13V
Rl=2.6Ohm
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Tc (ºC)
On State Resistance Vs T
case
Ron (mOhm)
100
90
80
70
60
50
40
30
20
10
0
-75 -50 -25 0 25 50 75 100 125 150 175
Iout=5A
Vcc=8V & 36V
Tc (°C)
On State Resistance Vs V
CC
Ron (mOhm)
80
70
60
50
40
30
20
10
0
5 10152025303540
Iout=5A
Tc= 150°C
Tc= 25°C
Tc= - 40°C
Vcc (V)
12/18
Maximum turn off current versus load inductance
LMAX (A)
I
100
10
VNQ600A
A
B
C
1
0.001 0.01 0.1 1 10 100
A = Single Pulse at T
B= Repetitive pulse at T
C= Repetitive Pulse at T
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, T
the temperature specified above for curves B and C.
VIN, I
L
=150ºC
Jstart
=100ºC
Jstart
=125ºC
Jstart
jstart
Demagnetization
(at beginning of each demagnetization) of every pulse must not exceed
L(mH)
Demagnetization
Demagnetization
t
13/18
VNQ600A
SO-28 DOUBLE ISLAND THERMAL DAT A
SO-28 Double island PC Board
Layout conditio n of Rth and Zth measur ements (P CB FR4 area= 58mm x 58mm , PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.5cm
2
, 3cm2, 6cm2).
Thermal calculation according to the PCB heatsink area
Chip 1 Chip 2 T
ON OFF R
OFF ON R
ON ON R
ON ON (R
R
= Thermal resistance Junction to Ambient with one chip ON
thA
= Thermal resistance Junction to Ambient with both chips ON and P
R
thB
R
= Mutual thermal resistan ce
thC
R
Vs PCB copper area in open box free air condition
thj-amb
thA
thC
thB
thA
x P
x P
x (P
x P
dchip1
dchip2
dchip1
dchip1
+ T
+ T
+ P
) + R
jchip1
amb
amb
dchip2
thC
) + T
x P
amb
dchip2
+ T
amb(RthA
R
thC
R
thA
R
thB
RTHj_amb
(°C/W)
70
60
50
40
30
x P
dchip1
x P
dchip2
x (P
dchip1
x P
dchip2
dchip1=Pdchip2
T
+ T
+ T
+ P
) + R
jchip2
amb
amb
dchip2
thC
x P
) + T
dchip1
amb
+ T
ambPdchip1≠Pdchip2
R
thA
R
thB
Note
P
dchi p1=Pdchi p2
14/18
20
R
thC
10
01234567
PCB Cu heatsink area (cm^2)/island
SO-28 Thermal Impedance Junction Ambient Single Pulse
Zth(°C/W)
100
10
1
0.1
VNQ600A
0,5 cm^2/island
3 cm^2/island
6 cm^2/island
One chann el ON
Two channel s
ON on same chip
0.01
0.0001 0.001 0.01 0.1 1 10 100 1000
time(s)
Thermal fitting model of a four channels HSD
in SO-28
Tj_1
Pd1
Tj_2
Pd2
Tj_3
Pd3
Tj_4
Pd4
C1
C13 C14
R13
C7
C15 C16
R15
R14
R16
C8
C3 C4
R3R1 R6R5R2
R17 R18
C9
R9R7 R12R11R8
T_amb
C5 C6C2
R4
C10
C11 C12
R10
Pulse calculation formula
Z
THδ
where
RTHδ Z
δ tpT⁄=
Thermal Paramet er
Area/i sland (cm2)0.56
R1=R7= R13=R15 (°C/W) 0.05
R2=R8= R14=R16 (°C/W) 0.3
R3=R9 (°C/W) 3.4
R4=R10 (°C/W) 11
R5=R11 (°C/W) 15
R6=R12 (°C/W) 30 13
C1=C7=C13=C15 ( W.s/°C) 0.001
C2=C8=C14=C16 ( W.s/°C) 5.00E-03
C3=C9 ( W.s/°C) 1.00E-02
C4=C10 (W.s/°C ) 0.2
C5=C11 (W.s/°C ) 1.5
C6=C12 (W.s/°C ) 5 8
R17=R18 (°C/W) 150
THtp
1 δ–()+⋅=
15/18
SO-28 MECHANICAL DATA
VNQ600A
DIM.
A2.650.104
a1 0.10 0.30 0.004 0.012
b 0.35 0.49 0.013 0.019
b1 0.23 0.32 0.009 0.012
C 0.50 0.020
c1 45 (typ.)
D 17.7 18.1 0.697 0.713
E 10.00 10.65 0.393 0.419
e 1.27 0.050
e3 16.51 0.650
F 7.40 7.60 0.291 0.299
L 0.40 1.27 0.016 0.050
S 8 (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
16/18
2
VNQ600A
SO-28 TUBE SHIPMENT (no suffix)
Base Q.ty 28
Bulk Q.ty 700
C
A
B
TAPE AND REEL SHIPMENT (suf fix “13TR”)
Tube length (± 0.5) 532
A 3.5
B 13.8
C (± 0.1) 0.6
All dimensions are in mm.
REEL DIMENSIONS
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
TAPE DIMENSIONS
According to Elec tronic Industrie s Association
(EIA) S tandard 481 rev. A, Feb 19 86
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
All dimensions ar e in mm.
Top
cover
tape
End
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Start
No componentsNo components Components
500mm min
17/18
VNQ600A
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18/18
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