ST VNQ5E250AJ-E User Manual

Quad channel high-side driver with analog current sense

Features

Max supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off-state supply current I

1. Typical value with all loads connected.

■ General

– Inrush current active management by

power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliant with European directive

2002/95/EC
– Very low current sense leakage

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off-state open-load detection
– Output short to V

detection

CC

– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

CC

CC

ON

LIMH

S

4 to 28 V

41 V

250 mΩ

5A

(1)

2µA

VNQ5E250AJ-E

for automotive applications

PowerSSO-16

– Overtemperature shutdown with auto

restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection

Applications

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

■ Suitable as relays driver

Description

The VNQ5E250AJ-E is a quad channel high-side
driver manufactured using ST proprietary
VIPower™ M0-5 technology and housed in
PowerSSO-16 package. The device is designed
to drive 12 V automotive grounded loads, and to
provide protection and diagnostics. It also
implements a 3 V and 5 V CMOS compatible
interface for the use with any microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto­restart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel providing enhanced diagnostic
functions including fast detection of overload and
short-circuit to ground through power limitation
indication, overtemperature indication, short­circuit to V
open-load detection. The current sensing and
diagnostic feedback of the whole device can be
disabled by pulling the CS_DIS pin high to share
the external sense resistor with similar devices.

diagnosis and on-state and off-state

CC

November 2010 Doc ID 17360 Rev 2 1/37

www.st.com

1

Contents VNQ5E250AJ-E

Contents

1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.1 Short to VCC and off-state open load detection . . . . . . . . . . . . . . . . . . . 27

3.5 Maximum demagnetization energy (VCC=13.5V) . . . . . . . . . . . . . . . . . . 28

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 PowerSSO-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 PowerSSO-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37 Doc ID 17360 Rev 2

VNQ5E250AJ-E List of tables

List of tables

Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 6. Switching (V

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8 V < V
Table 10. Open-load detection (8 V < V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 16. PowerSSO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

= 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 17360 Rev 2 3/37

List of figures VNQ5E250AJ-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of output current and rising edge of current

sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. I

OUT/ISENSE

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

J

Figure 17. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input high-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On-state resistance vs T
Figure 24. On-state resistance vs V

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. I

LIMH

vs T

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28

Figure 35. PowerSSO-16 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 29

Figure 37. PowerSSO-16 thermal impedance junction ambient single pulse (one channel on) . . . . . 30

Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-16 . . . . . . . . . . . . . . . . . . . 31

Figure 39. PowerSSO-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. PowerSSO-16 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. PowerSSO-16 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

vs I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

OUT

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4/37 Doc ID 17360 Rev 2

VNQ5E250AJ-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V

CC

Signal Clamp

Undervoltage

IN1

IN2

IN3

IN4

CS_
DIS

CS1

CS2

CS3

CS4

Table 1. Pin functions

LOGIC

Control & Diagnostic 1

DRIVER

Over

temp.

V

SENSEH

OVERLOAD PROTECTION

(ACTIVE POWER LIMITATION)

Current

Limitation

Current

Sense

Power
Clamp

V

ON

Limitation

OFF State
Open load

Name Function

V

CC

OUTPUT

GND

Battery connection.

Power output.

n

Ground connection. Must be reverse battery protected by an external
diode/resistor network.

CH 1

GND

CH 4

CH 3

Channels 2, 3 & 4

CONTROL & DIAGNOSTIC

CH 2

OUT4

OUT3

OUT2

OUT1

INPUT

n

CURRENT

SENSE

n

Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.

Analog current sense pin, delivers a current proportional to the load current.

CS_DIS Active high CMOS compatible pin, to disable the current sense pin.

Doc ID 17360 Rev 2 5/37

Block diagram and pin configuration VNQ5E250AJ-E

Figure 2. Configuration diagram (top view)

CURRENT SENSE4

INPUT4

CURRENT SENSE3

INPUT3

CURRENT SENSE2

INPUT2

CURRENT SENSE1

INPUT1

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

GND
CS_DIS
N.C.

OUTPUT4
OUTPUT3
OUTPUT2

OUTPUT1

N.C.

TAB=Vcc

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1 kΩ

resistor

X Not allowed

Through 10 kΩ

resistor

Through

10 kΩ resistor

6/37 Doc ID 17360 Rev 2

VNQ5E250AJ-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

CC

I

CSD

V

CSD

I

INn

V

INn

CS_DIS

INPUTn

GND

OUTPUTn

CURRENT

S

ENSEn

I

GND

I

SENSEn

V

SENSEn

V

Fn

I

OUTn

V

OUTn

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

I

GND

I

OUT

-I

OUT

I

I

CSD

I

CSENSE

V

CSENSE

E

MAX

DC supply voltage 41 V

CC

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

DC output current

Reverse DC output current 5 A

DC input current -1 to 10 mA

IN

DC current sense disable input current -1 to 10 mA

DC reverse CS pin current 200 mA

Current sense maximum voltage

Maximum switching energy (single pulse)
(L = 36 mH; R

I

= I

limL

(Typ.))

OUT

=0Ω; V

L

=13.5V; T

bat

jstart

=150°C;

Internally

limited

VCC-41

+V

CC

39 mJ

A

V
V

Doc ID 17360 Rev 2 7/37

Electrical specifications VNQ5E250AJ-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge (human body model: R=1.5KΩ; C=100pF)

4000
2000
4000
5000
5000

V
V
V
V
V

V

V

T

– Input
– Current sense

ESD

–CS_DIS
– Output
–V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

ESD

Junction operating temperature -40 to 150 °C

T

j

Storage temperature -55 to 150 °C

stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-amb

R

thj-case

Thermal resistance junction-ambient (MAX) See Figure 36 °C/W

Thermal resistance junction-case (MAX) 4.5 °C/W

8/37 Doc ID 17360 Rev 2

VNQ5E250AJ-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8 V < VCC<28V, -40°C<Tj< 150 °C, unless
otherwise specified.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

clamp

I

L(off)

1. PowerMOS leakage included.

2. For each channel.

Operating supply voltage 4 13 28 V

CC

Undervoltage shutdown 3.5 4 V

USD

Undervoltage shutdown
hysteresis

On-state resistance

ON

Clamp voltage IS=20 mA 41 46 52 V

I

Supply current

S

Off-state output current

Output - VCC diode

V

F

voltage

(2)

I

=0.5A; Tj=25°C 250 mΩ

OUT

=0.5A; Tj= 150 °C 500 mΩ

I

OUT

I

= 0.5 A; VCC=5V; Tj=25°C 300 mΩ

OUT

Off-state; V
VIN=V

=13V; Tj=25°C;

CC

OUT=VSENSE=VCSD

On-state; VCC=13V; VIN=5V;

=0A

I

OUT

(2)

VIN=V
Tj=25°C

V

IN=VOUT

=0V; VCC=13V;

OUT

=0V; VCC=13V;

Tj=125°C

-I

= 0.5 A; Tj= 150 °C 0.7 V

OUT

=0V

0.5 V

(1)

(1)

5

2

µA

814mA

00.01 3 µA

05µA

Table 6. Switching (VCC=13V; Tj=25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Turn-on delay time RL=26Ω (see Figure 6)— 10 — µs

Turn-off delay time RL=26Ω (see Figure 6)— 8 — µs

/dt)onTurn-on voltage slope RL=26Ω —0.8 —V/µs

/dt)

Turn-off voltage slope RL=26Ω —1 —V/µs

off

Switching energy
losses during t

won

Switching energy
losses during t

woff

RL=26Ω (see Figure 6)— 16 — µJ

RL=26Ω (see Figure 6)— 12 — µJ

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

Doc ID 17360 Rev 2 9/37

Electrical specifications VNQ5E250AJ-E

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

Input low level voltage 0.9 V

IL

Low level input current VIN=0.9V 1 µA

I

IL

Input high level voltage 2.1 V

V

IH

I

High level input current VIN=2.1V 10 µA

IH

V

I(hyst)

V

V

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

Input hysteresis voltage 0.25 V

I

=1mA 5.5 7 V

Input clamp voltage

ICL

CS_DIS low level voltage 0.9 V

CSDL

Low level CS_DIS current V

IN

I

=-1mA -0.7 V

IN

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25 V

I

=1mA 5.5 7 V

CS_DIS clamp voltage

CSCL

CSD

=-1mA -0.7 V

I

CSD

Table 8. Protections and diagnostics

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

=13V 3.5 5 7 A

I

limH

I

limL

T

TSD

T

T

RS

T

HYST

V

DEMAG

V

ON

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

DC short circuit current

Short circuit current
during thermal cycling

Shutdown temperature 150 175 200 °C

Reset temperature

R

Thermal reset of
STATUS

Thermal hysteresis
(T

TSD-TR

)

Turn-off output voltage
clamp

Output voltage drop
limitation

CC

4.5 V < V

=13V; TR<Tj<T

V

CC

I

OUT

<28V 7 A

CC

= 0.5 A; VIN=0;

L=20mH

= 0.015;

I

OUT

Tj= -40 °C...150 °C
(see Figure 8)

TSD

1.25 A

TRS + 1

TRS + 5

135 °C

7°C

VCC-41

VCC-46 VCC-52

25 mV

°C

V

10/37 Doc ID 17360 Rev 2

VNQ5E250AJ-E Electrical specifications

Table 9. Current sense (8 V < VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

K

K

dK

1/K1

K

dK

2/K2

K

dK

3/K3

I

SENSE0

I

0

OUT/ISENSE

I

1

OUT/ISENSE

(1)

Current sense ratio drift

I

2

OUT/ISENSE

(1)

Current sense ratio drift

I

3

OUT/ISENSE

(1)

Current sense ratio drift

Analog sense leakage
current

= 0.025 A;V

OUT

Tj= -40 °C...150 °C 295 500 705

I

= 0.25 A;V

OUT

SENSE

Tj= -40 °C...150 °C

=25°C...150°C

T

j

I

= 0.25 A;V

OUT

= -40 °C...150 °C

T

j

I

=0.5A;V

OUT

= -40 °C...150 °C

T

j

=25°C...150°C

T

j

I

= 0.5 A; V

OUT

= -40 °C...150 °C

T

j

I

=1A; V

OUT

= -40 °C...150 °C

T

j

=25°C...150°C

T

j

I

=1A; V

OUT

= -40 °C...150 °C

T

j

=0A; V

I

OUT

V

=5V; VIN=0V;

CSD

= -40 °C...150 °C

T

j

V

=0V; VIN=5V;

CSD

SENSE

SENSE

SENSE

SENSE

SENSE

SENSE

Tj= -40 °C...150 °C

SENSE

=4V

=4V

=0V;

=0.5V

=0.5V

=4V

=4V

=4V

360

470

595

395

470

568

-9 +9 %

425

485

555

445

485

540

-6 +6 %

465

500

535

475

500

525

-4 +4 %

01µA

02µA

I

OL

V

SENSE

V

SENSEH

I

SENSEH

t

DSENSE1H

Openload ON-state
current
detectionthreshold

Max analog sense
output voltage

Analog sense output
voltage in fault
condition

Analog sense output
current in fault
condition

(2)

(2)

Delay response time
from falling edge of
CS_DIS pin

I

= 0.5 A; V

OUT

V

=5V; VIN=5V;

CSD

SENSE

Tj= -40 °C...150 °C

IN = 5V; 8V<V

V

= 5 µA

I

SENSE

I

= 0.5 A; V

OUT

R

SENSE

=10KΩ

VCC= 13 V; R

= 5 V; R

V

CC

VCC=13V; V

=5V; V

V

CC

V

SENSE

<4V;

0.025 A <I

SENSE

OUT

CC

CSD

SENSE

SENSE

SENSE

<1A;

4.5 V < VCC<18V;
I

=90% of I

SENSE

SENSE max

(see Figure 4)

=0V;

01µA

<18V;

=0V;

0.5 5 mA

5V

= 3.9 KΩ 8

= 3.9 KΩ 4.5

=5V 9

=3.5V 6

40 100 µs

V

mA

Doc ID 17360 Rev 2 11/37

Electrical specifications VNQ5E250AJ-E

Table 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

DSENSE1L

Delay response time
from rising edge of
CS_DIS pin

V

0.025 A < I

4.5 V < VCC<18V;
I

SENSE

SENSE

<4V;

OUT

=10 % of I

<1A;

520µs

SENSE max

(see Figure 4)

t

DSENSE2H

Delay response time
from rising edge of
INPUT pin

V

0.025A < I

4.5 V < V
I

SENSE

SENSE

<4V;

<1A;

OUT

<18V;

CC

=90% of I

50 200 µs

SENSE max

(see Figure 4)

<4V;

SENSE

=90% of I

=90% of I

= 1.5 A (see Figure 7)

<4V;

SENSE

OUT

=10% of I

SENSEMAX

OUTMAX

<1A;

SENSE max

;

15 150 µs

Δt

DSENSE2H

t

DSENSE2L

Delay response time
between rising edge of
output current and rising
edge of current sense

Delay response time
from falling edge of
INPUT pin

V
I

SENSE

4.5 V < VCC<18V;
I

OUT

I

OUTMAX

V

0.025A < I

4.5 V < VCC<18V;
I

SENSE

(see Figure 4)

1. Parameter guaranteed by design; it is not tested.

2. Fault condition includes: power limitation, overtemperature and open load OFF-state detection.

Table 10. Open-load detection (8 V < VCC<18V)

110 µs

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

DSTKON

I

L(off2)

td_vol

V

Open-load off-state voltage

OL

detection threshold

Output short circuit to VCC
detection delay at turn-off

Off-state output current at

= 4 V

V

OUT

Delay response from output
rising edge to V

SENSE

edge in open-load

V

= 0V; 4.5V<VCC<18V 2 - 4 V

IN

See Figure 5 180 - 1200 µs

rising

=0V; V

V

IN

rising from 0 V to 4 V

V

OUT

V

= 4 V; VIN= 0 V

OUT

V

SENSE

= 90 % of V

SENSE

=0V

SENSEH

-120 - 0 µA

-20µs

12/37 Doc ID 17360 Rev 2