ST VNQ5E160K-E User Manual

General

– Inrush current active management by power limitation

– Very low standby current

– 3.0V CMOS compatible inputs

– Optimized electromagnetic emissions

– Very low electromagnetic susceptibility

– In compliance with the 2002/95/EC european directive

VNQ5E160K-E

Quad channel high side driver for automotive applications

Features

Max transient supply voltage	VCC	41V
Operating voltage range	VCC	4.5 to 28V
Max on-state resistance (per ch.)	RON	160 mΩ
Current limitation (typ)	ILIMH	10 A
Off-state supply current	I	2 µA(1)
	S

1. Typical value with all loads connected.

■

PowerSSO-24

Application

■All types of resistive, inductive and capacitive loads

■Diagnostic functions

–Open Drain status output

–On-state open load detection

–Off-state open load detection

–Output short to VCC detection

–Overload and short to ground (power limitation) indication

–Thermal shutdown indication

■Protections

–Undervoltage shut-down

–Overvoltage clamp

–Load current limitation

–Self limiting of fast thermal transients

–Protection against loss of ground and loss of VCC

–Over temperature shutdown with auto restart (thermal shutdown)

–Reverse battery protected (see Application schematic on page 22)

–Electrostatic discharge protection

Description

The VNQ5E160K-E is a quad channel high-side driver manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-24 package.

The VNQ5E160K-E is designed to drive automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS-compatible interface with any microcontroller.

The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over temperature shut-off with auto restart and over-voltage active clamp.

A dedicated active low digital status pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short-circuit to ground, over temperature indication, short-circuit to VCC diagnosis and ON & OFF-state open-load detection.

The diagnostic feedback of the whole device can be disabled by pulling the STAT_DIS pin up, thus allowing wired-ORing with other similar devices.

July 2009

Doc ID 14471 Rev 3

1/34

www.st.com

Contents	VNQ5E160K-E

Contents

1	Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . .		. 5
2	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		7
	2.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
	2.3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	2.4	Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
	2.5	Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
3	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		22
	3.1	GND protection network against reverse battery . . . . . . . . . . . . . . . . . . .	22

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25

4	Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . .		26
	4.1	PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
5	Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		29
	5.1	ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29
	5.2	PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29
	5.3	Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	31
6	Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		32
7	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		33

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VNQ5E160K-E	List of tables

List of tables

Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Status pin (VSD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Openload detection (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 10. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 12. Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 13. Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 14. Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

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List of figures	VNQ5E160K-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 8. Undervoltage shut-down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 9. Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 10. Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11. Open Load with external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 12. Open Load without external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 13. Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 14. TJ evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 15. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 16. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 17. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 18. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 19. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 20. Low level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 21. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 22. High level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 23. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 24. Low level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 25. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 27. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 29. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 30. High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 31. Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 33. Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25 Figure 35. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 36. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 26

Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 27 Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24(1) . . . . . . . . . . . . . . . . . 27

Figure 39. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 40. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

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VNQ5E160K-E	Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

VCC

Signal Clamp
Undervoltage	Control & Diagnostic 1
		Power
		Clamp
IN1	DRIVER
IN2		VON	CH 1		CH 4
IN3		Limitation	CONTROLDIAGNOSTIC&	Channels 2, 3 & 4
	Over	Current
IN4	temp.	Limitation
		OFF State			CH 3
		Open load
ST_
DIS		ON State
		Open load			OUT4
ST1					OUT3
					CH 2
ST2					OUT2
ST3					OUT1
		OVERLOAD PROTECTION
LOGIC	(ACTIVE POWER LIMITATION)
ST4
			GND

	Table 1.	Pin functions
	Name		Function
	VCC		Battery connection.
	OUTPUTn		Power output.
	GND		Ground connection. Must be reverse battery protected by an external diode /
			resistor network.
	INPUTn		Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
			switch state.
	STATUSn		Open drain digital diagnostic pin.
	STAT_DIS		Active high CMOS compatible pin, to disable the STATUS pin.

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Block diagram and pin configuration

VNQ5E160K-E

Figure 2.

Configuration diagram (top view)

VCC

OUTPUT1

1

24

GND

2

23

OUTPUT1

INPUT1

3

22

OUTPUT1

STATUS1

4

21

OUTPUT2

INPUT2

5

20

OUTPUT2

STATUS2

6

19

OUTPUT2

INPUT3

7

18

OUTPUT3

STATUS3

8

17

OUTPUT3

INPUT4

9

16

OUTPUT3

STATUS4

10

15

OUTPUT4

STAT_DIS

11

14

OUTPUT4

VCC

12

13

OUTPUT4

TAB = VCC

Table 2.

Suggested connections for unused and not connected pins

Connection / pin

Status

N.C.

Output

Input

STAT_DIS

Floating

X

X

X

X

X

To ground

Not

X

Not

Through 10kΩ

Through 10kΩ

allowed

allowed

resistor

resistor

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VNQ5E160K-E	Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

IS

VCC

VCC

VFn

ISD

STAT_DIS

OUTPUTn

IOUTn

VSD

VOUTn

IINn

ISTATn

INPUTn

STATUSn

VINn

VSTATn

GND

IGND

Note: VFn = VOUTn - VCC during reverse battery condition.

2.1Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3.	Absolute maximum ratings
Symbol	Parameter	Value	Unit
VCC	DC supply voltage	41	V
- VCC	Reverse DC supply voltage	0.3	V
- IGND	DC reverse ground pin current	200	mA
IOUT	DC output current	Internally limited	A
- IOUT	Reverse DC output current	6	A
IIN	DC input current	+10 / -1	mA
ISTAT	DC status current	+10 / -1	mA
ISTAT_DIS	DC status disable current	+10 / -1	mA
	Maximum switching energy (single pulse)
EMAX	(L= 8 mH; RL=0 Ω; Vbat=13.5 V; Tjstart=150 °C;	36	mJ
	IOUT = IlimL(Typ.))

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Electrical specifications			VNQ5E160K-E
	Table 3.	Absolute maximum ratings
	Symbol	Parameter	Value	Unit
		Electrostatic discharge (Human Body Model: R=1.5KΩ;
		C=100pF)
		– Input	4000	V
	VESD	– Status	4000	V
		– STAT_DIS	4000	V
		– Output	5000	V
		– VCC	5000	V
	VESD	Charge device model (CDM-AEC-Q100-011)	750	V
	Tj	Junction operating temperature	-40 to 150	°C
	Tstg	Storage temperature	- 55 to 150	°C

2.2Thermal data

	Table 4.	Thermal data
	Symbol	Parameter	Max. value	Unit
	Rthj-case	Thermal resistance junction-case (max)	8	°C/W
		(with one channel on)
	Rthj-amb	Thermal resistance junction-ambient (max)	See Figure 36	°C/W

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VNQ5E160K-E	Electrical specifications

2.3Electrical characteristics

Values specified in this section are for 8V<VCC<28V; -40°C< Tj <150°C, unless otherwise stated.

Table 5.	Power section
Symbol	Parameter				Test conditions	Min.	Typ.	Max.	Unit
VCC	Operating supply voltage					4.5	13	28	V
VUSD	Undervoltage shut-down						3.5	4.5	V
VUSDhyst	Undervoltage shut-down						0.5		V
	hysteresis
	On-state resistance(1)		IOUT=1A; Tj=25°C					160	mΩ
R			I	OUT	=1A; T =150°C			320	mΩ
ON					j
			IOUT=1A; VCC=5V; Tj=25°C					210	mΩ
Vclamp	Clamp voltage		IS = 20 mA			41	46	52	V
			Off-state; VCC=13V; VIN=VOUT=0V;				2(2)	5(2)	µA
IS	Supply current		Tj=25°C
			On-state; VIN=5V; VCC=13V;
			IOUT=0A				8	14	mA
IL(off1)		(1)	VIN=VOUT=0V; VCC=13V; Tj=25°C			0	0.01	3	µA
	Off-state output current		VIN=VOUT=0V; VCC=13V; Tj=125°C			0		5	µA
VF	Output - V	diode	-IOUT=0.6A; Tj=150°C					0.7	V
	(1)	CC
	voltage

1.For each channel.

2.PowerMOS leakage included.

Table 6.

Switching (VCC = 13V; Tj = 25°C)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

td(on)

Turn-on delay time

RL= 13Ω (see Figure 6.)

15

µs

td(off)

Turn-off delay time

RL= 13Ω (see Figure 6.)

15

µs

dVOUT/dt(on)

Turn-on voltage

RL= 13Ω

See

V/µs

slope

Figure 26.

dVOUT/dt(off)

Turn-off voltage

RL= 13Ω

See

V/µs

slope

Figure 28.

WON

Switching energy

RL= 13Ω (see Figure 6.)

0.05

mJ

losses during twon

WOFF

Switching energy

RL= 13Ω (see Figure 6.)

0.03

mJ

losses during twoff

Table 7.

Status pin (VSD=0)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VSTAT

Status low output

ISTAT= 1.6 mA, VSD=0V

0.5

V

voltage

ILSTAT

Status leakage current

Normal operation or VSD=5V,

10

µA

VSTAT= 5V

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Electrical specifications

VNQ5E160K-E

Table 7.

Status pin (VSD=0)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

CSTAT

Status pin input

Normal operation or VSD=5V,

100

pF

capacitance

VSTAT= 5V

VSCL

Status clamp voltage

ISTAT = 1mA

5.5

7

V

ISTAT = -1mA

-0.7

V

Table 8.

Protection(1)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

IlimH

DC short circuit

VCC=13V; 5V<VCC<28V

7

10

14

A

current

14

A

IlimL

Short circuit current

VCC=13V; TR<Tj<TTSD

2.5

A

during thermal cycling

TTSD

Shutdown

150

175

200

°C

temperature

TR

Reset temperature

TRS + 1

TRS + 5

°C

TRS

Thermal reset of

135

°C

STATUS

THYST

Thermal hysteresis

7

°C

(TTSD-TR)

tSDL

Status delay in

Tj>TTSD (see Figure 4.)

20

µs

overload conditions

V

DEMAG

Turn-off output voltage

I

=1A; V =0; L=20mH

V -41

V -46

V -52

V

clamp

OUT

IN

CC

CC

CC

VON

Output voltage drop

IOUT=0.03A (see Figure 5.)

25

mV

limitation

Tj= -40°C...+150°C

1.To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.

Table 9.	Openload detection (8V<VCC<18V)
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
IOL	Openload on-state	VIN = 5V	10		40	mA
	detection threshold
tDOL(on)	Openload on-state	IOUT = 0A, VCC=13V			200	µs
	detection delay	(see Figure 4.)
	Delay between INPUT
tPOL	falling edge and	IOUT = 0A (see Figure 4.)	200	500	1200	µs
	STATUS rising edge in
	Openload condition
	Openload off-state
VOL	voltage detection	VIN = 0V	2		4	V
	threshold
	Output short circuit to
tDSTKON	Vcc detection delay at	See Figure 4.	180		tPOL	µs
	turn-off

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Doc ID 14471 Rev 3

VNQ5E160K-E

Electrical specifications

Table 9.

Openload detection (8V<VCC<18V)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

IL(off2)

Off-state output

VIN= 0V; VOUT= 4V

-75

0

µA

(see Section 3.4: Open-load

current

(1)

detection in off-state)

Delay response from

td_vol

output rising edge to

VIN= 0V; VOUT= 4V

20

µs

STATUS falling edge in

open load

1. For each channel.

Table 10.

Logic input

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VIL

Input low level

0.9

V

IIL

Low level input current

VIN = 0.9V

1

µA

VIH

Input high level

2.1

V

IIH

High level input current

VIN = 2.1V

10

µA

VI(hyst)

Input hysteresis voltage

0.25

V

VICL

Input clamp voltage

IIN = 1mA

5.5

7

V

IIN = -1mA

-0.7

V

VSDL

STAT_DIS low level voltage

0.9

V

ISDL

Low level STAT_DIS current

VSD=0.9V

1

µA

VSDH

STAT_DIS high level voltage

2.1

V

ISDH

High level STAT_DIS current

VSD=2.1V

10

µA

VSD(hyst)

STAT_DIS hysteresis voltage

0.25

V

VSDCL

STAT_DIS clamp voltage

ISD=1mA

5.5

7

V

ISD=-1mA

-0.7

V

Doc ID 14471 Rev 3

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