ST VNQ5E160AK-E User Manual

Quad channel high side driver with analog current sense

Features

Max supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off state supply current I

1. Typical value with all loads connected.

■ General

– Inrush current active management by

power limitation
– Very low stand-by current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

european directive
– Very low current sense leakage

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off state openload detection
– Output short to Vcc detection
– Thermal shutdown indication
– Overload and short to ground (power

limitation) indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

– Over-temperature shutdown with

autorestart (thermal shutdown)
– Reverse battery protected (see Figure 32)

CC

CC

ON

LIMH

S

4.5 to 28 V

160 mΩ

2 µA

41V

10 A

(1)

VNQ5E160AK-E

for automotive applications

PowerSSO-24

– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VNQ5E160AK-E is a double channel high­side driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-24 package. The VNQ5E160AK-E is
designed to drive 12V automotive grounded loads
delivering protection, diagnostics and easy 3V
and 5V CMOS compatible interface with any
microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with
auto-restart and over-voltage active clamp. A
dedicated analog current sense pin is associated
with every output channel in order to provide
Ehnanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication, over­temperature indication, short-circuit to Vcc
diagnosis and on & off state open load detection.

The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.

March 2009 Rev 2 1/37

www.st.com

1

Contents VNQ5E160AK-E

Contents

1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 24

3.1.2 Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.1 Short to VCC and off state open load detection . . . . . . . . . . . . . . . . . . 27

3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28

4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37

VNQ5E160AK-E List of tables

List of tables

Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 6. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8V<V
Table 10. Openload detection (8V<V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 16. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

3/37

List of figures VNQ5E160AK-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5. Openload off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of ouput current and rising edge of current sense

(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. Iout/ Isense vs. Iout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. Off-state open load with external circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

J

Figure 17. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On state resistance vs. T
Figure 24. On state resistance vs. V

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. I

LIMH

vs. T

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28

Figure 35. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 29

Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 30

Figure 38. Thermal fitting model of a double channel hsd in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30

Figure 39. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

case

4/37

VNQ5E160AK-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V

CC

Signal Clamp

Undervoltage

IN1

IN2

IN3

IN4

CS_
DIS

CS1

CS2

CS3

CS4

Table 1. Pin functions

LOGIC

Control & Diagnostic 1

DRIVER

Over

temp.

V

SENSEH

(ACTIVE POWER LIMITATION)

Current

Limitation

Current

Sense

OVERLOAD PROTECTION

Power
Clamp

V

ON

Limitation

OFF State
Open load

CH 1

Channels 2, 3 & 4

CONTROL & DIAGNOSTIC

CH 2

GND

Name Function

V

CC

OUTPUT

GND

INPUT

n

CURRENT

SENSE

n

Battery connection

Power output

n

Ground connection. Must be reverse battery protected by an external
diode/resistor network

Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state

Analog current sense pin, delivers a current proportional to the load current

CS_DIS Active high CMOS compatible pin, to disable the current sense pin

CH 4

CH 3

OUT4

OUT3

OUT2

OUT1

5/37

Block diagram and pin configuration VNQ5E160AK-E

Figure 2. Configuration diagram (top view)

V

CC

GND

INPUT1

CURRENT SENSE1

INPUT2

CURRENT SENSE2

INPUT3

CURRENT SENSE3

INPUT4

CURRENT SENSE4

CS_DIS.

V

CC

OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4

TAB = V

CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current Sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1 kΩ

resistor

X Not allowed

Through 10

kΩ resistor

Through 10 kΩ

resistor

6/37

VNQ5E160AK-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

V

CSD

CC

I

CSD

I

INn

V

INn

CS_DIS

INPUTn

GND

OUTPUTn

CURRENT
S

ENSEn

I

GND

I

SENSEn

V

SENSEn

V

Fn

I

OUTn

V

OUTn

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

-I

GND

I

OUT

-I

I

CSD

-I

CSENSE

V

CSENSE

E

DC supply voltage 41 V

CC

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

DC output current Internally limited A

Reverse DC output current 6 A

OUT

DC input current -1 to 10 mA

I

IN

DC current sense disable input current -1 to 10 mA

DC reverse CS pin current 200 mA

Current sense maximum voltage

Maximum switching energy (single pulse)

MAX

(L= 12 mH; R

=0Ω; V

L

=13.5V; T

bat

jstart

=150ºC; I

OUT

= I

limL

(Typ.) )

VCC-41

+V

CC

34 mJ

V
V

7/37

Electrical specifications VNQ5E160AK-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge
(human body model: R= 1.5 KΩ; C= 100 pF)

4000
2000
4000
5000
5000

V
V
V
V
V

V

V

ESD

ESD

T

T

- Input

- Current sense

- CS_DIS

- Output

- V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature -40 to 150 °C

j

Storage temperature -55 to 150 °C

stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case (max)
(with one channel ON)

Thermal resistance junction-ambient (max)

8°C/W

See Figure 36. in the

thermal section

°C/W

8/37

VNQ5E160AK-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8V<VCC<28V, -40°C< Tj <150°C, unless otherwise
stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

clamp

Operating supply voltage 4.5 13 28 V

CC

Undervoltage shutdown 3.5 4.5 V

USD

Undervoltage shutdown
hysteresis

I

= 1A; Tj= 25°C 160

OUT

On state resistance

ON

(2)

= 1A; Tj= 150°C 320

OUT

I

= 1A; VCC= 5V; Tj= 25°C 210

OUT

Clamp voltage IS= 20 mA 41 46 52 V

Off State; V
VIN=V

I

S

I

L(off1)

Supply current

Off state output current

(2)

OUT=VSENSE=VCSD

On State; V
I

= 0A

OUT

VIN=V

= 0 V; VCC= 13 V;

OUT

Tj= 25°C

V

IN=VOUT

= 0 V; VCC= 13 V;

Tj= 125 °C

V

1. PowerMOS leakage included.

2. For each channel.

Table 6. Switching (VCC=13V; Tj= 25°C)

Output - VCC diode

F

voltage

(2)

-I

=1A; Tj=150°C 0.7 V

OUT

= 13 V; Tj= 25°C;

CC

= 13V; VIN= 5 V;

CC

= 0 V

0.5 V

mΩI

(1)

2

(1)

5

µA

814mA

00.01 3

µA

05

Symbol Parameter Test conditions Min. Typ. Max. Unit

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

Turn-on delay time RL= 13 Ω (see Figure 6.)20 µs

Turn-off delay time RL= 13 Ω (see Figure 6.)10 µs

/dt)onTurn-on voltage slope RL= 13 Ω

/dt)

Turn-off voltage slope RL= 13 Ω

off

Switching energy
losses during t

won

Switching energy
losses during t

woff

RL= 13 Ω (see Figure 6.)0.05 mJ

RL= 13 Ω (see Figure 6.)0.03 mJ

See

Figure 26.

See

Figure 28.

9/37

V/µs

V/µs

Electrical specifications VNQ5E160AK-E

Table 7. Logic Inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

I

IL

V

I

IH

V

I(hyst)

V

ICL

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Table 8. Protections and diagnostics

Input low level voltage 0.9 V

IL

Low level input current VIN= 0.9V 1 µA

Input high level voltage 2.1 V

IH

High level input current VIN= 2.1V 10 µA

Input hysteresis voltage 0.25 V

Input clamp voltage

CS_DIS low level voltage 0.9 V

Low level CS_DIS current V

CS_DIS high level voltage 2.1 V

High level CS_DIS current V

CS_DIS hysteresis voltage 0.25 V

CS_DIS clamp voltage

IIN= 1mA 5.5 7

= -1mA -0.7

I

IN

= 0.9V 1 µA

CSD

= 2.1V 10 µA

CSD

I

= 1mA 5.5 7

CSD

= -1mA -0.7

I

CSD

(1)

V

V

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

limH

I

limL

T

TSD

T

T

RS

T

HYST

V

DEMAG

V

ON

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

DC short circuit current

Short circuit current
during thermal cycling

Shutdown temperature 150 175 200 °C

Reset temperature

R

Thermal reset of
STATUS

Thermal hysteresis
(T

Turn-off output voltage
clamp

TSD-TR

)

I

OUT

Output voltage drop
limitation

VCC= 13V

CC

<28V

5V<V

V

= 13V; TR<Tj<T

CC

= 1A; VIN= 0; L= 20mH

I

= 0.03A;

OUT

= -40°C...150°C

T

j

(see Figure 8.)

TSD

7101414A

2.5 A

TRS + 1

TRS + 5

135 °C

7°C

VCC-41

VCC-46 VCC-52

25 mV

A

°C

V

10/37

VNQ5E160AK-E Electrical specifications

Table 9. Current sense (8V<VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

= 0.025 A;

OUT

dK

dK

K

K

1/K1

K

2/K2

I

0

1

2

OUT/ISENSE

I

OUT/ISENSE

(1)

Current sense ratio drift

I

OUT/ISENSE

(1)

Current sense ratio drift

V
T

I
V
T
Tj= 25°C...150°C

I
V
T

I
V
T
T

I
V

= 0.5 V; V

SENSE

= -40°C...150°C 330 600 870

j

= 0.35A;

OUT

= 0.5 V; V

SENSE

= -40°C...150°C

j

= 0.35 A;

OUT

= 0.5 V; V

SENSE

= -40°C...150°C

j

= 0.5A;

OUT

=4V; V

SENSE

=-40°C...150°C

j

= 25°C...150°C

j

= 0.5 A;

OUT

= 4 V; V

SENSE

CSD

CSD

CSD

CSD

CSD

= 0 V;

= 0 V;

= 0 V;

= 0 V;

= 0 V;

345

475

395

475

- 12 12 %

375

470

415

470

- 8 8 %

Tj= -40°C...150°C

600
555

565
525

K

dK

3/K3

I

SENSE0

I

OL

V

SENSE

I

3

OUT/ISENSE

(1)

Current sense ratio drift

Analog sense leakage
current

Openload on state
current detection
threshold

Max analog sense
output voltage

I

= 1.5 A;

OUT

V
T
T

I
V

= 4 V; V

SENSE

= -40°C...150°C

j

= 25°C...150°C

j

= 1.5 A;

OUT

= 4 V; V

SENSE

Tj= -40°C...150°C

= 0 A; V

I

OUT

V

CSD

= -40°C...150°C

T

j

I

= 0 A; V

OUT

V

CSD

= -40°C...150°C

T

j

I

= 1A; V

OUT

V

CSD

SENSE

= 5 V; VIN= 0 V;

SENSE

= 0 V; VIN= 5 V;

SENSE

= 5V; VIN= 5V;

Tj= -40°C...150°C

VIN = 5V,

I

= 5 µA

SENSE

I

= 1.5 A; V

OUT

CSD

= 0 V;

CSD

425

465

505

435

465

495

CSD

= 0 V;

- 6 6 %

= 0 V;

01

= 0 V;

02

= 0V;

01

15mA

= 0 V 5 V

µA

V

SENSEH

Analog sense output
voltage in fault
condition

(2)

VCC= 13 V; R

= 3.9 KΩ; 8V

SENSE

11/37

Electrical specifications VNQ5E160AK-E

Table 9. Current sense (8V<VCC<18V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Analog sense output

I

t

(2)

SENSEH

DSENSE1H

current in fault
condition

(2)

Delay response time
from falling edge of
CS_DIS pin

VCC= 13V; V

V
I

<4V, 0.025A<Iout<1.5A

SENSE

=90% of I

SENSE

(see Figure 4)

= 5 V; 9 mA

SENSE

SENSEMAX

40 100 µs

Delay response time

t

DSENSE1L

from rising edge of
CS_DIS pin

Delay response time

t

DSENSE2H

from rising edge of
INPUT pin

Delay response time

Δt

DSENSE2H

between rising edge of
output current and rising
edge of current sense

Delay response time

t

DSENSE2L

from falling edge of
INPUT pin

1. Parameter guaranteed by design; it is not tested

2. Fault condition includes: power limitation, overtemperature and open load off state detection.

Table 10. Openload detection (8V<VCC<18V)

V
I

(see Figure 4)

V
I

(see Figure 4.)

V
I
I
I

V
I
(see Figure 4.)

<4V, 0.025A<Iout<1.5A

SENSE

=10% of I

SENSE

<4V, 0.025A<Iout<1.5A

SENSE

=90% of I

SENSE

<4V,

SENSE

= 90% of I

SENSE

= 90% of I

OUT

OUTMAX

SENSE

=1.5A (see Figure 7)

<4V, 0.025A<Iout<1.5A

SENSE

=10% of I

SENSEMAX

SENSEMAX

SENSEMAX,

OUTMAX

SENSEMAX

520µs

120 300 µs

110 µs

80 250 µs

Symbol Parameter Test conditions Min. Typ. Max. Unit

Openload off state

V

OL

voltage detection

24V

threshold

Output short circuit to

t

DSTKON

detection delay at

V

CC

See Figure 5. 180 1200 µs

turn off

I

L(off2)r

I

L(off2)f

Off state output current
at V

OUT

= 4V

Off state output current
at V

OUT

= 2V

= 0 V; V

V

IN

rising from 0 V to 4 V

V

OUT

= 0 V; V

V

IN

V

falling from VCC to 2V

OUT

SENSE

SENSE

= 0 V

= V

SENSEH

-120 0 µA

-50 90 µA

Delay response from

= 4 V; VIN= 0 V

td_vol

output rising edge to

SENSE

rising edge in

V
openload

V

OUT

V

SENSE

= 90% of V

SENSEH

20 µs

12/37