ST VNQ5E050K-E User Manual

Features
VNQ5E050K-E
Quad channel high side driver for automotive applications
Max transient supply voltage V
Operating voltage range V
Max on-state resistance (per ch.) R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected.
General
– Inrush current active management by
european directive
Diagnostic functions
– Open drain status output – On-state open-load detection – Off-state open-load detection – Output short to Vcc detection – Overload and short to ground (power
limitation) indication – Thermal shutdown indication
Protections
– Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss
of V
CC
– Over temperature shutdown with auto
restart (thermal shutdown) – Reverse battery protected (see Application
schematic
(1)
on page 22)
CC
CC
ON
LIMH
S
41V
4.5 to 28V
50 mΩ
27 A
(1)
2 µA
PowerSSO-24
– Electrostatic discharge protection
Applications
All types of resistive, inductive and capacitive
loads
Description
The VNQ5E050K-E is a quad channel high-side driver manufactured in the ST proprietary VIPower™ M0-5 technology and housed in the tiny PowerSSO-24 package.
The VNQ5E050K-E is designed to drive automotive grounded loads delivering protection, diagnostics and an easy 3 V and 5 V CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over temperature shut-off with auto restart and over-voltage active clamp.
A dedicated active low digital status pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short-circuit to ground, over temperature indication, short-circuit to V
diagnosis and ON & OFF-state open-load
CC
detection.
The diagnostic feedback of the whole device can be disabled by pulling the STAT_DIS pin up, thus allowing wired-ORing with other similar devices.
July 2009 Doc ID 13494 Rev 5 1/34
www.st.com
1
Contents VNQ5E050K-E
Contents
1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1 Gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . . 22
3.1.1 Solution 1: resistor in the ground line (Rgnd only) . . . . . . . . . . . . . . . . . 22
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.1 PowerSSO-24 package packing information . . . . . . . . . . . . . . . . . . . . . . 31
7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34 Doc ID 13494 Rev 5
VNQ5E050K-E List of tables
List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC=13V, T
Table 7. Status pin (VSD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Open-load detection (8V<Vcc<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 15. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
j
Doc ID 13494 Rev 5 3/34
List of figures VNQ5E050K-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Open-load with external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Open-load without external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13. Short to V Figure 14. T
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
J
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
CC
Figure 15. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Low level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. On-state resistance vs T
case
Figure 22. High level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. On-state resistance vs V
CC
Figure 24. Low level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. I
LIM
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
case
Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 30. High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 31. Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 32. Application schematic
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 33. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 34. Maximum turn-off current versus inductance (for each channel) Figure 35. PowerSSO-24 PC board
(1)
Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 26
Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 27
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24
Figure 39. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 40. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
(1)
. . . . . . . . . . . . . . . . . . 25
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
(1)
. . . . . . . . . . . . . . . . . 27
4/34 Doc ID 13494 Rev 5
VNQ5E050K-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V
CC
Signal Clamp
Undervoltage
IN1
IN2
IN3
IN4
ST_ DIS
ST1
ST2
ST3
ST4

Table 1. Pin function

LOGIC
Control & Diagnostic 1
DRIVER
Over
temp.
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
Current
Limitation
Power Clamp
V
ON
Limitation
OFF State Open load
ON State
Open load
Name Function
V
CC
Battery connection.
OUTPUTn Power output.
GND
INPUTn
Ground connection. Must be reverse battery protected by an external diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state.
CH 1
GND
CH 4
CH 3
Channels 2, 3 & 4
CONTROL & DIAGNOSTIC
CH 2
OUT4
OUT3
OUT2
OUT1
STATUSn Open drain digital diagnostic pin.
STAT_DIS
Active high CMOS compatible pin, to disable the STATUS pin.
Doc ID 13494 Rev 5 5/34
Block diagram and pin configuration VNQ5E050K-E

Figure 2. Configuration diagram (top view)

V
CC
GND
INPUT1
STATUS1
INPUT2
STATUS2
INPUT3
STATUS3
INPUT4
STATUS4
STAT_DIS.
V
CC

Table 2. Suggested connections for unused and not connected pins

OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4
TAB = V
CC
Connection / pin Status N.C. Output Input STAT_DIS
Floating X X X X X
To ground Not allowed X Not allowed
Through 10KΩ
resistor
Through 10KΩ
resistor
6/34 Doc ID 13494 Rev 5
VNQ5E050K-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions
I
SD
V
1. V
Fn
= V
SD
- VCC during reverse battery condition.
OUTn
I
INn
V
INn
INPUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3. Absolute maximum ratings

GND
(1)
V
CC
OUTPUTnSTAT_DIS
STATUSn
I
GND
I
OUTn
I
STATn
V
STATn
I
S
V
Fn
V
OUTn
V
CC
Symbol Parameter Value Unit
V
- V
- I
I
OUT
- I
I
STAT
I
STAT_DIS
E
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
Reverse DC output current 15 A
OUT
DC input current +10/-1 mA
I
IN
DC status current +10/-1 mA
DC status disable current +10/-1 mA
Maximum switching energy (single pulse)
MAX
(L= 3mH; R
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(Typ.))
104 mJ
Doc ID 13494 Rev 5 7/34
Electrical specifications VNQ5E050K-E
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (Human Body Model: R=1.5KΩ; C=100pF)
V
V
T
– Input – Status
ESD
–STAT_DIS – Output –V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
ESD
Junction operating temperature -40 to 150 °C
T
j
Storage temperature - 55 to 150 °C
stg
4000 4000 4000 5000 5000
V V V V V

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (max) (with one channel ON)
2.8 °C/W
Thermal resistance junction-ambient (max) See Figure 36 °C/W
8/34 Doc ID 13494 Rev 5
VNQ5E050K-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8 V<VCC<28 V; -40 °C< Tj <150 °C, unless otherwise stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
Operating supply voltage 4.5 13 28 V
CC
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shutdown hysteresis
I
= 2A; Tj= 25°C
OUT
= 2A; Tj= 150°C
I
OUT
I
= 2A; VCC= 5V; Tj=25°C
OUT
On-state resistance
ON
(1)
Clamp voltage IS= 20 mA 41 46 52 V
Off-state; V
I
S
I
L(off1)
Supply current
Off-state output current
V
IN=VOUT
On-state; VIN=5V; VCC=13V; I
OUT
V
IN=VOUT
(1)
V
IN=VOUT
=0V; Tj=25°C
=0A
=0V; VCC=13V; Tj=25°C =0V; VCC=13V;
Tj=125°C
Output - VCC diode
V
F
1. For each channel.
2. PowerMOS leakage included.
Table 6. Switching (VCC=13V, TJ= 25 °C)
voltage
(1)
-I
=2A; Tj=150°C 0.7 V
OUT
CC
=13V;
0.5 V
100
(2)
2
5
8
000.01 3
50
mΩ mΩ
65
mΩ
(2)
14µAmA
µA
5
µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
R
= 6.5Ω
t
d
(on)
t
d
(off)
/dt
dV
OUT
/dt
dV
OUT
W
ON
W
OFF
Turn-on delay time
Turn-off delay time
Turn-on voltage
(on)
slope
Turn-off voltage
(off)
slope
Switching energy losses during t
Switching energy losses during t
won
woff
L
(see Figure 6.)
R
= 6.5Ω
L
(see Figure 6.)
= 6.5Ω
R
L
R
= 6.5Ω
L
RL= 6.5Ω
(see Figure 6.)
RL= 6.5Ω
(see Figure 6.)
20 µs
35 µs
See
Figure 26.
See
Figure 28.
0.19 mJ
0.25 mJ
V/µs
V/µs
Doc ID 13494 Rev 5 9/34
Electrical specifications VNQ5E050K-E

Table 7. Status pin (VSD=0)

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
LSTAT
C
V

Table 8. Protections

Status low output
STAT
voltage
Status leakage current
Status pin input
STAT
capacitance
Status clamp voltage
SCL
= 1.6 mA, VSD=0V 0.5 V
I
STAT
Normal operation or V
= 5V
V
STAT
Normal operation or VSD=5V, V
= 5V
STAT
I
= 1mA
STAT
I
= - 1mA
STAT
(1)
SD
=5V,
5.5
10 µA
100 pF
7V
-0.7
Symbol Parameter Test conditions Min. Typ. Max. Unit
= 13V
I
limH
I
T
T
T
HYST
t
V
DEMAG
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to
DC short circuit current
Short circuit current
limL
during thermal cycling
Shutdown temperature 150 175 200 °C
TSD
Reset temperature
T
R
Thermal reset of
RS
STATUS
Thermal hysteresis (T
Status delay in
SDL
overload conditions
TSD-TR
)
Turn-off output voltage clamp
Output voltage drop
ON
limitation
V
CC
5V<V
V TR<Tj<T
T
I
OUT
I
OUT
T
<28V
CC
= 13V
CC
TSD
(see Figure 4.)20µs
j>TTSD
= 2A; VIN= 0; L= 6mH VCC-41 VCC-46 VCC-52 V
= 0.1A (see Figure 5.)
= -40°C...+150°C
j
abnormal conditions, this software must limit the duration and number of activation cycles.
19 27 38
38
7A
TRS + 1
TRS + 5
135 °C
C
25 mV
V
A A
°C
10/34 Doc ID 13494 Rev 5
VNQ5E050K-E Electrical specifications

Table 9. Open-load detection (8V<Vcc<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
t
DOL(on)
Open-load on-state detection
OL
threshold
Open-load on-state detection delay
= 5V 10 70 mA
V
IN
= 0A
I
OUT
(see Figure 4.)
200 µs
Delay between INPUT falling
t
POL
edge and STATUS rising
= 0A (see Figure 4.) 200 550 1200 µs
I
OUT
edge in open-load condition
V
t
DSTKON
I
L(off2)
Open-load off-state voltage
OL
detection threshold
Output short circuit to Vcc detection delay at turn-off
Off-state output current
= 0V 2 4 V
V
IN
See Figure 4. 180 t
VIN= 0V; V
(1)
(see Section 3.4: Open-
OUT
= 4V
-75 0 µA
POL
load detection in off-state)
Delay response from output
td_vol
rising edge to STATUS falling
V
IN
= 0V; V
= 4V 20 µs
OUT
edge in open-load
1. For each channel.

Table 10. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit
µs
V
V
V
I(hyst)
V
V
I
SDL
V
I
SDH
V
SD(hyst)
V
SDCL
Input low level 0.9 V
IL
Low level input current VIN = 0.9V 1 µA
I
IL
Input high level 2.1 V
IH
I
High level input current VIN = 2.1V 10 µA
IH
Input hysteresis voltage 0.25 V
I
= 1mA
Input clamp voltage
ICL
STAT_DIS low level
SDL
voltage
Low level STAT_DIS current
STAT_DIS high level
SDH
voltage
High level STAT_DIS current
STAT_DIS hysteresis voltage
STAT_DIS clamp voltage
IN
= -1mA
I
IN
= 0.9V 1 µA
V
SD
5.5
-0.7
2.1 V
= 2.1V 10 µA
V
SD
0.25 V
I
SD
I
SD
= 1mA = -1mA
5.5
-0.7
7V
V
0.9 V
7V
V
Doc ID 13494 Rev 5 11/34
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