Quad channel high side driver for automotive applications
Max transient supply voltageV
Operating voltage rangeV
Max on-state resistance (per ch.)R
Current limitation (typ)I
Off-state supply currentI
1. Typical value with all loads connected.
■ General
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
■ Diagnostic functions
– Open drain status output
– On-state open-load detection
– Off-state open-load detection
– Output short to Vcc detection
– Overload and short to ground (power
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Over temperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected (see Application
schematic
(1)
on page 22)
CC
CC
ON
LIMH
S
41V
4.5 to 28V
50 mΩ
27 A
(1)
2 µA
PowerSSO-24
– Electrostatic discharge protection
Applications
■ All types of resistive, inductive and capacitive
loads
Description
The VNQ5E050K-E is a quad channel high-side
driver manufactured in the ST proprietary
VIPower™ M0-5 technology and housed in the
tiny PowerSSO-24 package.
The VNQ5E050K-E is designed to drive automotive
grounded loads delivering protection, diagnostics
and an easy 3 V and 5 V CMOS compatible
interface with any microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over temperature shut-off with auto
restart and over-voltage active clamp.
A dedicated active low digital status pin is
associated with every output channel in order to
provide Enhanced diagnostic functions including
fast detection of overload and short-circuit to
ground, over temperature indication, short-circuit
to V
diagnosis and ON & OFF-state open-load
CC
detection.
The diagnostic feedback of the whole device can
be disabled by pulling the STAT_DIS pin up, thus
allowing wired-ORing with other similar devices.
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3.Absolute maximum ratings
GND
(1)
V
CC
OUTPUTnSTAT_DIS
STATUSn
I
GND
I
OUTn
I
STATn
V
STATn
I
S
V
Fn
V
OUTn
V
CC
SymbolParameterValueUnit
V
- V
- I
I
OUT
- I
I
STAT
I
STAT_DIS
E
DC supply voltage41V
CC
Reverse DC supply voltage0.3V
CC
DC reverse ground pin current200mA
GND
DC output currentInternally limitedA
Reverse DC output current 15A
OUT
DC input current +10/-1mA
I
IN
DC status current +10/-1mA
DC status disable current+10/-1mA
Maximum switching energy (single pulse)
MAX
(L= 3mH; R
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(Typ.))
104mJ
Doc ID 13494 Rev 57/34
Electrical specificationsVNQ5E050K-E
Table 3.Absolute maximum ratings (continued)
SymbolParameterValueUnit
Electrostatic discharge (Human Body Model: R=1.5KΩ;
C=100pF)
V
V
T
– Input
– Status
ESD
–STAT_DIS
– Output
–V
CC
Charge device model (CDM-AEC-Q100-011)750V
ESD
Junction operating temperature-40 to 150°C
T
j
Storage temperature- 55 to 150°C
stg
4000
4000
4000
5000
5000
V
V
V
V
V
2.2 Thermal data
Table 4.Thermal data
SymbolParameterValueUnit
R
thj-case
R
thj-amb
Thermal resistance junction-case (max)
(with one channel ON)
2.8°C/W
Thermal resistance junction-ambient (max) See Figure 36°C/W
8/34 Doc ID 13494 Rev 5
VNQ5E050K-EElectrical specifications
2.3 Electrical characteristics
Values specified in this section are for 8 V<VCC<28 V; -40 °C< Tj <150 °C, unless otherwise
stated.
Table 5.Power section
SymbolParameterTest conditionsMin. Typ.Max.Unit
V
V
V
USDhyst
R
V
clamp
Operating supply voltage4.51328V
CC
Undervoltage shutdown3.54.5V
USD
Undervoltage shutdown
hysteresis
I
= 2A; Tj= 25°C
OUT
= 2A; Tj= 150°C
I
OUT
I
= 2A; VCC= 5V; Tj=25°C
OUT
On-state resistance
ON
(1)
Clamp voltageIS= 20 mA414652V
Off-state; V
I
S
I
L(off1)
Supply current
Off-state output current
V
IN=VOUT
On-state; VIN=5V; VCC=13V;
I
OUT
V
IN=VOUT
(1)
V
IN=VOUT
=0V; Tj=25°C
=0A
=0V; VCC=13V; Tj=25°C
=0V; VCC=13V;
Tj=125°C
Output - VCC diode
V
F
1. For each channel.
2. PowerMOS leakage included.
Table 6.Switching (VCC=13V, TJ= 25 °C)
voltage
(1)
-I
=2A; Tj=150°C0.7V
OUT
CC
=13V;
0.5V
100
(2)
2
5
8
000.013
50
mΩ
mΩ
65
mΩ
(2)
14µAmA
µA
5
µA
SymbolParameterTest conditionsMin.Typ.Max.Unit
R
= 6.5Ω
t
d
(on)
t
d
(off)
/dt
dV
OUT
/dt
dV
OUT
W
ON
W
OFF
Turn-on delay time
Turn-off delay time
Turn-on voltage
(on)
slope
Turn-off voltage
(off)
slope
Switching energy
losses during t
Switching energy
losses during t
won
woff
L
(see Figure 6.)
R
= 6.5Ω
L
(see Figure 6.)
= 6.5Ω
R
L
R
= 6.5Ω
L
RL= 6.5Ω
(see Figure 6.)
RL= 6.5Ω
(see Figure 6.)
20µs
35µs
See
Figure 26.
See
Figure 28.
0.19mJ
0.25mJ
V/µs
V/µs
Doc ID 13494 Rev 59/34
Electrical specificationsVNQ5E050K-E
Table 7.Status pin (VSD=0)
SymbolParameterTest conditionsMin.Typ.Max.Unit
V
I
LSTAT
C
V
Table 8.Protections
Status low output
STAT
voltage
Status leakage current
Status pin input
STAT
capacitance
Status clamp voltage
SCL
= 1.6 mA, VSD=0V0.5V
I
STAT
Normal operation or V
= 5V
V
STAT
Normal operation or VSD=5V,
V
= 5V
STAT
I
= 1mA
STAT
I
= - 1mA
STAT
(1)
SD
=5V,
5.5
10µA
100pF
7V
-0.7
SymbolParameterTest conditionsMin.Typ.Max.Unit
= 13V
I
limH
I
T
T
T
HYST
t
V
DEMAG
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
DC short circuit
current
Short circuit current
limL
during thermal cycling
Shutdown temperature150175200°C
TSD
Reset temperature
T
R
Thermal reset of
RS
STATUS
Thermal hysteresis
(T
Status delay in
SDL
overload conditions
TSD-TR
)
Turn-off output voltage
clamp
Output voltage drop
ON
limitation
V
CC
5V<V
V
TR<Tj<T
T
I
OUT
I
OUT
T
<28V
CC
= 13V
CC
TSD
(see Figure 4.)20µs
j>TTSD
= 2A; VIN= 0; L= 6mHVCC-41VCC-46VCC-52V
= 0.1A (see Figure 5.)
= -40°C...+150°C
j
abnormal conditions, this software must limit the duration and number of activation cycles.
192738
38
7A
TRS + 1
TRS + 5
135°C
7°C
25mV
V
A
A
°C
10/34 Doc ID 13494 Rev 5
VNQ5E050K-EElectrical specifications
Table 9.Open-load detection (8V<Vcc<18V)
SymbolParameterTest conditionsMin.Typ.Max.Unit
I
t
DOL(on)
Open-load on-state detection
OL
threshold
Open-load on-state detection
delay
= 5V1070mA
V
IN
= 0A
I
OUT
(see Figure 4.)
200µs
Delay between INPUT falling
t
POL
edge and STATUS rising
= 0A (see Figure 4.)2005501200µs
I
OUT
edge in open-load condition
V
t
DSTKON
I
L(off2)
Open-load off-state voltage
OL
detection threshold
Output short circuit to Vcc
detection delay at turn-off
Off-state output current
= 0V24V
V
IN
See Figure 4.180t
VIN= 0V; V
(1)
(see Section 3.4: Open-
OUT
= 4V
-750µA
POL
load detection in off-state)
Delay response from output
td_vol
rising edge to STATUS falling
V
IN
= 0V; V
= 4V20µs
OUT
edge in open-load
1. For each channel.
Table 10.Logic input
SymbolParameterTest conditionsMin.Typ.Max.Unit
µs
V
V
V
I(hyst)
V
V
I
SDL
V
I
SDH
V
SD(hyst)
V
SDCL
Input low level0.9V
IL
Low level input current VIN = 0.9V1µA
I
IL
Input high level2.1V
IH
I
High level input current VIN = 2.1V10µA
IH
Input hysteresis voltage0.25V
I
= 1mA
Input clamp voltage
ICL
STAT_DIS low level
SDL
voltage
Low level STAT_DIS
current
STAT_DIS high level
SDH
voltage
High level STAT_DIS
current
STAT_DIS hysteresis
voltage
STAT_DIS clamp
voltage
IN
= -1mA
I
IN
= 0.9V1µA
V
SD
5.5
-0.7
2.1V
= 2.1V10µA
V
SD
0.25V
I
SD
I
SD
= 1mA
= -1mA
5.5
-0.7
7V
V
0.9V
7V
V
Doc ID 13494 Rev 511/34
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