ST VNQ5E050AK-E User Manual

Features

VNQ5E050AK-E

Quad channel high-side driver with analog current sense

for automotive applications

Max supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off-state supply current I

1. Typical value with all loads connected.

■ General

– Inrush current active management by

power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliance with European directive

2002/95/EC
– Very low current sense leakage

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off-state open-load detection
– Output short to V
– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

– Overtemperature shutdown with auto

restart (thermal shutdown)

detection

CC

CC

CC

ON

LIMH

S

41 V

4.5 to 28 V

50 mΩ

27 A

(1)

2 µA

PowerSSO-24

– Reverse battery protected
– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VNQ5E050AK-E is a quad channel high-side
driver manufactured using ST proprietary
VIPower™ M0-5 technology and housed in
PowerSSO-24 package. The device is designed
to drive 12 V automotive grounded loads, and to
provide protection and diagnostics. It also
implements a 3 V and 5 V CMOS compatible
interface for the use with any microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with
auto-restart and overvoltage active clamp.

A dedicated analog current sense pin is
associated with every output channel providing
enhanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication,
overtemperature indication, short-circuit to V
diagnosis and on-state and off-state open-load
detection. The current sensing and diagnostic
feedback of the whole device can be disabled by
pulling the CS_DIS pin high to share external
sense resistor with similar devices.

CC

October 2010 Doc ID 13519 Rev 6 1/37

www.st.com

1

Contents VNQ5E050AK-E

Contents

1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 27

3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28

4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37 Doc ID 13519 Rev 6

VNQ5E050AK-E List of tables

List of tables

Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Switching (V

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8 V < V
Table 10. Open-load detection (8V<V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 16. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

=13V; Tj= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

CC

<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 13519 Rev 6 3/37

List of figures VNQ5E050AK-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of output current and rising edge of current

sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. I

OUT/ISENSE

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

j

Figure 17. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On-state resistance vs T
Figure 24. On-state resistance vs V

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. I

LIMH

vs T

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28

Figure 35. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 29

Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 30

Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30

Figure 39. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

vs I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

OUT

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V

Signal Clamp

CC

Undervoltage

IN1

IN2

IN3

IN4

CS_
DIS

CS1

CS2

CS3

CS4

Table 1. Pin functions

LOGIC

Control & Diagnostic 1

DRIVER

Over
temp.

V

SENSEH

(ACTIVE POWER LIMITATION)

Current

Limitation

Current

Sense

OVERLOAD PROTECTION

Power
Clamp

V

ON

Limitation

OFF State
Open load

Name Function

V

CC

OUTPUT

GND

Battery connection.

Power output.

n

Ground connection. Must be reverse battery protected by an external
diode/resistor network.

CH 1

GND

CH 4

CH 3

Channels 2, 3 & 4

CONTROL & DIAGNOSTIC

CH 2

OUT4

OUT3

OUT2

OUT1

INPUT

n

CURRENT

SENSE

n

Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.

Analog current sense pin, delivers a current proportional to the load current.

CS_DIS Active high CMOS compatible pin, to disable the current sense pin.

Doc ID 13519 Rev 6 5/37

Block diagram and pin configuration VNQ5E050AK-E

Figure 2. Configuration diagram (top view)

V

GND

INPUT1

CURRENT SENSE1

INPUT2

CURRENT SENSE2

INPUT3

CURRENT SENSE3

INPUT4

CURRENT SENSE4

CS_DIS.

V

CC

CC

OUTPUT1

OUTPUT1

OUTPUT1

OUTPUT2

OUTPUT2

OUTPUT2

OUTPUT3

OUTPUT3

OUTPUT3

OUTPUT4

OUTPUT4

OUTPUT4

TAB = V

Table 2. Suggested connections for unused and not connected pins

CC

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1 kΩ

resistor

Through 22 kΩ

X

resistor

Through 10 kΩ

resistor

Through 10 kΩ

resistor

6/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

CC

I

CSD

GND

OUTPUTn

CURRENT
S

ENSEn

I

GND

CS_DIS

I

V

CSD

INn

INPUTn

V

INn

V

I

SENSEn

V

SENSEn

Fn

I

OUTn

V

OUTn

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions reported in this section for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

CC

-V

-I

GND

I

OUT

-I

OUT

I

IN

I

CSD

-I

CSENSE

V

CSENSE

DC supply voltage 41 V

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

DC output current Internally limited A

Reverse DC output current 20 A

DC input current -1 to 10 mA

DC current sense disable input current -1 to 10 mA

DC reverse CS pin current 200 mA

Current sense maximum voltage

V

- 41 to

CC

+V

CC

V

Doc ID 13519 Rev 6 7/37

Electrical specifications VNQ5E050AK-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Maximum switching energy (single pulse)

E

MAX

(L = 3 mH; R
I

OUT=IlimL

=0Ω; V

L

(Typ.))

=13.5V; T

bat

jstart

=150°C;

104 mJ

Electrostatic discharge
(human body model: R = 1.5 KΩ; C=100pF)

4000
2000
4000
5000
5000

V
V
V
V
V

V

V

ESD

ESD

T

T

stg

– Input
– Current sense
–CS_DIS
– Output
–V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature -40 to 150 °C

j

Storage temperature -55 to 150 °C

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case (with one channel ON) 2.8 °C/W

Thermal resistance junction-ambient See Figure 36 °C/W

2.3 Electrical characteristics

Values specified in this section are for 8 V < VCC<28V, -40°C< Tj< 150 °C, unless
otherwise stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

Operating supply voltage 4.5 13 28 V

CC

Undervoltage shutdown 2.5 3.5 4.5 V

USD

Undervoltage shutdown
hysteresis

On-state resistance

ON

Clamp voltage IS=20mA 41 46 52 V

clamp

(1)

I

=2A; Tj=25°C 50

OUT

=2A; Tj= 150 °C 100

OUT

=2A; VCC=5V; Tj=25°C 65

I

OUT

0.5 V

mΩI

8/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

Table 5. Power section (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Off-state; V
V

I

S

Supply current

IN=VOUT=VSENSE=VCSD

On-state; VCC=13V; VIN=5V;
I

=0A

OUT

VIN=V
Tj=25°C

I

L(off)

1. For each channel

2. PowerMOS leakage included.

Table 6. Switching (VCC=13V; Tj=25°C)

Off-state output current

Output - VCC diode

V

F

voltage

(1)

(1)

V

IN=VOUT

= 125 °C

T

j

-I

=2A; Tj= 150 °C 0.7 V

OUT

=13V; Tj=25°C;

CC

=0V; VCC=13V;

OUT

=0V; VCC=13V;

=0V

(2)5(2)

2

814mA

00.01 3

05

Symbol Parameter Test conditions Min. Typ. Max. Unit

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

Turn-on delay time RL=6.5Ω (see Figure 6.)20 µs

Turn-off delay time RL=6.5Ω (see Figure 6.)35 µs

/dt)onTurn-on voltage slope RL=6.5Ω

/dt)

Turn-off voltage slope RL=6.5Ω

off

See

Figure 26

See

Figure 28

µA

µA

V/µs

V/µs

W

W

ON

OFF

Switching energy
losses during t

won

Switching energy
losses during

t

woff

RL=6.5Ω (see Figure 6.)0.15 mJ

RL=6.5Ω (see Figure 6.)0.25 mJ

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

I

V

I

V

I(hyst)

V

V

I

CSDL

V

CSDH

CSDL

Input low level voltage 0.9 V

IL

Low level input current VIN=0.9V 1 µA

IL

Input high level voltage 2.1 V

IH

High level input current VIN=2.1V 10 µA

IH

Input hysteresis voltage 0.25 V

I

=1mA 5.5 7

Input clamp voltage

ICL

IN

=-1mA -0.7

I

IN

CS_DIS low level voltage 0.9 V

Low level CS_DIS current V

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

V

Doc ID 13519 Rev 6 9/37

Electrical specifications VNQ5E050AK-E

Table 7. Logic inputs (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

CSDH

V

CSD(hyst)

V

CSCL

Table 8. Protections and diagnostics

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25 V

I

=1mA 5.5 7

CS_DIS clamp voltage

CSD

=-1mA -0.7

I

CSD

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

limH

I

limL

T

TSD

T

T

T

HYST

V

DEMAG

DC short circuit
current

Short circuit current
during thermal cycling

Shutdown
temperature

Reset temperature TRS + 1 TRS + 5 °C

R

Thermal reset of

RS

STATUS

Thermal hysteresis

TSD-TR

)

(T

Turn-off output voltage
clamp

VCC= 13 V 19 27 38 A

5V<V

V

CC

<28V 38 A

CC

=13V; TR<Tj<T

TSD

7A

150 175 200 °C

135 °C

7°C

I

=2A; VIN=0;

OUT

L=6mH

-41 VCC-46 VCC-52 V

V

CC

V

=0.1A;

I

V

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

Table 9. Current sense (8 V < VCC<18V)

Output voltage drop

ON

limitation

diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

OUT

Tj= -40 °C...150 °C
(see Figure 8)

25 mV

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

=0.05A;

OUT

K

K

dK

1/K1

I

0

OUT/ISENSE

I

1

OUT/ISENSE

Current sense ratio

(1)

drift

V
T

I
V
T

= 0.5 V; V

SENSE

= -40 °C...150 °C

j

=1A;

OUT

=4V; V

SENSE

= -40 °C...150 °C

j

CSD

Tj= 25 °C...150 °C

=1A; V

I

OUT

V

CSD

= -40 °C to 150 °C

T

j

SENSE

=0V;

CSD

=0V;

=4V;

=0V;

1050 2110 3170

1510

1890

2650

1510

1890

2270

-13 13 %

10/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

Table 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

=2A;

OUT

K

2

I

OUT/ISENSE

V
T

=4V; V

SENSE

= -40 °C...150 °C

j

Tj= 25 °C...150 °C

CSD

=0V;

1600
1600

1800
1800

2230
2000

dK

2/K2

K

dK

3/K3

I

SENSE0

I

OL

Current sense ratio

(1)

drift

I

3

OUT/ISENSE

Current sense ratio

(1)

drift

Analog sense
leakage current

Open-load on-state
current detection
threshold

=2A; V

I

OUT

V

CSD

= -40 °C to 150 °C

T

j

I

=4A;

OUT

V

SENSE

= -40 °C...150 °C

T

j

=0V;

=4V; V

SENSE

CSD

Tj= 25 °C...150 °C

=4A; V

I

OUT

V

CSD

= -40 °C to 150 °C

T

j

=0A; V

I

OUT

V

CSD

= -40 °C...150 °C

T

j

=0A; V

I

OUT

V

CSD

= -40 °C...150 °C

T

j

I

=2A; V

OUT

V

CSD

= -40 °C...150 °C

T

j

=5V; 8V<VCC<18V;

V

IN

I

SENSE

SENSE

=0V;

SENSE

=5V; VIN=0V;

SENSE

=0V; VIN=5V;

SENSE

=5V; VIN=5V;

=5µA

=4V;

=0V;

=4V;

=0V;

=0V;

=0V;

-8 8 %

1620

1770

1990

1620

1770

1920

-6 6 %

01

02

µA

01

420mA

V

SENSE

Max analog sense
output voltage

I

OUT

=4A; V

=0V 5 V

CSD

Analog sense output

V

SENSEH

voltage in fault
condition

(2)

VCC=13V; R

=10KΩ 8V

SENSE

Analog sense output

I

SENSEH

current in fault
condition

(2)

Delay response time

t

DSENSE1H

from falling edge of
CS_DIS pin

Delay response time

t

DSENSE1L

from rising edge of
CS_DIS pin

Delay response time

t

DSENSE2H

from rising edge of
INPUT pin

VCC=13V; V

V
I

<4V, 0.5A<I

SENSE

=90% of I

SENSE

(see Figure 4)

V
I

SENSE

SENSE

<4V; 0.5A<I

=10% of I

(see Figure 4)

V
I

< 4 V, 0.5 A < I

SENSE

=90% of I

SENSE

(see Figure 4)

=5V 9 mA

SENSE

<4A

OUT

SENSEMAX

OUT

SENSEMAX

OUT

SENSEMAX

<4A

<4A

40 100 µs

520µs

80 250 µs

Doc ID 13519 Rev 6 11/37

Electrical specifications VNQ5E050AK-E

Table 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Δ

t

DSENSE2H

t

DSENSE2L

Delay response time
between rising edge
of output current and
rising edge of current
sense

Delay response time
from falling edge of
INPUT pin

V
I

SENSE

I

OUT

I

OUTMAX

V
I
(see Figure 4)

<4V,

SENSE

=90% of I

=90% of I

< 4 V, 0.5 A < I

SENSE

=10% of I

SENSE

SENSEMAX,

OUTMAX

=2A (see Figure 7)

OUT

SENSEMAX

60 µs

<4A

80 250 µs

1. Parameter guaranteed by design; it is not tested.

2. Fault condition includes: power limitation, overtemperature and open-load off-state detection.

Table 10. Open-load detection (8V<VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

OL

t

DSTKON

I

L(off2)r

I

L(off2)f

td_vol

Open-load off-state voltage
detection threshold

Output short circuit to Vcc
detection delay at turn-off

Off-state output current at
V

=4V

OUT

Off-state output current at

=2V

V

OUT

Delay response from output
rising edge to V

SENSE

rising

edge in open-load

V

=0V 2

IN

See Figure 5 180 1200 µs

VIN=0V; V
V

rising from 0 V to 4 V

OUT

V

=0V;

IN

V

SENSE=VSENSEH

V

falling from VCC to 2 V

OUT

V

=4V; VIN=0V

OUT

SENSE

=90% of V

V

SENSE

=0V;

SENSEH

-120 0 µA

-50 90 µA

See

Figure 5

4V

20 µs

Figure 4. Current sense delay characteristics

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

t

DSENSE2H

12/37 Doc ID 13519 Rev 6

t

DSENSE1L

t

DSENSE1H

t

DSENSE2L