ST VNQ5050K-E User Manual

Features
Max supply voltage V
Operating voltage range V
Max on-state resistance (per ch.) R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected
– Inrush current active management by
power limitation – Very low standby current – 3.0 V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC
European directive
Diagnostic functions
– Open drain status output – On-state open load detection – Off-state open load detection – Thermal shutdown indication
Protection
– Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss
of V
CC
– Thermal shutdown – Reverse battery protection (see Application
schematic on page 19)
– Electrostatic discharge protection
CC
CC
ON
LIMH
S
41 V
4.5 to 36 V
50 mΩ
19 A
(1)
2µA
VNQ5050K-E
Quad channel high side driver
for automotive applications
PowerSSO-24
Applications
All types of resistive, inductive and capacitive
loads
Description
The VNQ5050K-E is a monolithic device made using STMicroelectronics VIPower M0-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V device against low energy spikes (see ISO7637 transient compatibility table).
The device detects open load condition both in on and off-state, when STAT_DIS is left open or driven low. Output shorted to Vcc is detected in the off-state.
When STAT_DIS is driven high, the STATUS pin is in a high impedance condition.
Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to a safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as the fault condition disappears.

Table 1. Device summary

Package
pin voltage clamp protects the
CC
Order code
Tube Tape and reel
PowerSSO-24 VNQ5050K-E VNQ5050KTR-E
July 2009 Doc ID 10864 Rev 6 1/31
www.st.com
1
Contents VNQ5050K-E
Contents
1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 19
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 19
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 20
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.3 Microprocessor I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31 Doc ID 10864 Rev 6
VNQ5050K-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (V Table 8. Status pin (V
Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 13. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 14. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 15. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 17. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
=13V; Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SD
Doc ID 10864 Rev 6 3/31
List of figures VNQ5050K-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. On-state resistance vs T Figure 14. On-state resistance vs V
Figure 15. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. I
LIMH
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
case
Figure 18. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 21. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 22. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 23. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 24. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 27. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 28. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
Figure 31. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 24
Figure 33. PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) . . . . . 25
Figure 34. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 25
Figure 35. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 36. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
CC
4/31 Doc ID 10864 Rev 6
VNQ5050K-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V
CC
V
GND
INPUT1
STATUS1
STAT_DIS
INPUT2
STATUS2
INPUT3
STATUS3
INPUT4
STATUS4

Table 2. Pin functions

CC
CLAMP
OVERTEMP. 1
LOGIC
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPENLOAD ON 1
OPENLOAD OFF 1
PWR
1
LIM
Name Function
V
CC
Battery connection
OUTPUTn Power output
GND
INPUTn
Ground connection. Must be reverse battery protected by an external diode/resistor network
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
INPUT2
CONTROL & PROTECTION EQUIVALENT TO
STATUS2
CHANNEL1
INPUT3
CONTROL & PROTECTI ON EQUIVALENT TO
STATUS3
CHANNEL1
INPUT4
CONTROL & PROTECTI ON EQUIVALENT TO
STATUS4
CHANNEL1
OUTPUT1
V
CC
OUTPUT2
V
CC
OUTPUT3
V
CC
OUTPUT4
STATUSn Open drain digital diagnostic pin
STAT_DIS
Active high CMOS compatible pin, to disable the STATUS pin
Doc ID 10864 Rev 6 5/31
Block diagram and pin configuration VNQ5050K-E

Figure 2. Configuration diagram (top view)

V
CC
GND INPUT1 STATUS1 INPUT2 STATUS2 INPUT3 STATUS3 INPUT4 STATUS4
STAT_DIS V
CC

Table 3. Suggested connections for unused and not connected pins

1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4
TAB = V
CC
Connection/pin Status N.C. Output Input STAT_DIS
Floating X X X X X
To ground N.R.
1. Not recommended
(1)
XN.R.
Through 10 KΩ
resistor
Through 10 KΩ resistor
6/31 Doc ID 10864 Rev 6
VNQ5050K-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
CC
V
CC
I
SD
V
SD
I
INn
INPUTn
V
INn
Note: V
Fn
= V
- VCC during reverse battery condition
OUTn

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit
GND
OUTPUTnSTAT_DIS
STATUSn
I
GND
I
OUTn
I
STATn
V
STATn
V
OUTn
V
- V
- I
I
OUT
- I
I
STAT
I
STAT_DIS
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
Reverse DC output current 15 A
OUT
I
DC input current +10/-1 mA
IN
DC status current +10/-1 mA
DC status disable current +10 / -1 mA
Maximum switching energy (single pulse)
E
(L=3 mH; RL=0Ω; V
MAX
I
OUT
= I
limL
(typ.))
=13.5V; T
bat
jstart
=150ºC;
104 mJ
Doc ID 10864 Rev 6 7/31
Electrical specifications VNQ5050K-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (human body model: R=1.5KΩ; C=100pF)
4000 4000 4000 5000 5000
V V V V V
V
V
ESD
ESD
T
– Input – Status –STAT_DIS – Output –V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
T
j
Storage temperature - 55 to 150 °C
stg

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Max value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (With one channel ON) 2.8 °C/W
Thermal resistance junction-ambient See Figure 32. °C/W
8/31 Doc ID 10864 Rev 6
VNQ5050K-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8 V<VCC<36 V, -40 °C< Tj <150 °C, unless otherwise stated.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
I
L(off1)
I
L(off2)
1. For each channel.
2. PowerMOS leakage included
Operating supply voltage 4.5 13 36 V
CC
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shutdown hysteresis
On-state resistance
ON
Clamp Voltage IS=20 mA 41 46 52 V
I
Supply current
S
Off-state output current
Off-state output current
Output - VCC diode
V
F
voltage
(1)
I
=2A; Tj=25°C
(1)
OUT
=2A; Tj=150°C
I
OUT
I
=2A; VCC=5V; Tj=25°C
OUT
Off-state; V V
IN=VOUT
CC
=0V; Tj=25°C
On-state; VIN=5V; VCC=13V;
=0A
I
OUT
(1)
V V
IN=VOUT
IN=VOUT
=0V; VCC=13V; Tj=25°C =0V; VCC=13V;
Tj=125°C
(1)
VIN=0V; V
-I
OUT
OUT
=2A; Tj=150°C 0.7 V
0.5 V
50
mΩ
100
65
mΩ mΩ
=13V;
(2)
8
(2)
5
14μAmA
5
μA μA
2
000.01 3
= 4V -75 0 μA
Table 7. Switching (VCC=13V; Tj=25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
=6.5Ω
R
t
d(on)
t
d(off)
dV
OUT
dV
OUT
W
W
ON
OFF
Turn-on delay time
Turn-off delay time
/dt
Turn-on voltage slope
(on)
/dt
Turn-off voltage slope
(off)
Switching energy losses during t
Switching energy losses during t
won
woff
L
(see Figure 6)
=6.5Ω
R
L
(see Figure 6)
RL=6.5Ω (See Figure 16)
RL=6.5Ω (See Figure 18)
RL=6.5Ω (see Figure 6)
RL=6.5Ω (see Figure 6)
-15-μs
-40-μs
--V/μs
--V/μs
-0.19-mJ
-0.27-mJ
Doc ID 10864 Rev 6 9/31
Electrical specifications VNQ5050K-E

Table 8. Status pin (VSD=0)

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
STAT
I
LSTAT
C
STAT
V

Table 9. Protections

Status low output voltage
Status leakage current
Status pin input capacitance
Status clamp voltage
SCL
= 1.6 mA, VSD=0V 0.5 V
I
STAT
Normal operation or V
= 5V
V
STAT
SD
=5V,
Normal operation or VSD=5V, V
= 5V
STAT
I
STAT
I
STAT
= 1mA = - 1mA
5.5
-0.7
10 μA
100 pF
7V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
T
T
T
t
limH
limL
TSD
T
R
RS
HYST
SDL
DC short circuit current
Short circuit current during thermal cycling
Shutdown temperature
Reset temperature
Thermal reset of STATUS
Thermal hysteresis
TSD-TR
)
(T
Status delay in overload conditions
=13V
V
CC
5V<V
CC
=13V
V
CC
TR<Tj<T
T
j>TTSD
<36V
TSD
(See Figure 4)20μs
13.5 19 26.5
26.5AA
7A
150 175 200 °C
TRS + 1
TRS + 5
135 °C
C
V
°C
V
DEMAG
V
Turn-off output voltage clamp
Output voltage drop
ON
limitation
=2A; VIN=0; L=6mH
I
OUT
I
=0.1A (see Figure 5)
OUT
= -40°C...+150°C
T
j
VCC-41
VCC-46
25 mV
Note: To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles

Table 10. Open-load detection

Symbol Parameter Test conditions Min. Typ. Max. Unit
= 5V, 8V<Vcc<18V
I
t
DOL(on)
Open-load on-state
OL
detection threshold
Open-load on-state detection delay
10/31 Doc ID 10864 Rev 6
V
IN
(See Figure 22.)
= 0A, VCC=13V
I
OUT
(See Figure 4.)
10 70 mA
VCC-52
200 μs
V
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