ST VNQ5050AK-E User Manual

Quad channel high side driver with analog current sense
Features
Parameters Symbol Value
Max supply voltage V
Operating voltage range V
Max on-state resistance (per ch.) R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected.
General features:
power limitation – Very low standby current – 3.0V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC
European directive
Diagnostic functions:
– Proportional load current sense – High current sense precision for wide
current range – Current sense disable – Thermal shutdown indication – Very low current sense leakage
Protection:
– Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss of V – Thermal shutdown

Table 1. Device summary

Package
CC
CC
ON
LIMH
S
41 V
4.5 to 36 V
50 mΩ
19 A
(1)
2µA
CC
VNQ5050AK-E
for automotive applications
PowerSSO-24
– Reverse battery protection (see Figure 25) – Electrostatic discharge protection
Application
All types of resistive, inductive and capacitive
loads.
Suitable as LED driver.
Description
The VNQ5050AK-E is a monolithic device made using STMicroelectronics VIPower M0-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V device against low energy spikes (see ISO7637 transient compatibility table).
This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition.
Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to a safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as the fault condition disappears.
Order codes
Tube Tape and Reel
pin voltage clamp protects the
CC
PowerSSO-24 VNQ5050AK-E VNQ5050AKTR-E
May 2009 Doc ID 13329 Rev 9 1/31
www.st.com
1
Contents VNQ5050AK-E
Contents
1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 20
3.1.2 Solution 2: a diode (DGND) in the ground line. . . . . . . . . . . . . . . . . . . . 21
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31 Doc ID 13329 Rev 9
VNQ5050AK-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (V Table 8. Current sense (8V<V
Table 9. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
=13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CC
Doc ID 13329 Rev 9 3/31
List of figures VNQ5050AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. I
OUT/ISENSE
Figure 8. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 15. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. On-state resistance vs T Figure 17. On-state resistance vs V
Figure 18. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 19. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 20. I
LIMH
vs T
Figure 21. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 22. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 24. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 25. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
Figure 28. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 24
Figure 30. PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) . . . . . 25
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 33. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 34. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
vs I
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4/31 Doc ID 13329 Rev 9
VNQ5050AK-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V
CC
V
CC
CLAMP
GND
INPUT1
LOGIC
INPUT2
INPUT3
INPUT4
Pwr
CS_DIS

Table 2. Pin functions

Name Function
V
CC
OUTPUT
GND
INPUT
n
n
Battery connection
Power output
Ground connection. Must be reverse battery protected by an external diode/resistor network
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
UNDERVOLTAGE
DRIVER 1
I
OUT1
1
LIM
PwCLAMP 1
I
LIM
V
DSLIM
OVERTEMP. 1
K 1
OUTPUT1
CURRENT SENSE1
V
1
1
INPUT2
CURRENT
SENSE2
INPUT3
CURRENT
SENSE3
INPUT4
CURRENT
SENSE4
Control & Protection Equivalent to channel1
Control & Protection Equivalent to channel1
Control & Protection Equivalent to channel1
CC
V
CC
V
CC
OUTPUT2
CURRENT SENSE2
OUTPUT3
CURRENT SENSE3
OUTPUT4
CURRENT SENSE4
CURRENT SENSE
Analog current sense pin, delivers a current proportional to the load current
n
CS_DIS Active high CMOS compatible pin, to disable the current sense pin
Doc ID 13329 Rev 9 5/31
Block diagram and pin configuration VNQ5050AK-E

Figure 2. Configuration diagram (top view)

V
CC
GND
INPUT1
CURRENT SENSE1
INPUT2
CURRENT SENSE2
INPUT3
CURRENT SENSE3
INPUT4
CURRENT SENSE4
CS_DIS.
V
CC
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
TA B = V

Table 3. Suggested connections for unused and not connected pins

CC
Connection/pin Current sense N.C. Output Input CS_DIS
Floating N.R.
To ground
1. Not recommended.
(1)
Through 1 kΩ
resistor
XX X X
XN.R.
Through 10 kΩ
resistor
Through 10 kΩ
resistor
6/31 Doc ID 13329 Rev 9
VNQ5050AK-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
CC
I
CSD
V
CSD
I
INn
V
INn
CS_DIS
INPUTn
GND
OUTPUTn
CURRENT S
ENSEn
I
GND
I
SENSEn
V
SENSEn
V
Fn
I
OUTn
V
OUTn
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn

2.1 Absolute maximum ratings

Stress values that exceed those listed in the “Absolute maximum ratings” table can cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any other conditions greater than those, indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit
- I
- I
V
-V
I
OUT
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
Reverse DC output current 20 A
OUT
DC input current -1 to 10 mA
I
IN
I
CSD
-I
CSENSE
V
CSENSE
E
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
Current sense maximum voltage
Maximum switching energy (single pulse)
MAX
(L=3 mH; R
=0 Ω; V
L
=13.5 V; T
bat
jstart
=150 ºC; I
OUT
= I
limL
(Typ.))
V
-41
CC
+V
CC
104 mJ
V V
Doc ID 13329 Rev 9 7/31
Electrical specifications VNQ5050AK-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (human body model: R=1.5KΩ; C=100pF)
4000 2000 4000 5000 5000
V V V V V
V
V
ESD
ESD
T
– Input – Current sense –CS_DIS – Output –V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
T
j
Storage temperature -55 to 150 °C
stg

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Max value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (With one channel ON) 2.8 °C/W
Thermal resistance junction-ambient See Figure 29 °C/W
8/31 Doc ID 13329 Rev 9
VNQ5050AK-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8 V<VCC<36V, -40°C<Tj<150 °C, unless otherwise stated.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
I
L(off)
1. PowerMOS leakage included.
2. For each channel.
Operating supply voltage 4.5 13 36 V
CC
Undervoltage shutdown - 3.5 4.5 V
USD
Undervoltage shutdown hysteresis
On-state resistance
ON
Clamp voltage IS=20 mA 41 46 52 V
I
Supply current
S
Off-state output current
Output - VCC diode
V
F
voltage
(2)
I
=2 A; Tj=25 °C
OUT
=2 A; Tj=150 °C
I
OUT
I
=2 A; VCC=5 V; Tj=25 °C
OUT
Off-State; VCC=13 V; Tj=25 °C; VIN=V
OUT=VSENSE=VCSD
On-State; V I
OUT
VIN=V Tj=25 °C
(2)
V
=0 A
OUT
IN=VOUT
=13 V; VIN=5 V;
CC
=0 V; VCC=13 V;
=0 V; VCC=13 V;
Tj=125 °C
-I
=2 A; Tj=150 °C - - 0.7 V
OUT
=0 V
-0.5 - V
mΩ
--50100
(1)
2
5
­8
000.01 3
mΩ
65
mΩ
(1)
14µAmA
µA
5

Table 7. Switching (VCC=13V)

Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
(dV
OUT
(dV
OUT
W
ON
W
OFF
Turn-on delay time RL= 6.5 Ω (see Figure 6)- 20 - µs
Turn-off delay time RL= 6.5 Ω (see Figure 6)- 45 - µs
/dt)onTurn-on voltage slope RL= 6.5 Ω -
/dt)
Turn-off voltage slope RL= 6.5 Ω -
off
Switching energy losses during t
won
Switching energy losses during
t
woff
RL= 6.5 Ω (see Figure 6) - 0.15 - mJ
RL= 6.5 Ω (see Figure 6)- 0.3 - mJ
See
Figure 19
See
Figure 21
-V/µs
-V/µs
Doc ID 13329 Rev 9 9/31
Electrical specifications VNQ5050AK-E

Table 8. Current sense (8V<VCC<16V)

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 0.05 A;
OUT
dK
dK
K
K
1/K1
K
2/K2
I
0
1
2
OUT/ISENSE
I
OUT/ISENSE
(1)
Current sense ratio drift
I
OUT/ISENSE
(1)
Current sense ratio drift
V T
I V T
= 0.5 V; V
SENSE
= -40°C...150°C
j
= 1 A;
OUT
= 0.5 V; V
SENSE
= -40°C...150°C
j
CSD
CSD
Tj= 25 °C...150 °C
I
= 1 A; V
OUT
V
= 0 V;
CSD
= -40 °C to 150 °C
T
J
I
= 2 A;
OUT
V T T
I V
= 4 V; V
SENSE
= -40°C...150°C
j
= 25 °C...150 °C
j
= 2 A; V
OUT
= 0 V;
CSD
SENSE
CSD
SENSE
= 0.5 V;
= 4 V;
TJ= -40 °C to 150 °C
=0 V;
=0 V;
= 0 V;
1340 2420 3460
1370
1860
2510
1510
1860
2210
-10 - 10 %
1590
1760
2140
1600
1760
1930
-8 - 8 %
I
= 4 A;
OUT
dK
K
3
3/K3
I
OUT/ISENSE
(1)
Current sense ratio drift
V T T
I V
= 4 V; V
SENSE
= -40°C...150°C
j
= 25 °C...150 °C
j
= 4 A; V
OUT
CSD
SENSE
= 0 V;
CSD
= 0 V;
= 4 V;
1650
1740
1950
1650
1740
1830
-5 - 5 %
-
TJ= -40 °C to 150 °C
I
I
SENSE0
Analog sense leakage current
= 0 A; V
OUT
V
= 5 V; VIN= 0 V;
CSD
= -40°C...150°C
T
j
= 0 V; VIN= 5 V;
V
CSD
= -40°C...150°C
T
j
= 2 A; V
I
OUT
= 5 V; VIN= 5 V;
V
CSD
= -40°C...150°C
T
j
SENSE
SENSE
= 0 V;
= 0 V;
0
-
1
µA
0
-
2
µA
0
-
1
µA
Openload ON state
I
OL
current detection
VIN = 5 V, I
= 5 µA 4 - 20 mA
SENSE
threshold
V
SENSE
Max analog sense output voltage
I
OUT
= 4 A; V
= 0 V 5 - - V
CSD
Analog sense output
V
SENSEH
voltage in over
V
CC
= 13 V; R
= 10 KΩ -9-V
SENSE
temperature condition
10/31 Doc ID 13329 Rev 9
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