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VNQ5027AK-E
User Manual
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ST VNQ5027AK-E User Manual

Features
VNQ5027AK-E
Quad channel high side driver with analog current sense
for automotive applications
Max supply voltage V
Operating voltage range V
Max on-state resistance (per ch.) R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected.
■ Output current: 42A
■ Current sense disable
■ Proportional load current sense
■ Undervoltage shut-down
■ Overvoltage clamp
■ Thermal shutdown
■ Current and power limitation
■ Very low standby current
■ Protection against loss of ground and loss of
V
CC
■
Very low electromagnetic susceptibility
■ Optimized electromagnetic emission
■ Reverse battery protection (see Application
CC
CC
ON
LIMH
S
schematic on page 20)
■ In compliance with the 2002/95/EC European
directive
■ Package: ECOPACK
®

Table 1. Device summary

Package
41V
4.5 to 36 V
27 mΩ
42 A
(1)
2 µA
PowerSSO-24
Applications
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VNQ5027AK-E is a monolithic device made using STMicroelectronics VIPower technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
This device integrates an analog Current Sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shut-down intervention.
Thermal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears.
Order codes
Tube Tape and reel
CC pin
PowerSSO-24 VNQ5027AK-E VNQ5027AKTR-E
July 2009 Doc ID 12730 Rev 6 1/31
www.st.com
1
Contents VNQ5027AK-E
Contents
1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 20
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-24™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31 Doc ID 12730 Rev 6
VNQ5027AK-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC=13V; Tj= 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Current Sense (8V<V
Table 9. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CC
Doc ID 12730 Rev 6 3/31
List of figures VNQ5027AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Delay response time between rising edge of output current and rising edge of Current Sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. I
OUT/ISENSE
Figure 8. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 15. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. On-state resistance vs T Figure 17. On-state resistance vs V
Figure 18. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 19. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 20. I
LIMH
vs T
Figure 21. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 22. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 24. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 25. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
Figure 28. PowerSSO-24™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 24
Figure 30. PowerSSO-24™ thermal impedance junction ambient single pulse (one channel on). . . . 25
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24™ . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 33. PowerSSO-24™ tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 34. PowerSSO-24™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
vs I
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4/31 Doc ID 12730 Rev 6
VNQ5027AK-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V
CC
Pwr
LIM
UNDERVOLTAGE
DRIVER 1
OVERTEMP. 1
I
OUT1
K 1
1
PwCLAMP 1
I
1
LIM
V
DSLIM
INPUT2
Control & Protection Equivalent to
1
CURRENT
SENSE2
INPUT3
CURRENT
SENSE3
INPUT4
CURRENT
SENSE4
channel1
Control & Protection Equivalent to channel1
Control & Protection Equivalent to channel1
V
CC
CLAMP
GND
INPUT1
INPUT2
INPUT3
INPUT4
CS_DIS

Table 2. Pin functions

LOGIC
Name Function
V
CC
OUTPUT
GND
INPUT
n
CURRENT
SENSE
n
Battery connection.
Power output.
n
Ground connection. Must be reverse battery protected by an external diode / resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state.
Analog current sense pin, delivers a current proportional to the load current.
CS_DIS Active high CMOS compatible pin to disable the current sense pin.
V
V
V
CC
CC
CC
OUTPUT1
CURRENT SENSE1
OUTPUT2
CURRENT SENSE2
OUTPUT3
CURRENT SENSE3
OUTPUT4
CURRENT SENSE4
Doc ID 12730 Rev 6 5/31
Block diagram and pin configuration VNQ5027AK-E

Figure 2. Configuration diagram (top view)

V
GND
INPUT1
CURRENT SENSE1
INPUT2
CURRENT SENSE2
INPUT3
CURRENT SENSE3
INPUT4
CURRENT SENSE4
CS_DIS.
V
CC
CC
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
TA B = V

Table 3. Suggested connections for unused and not connected pins

CC
Connection / pin Current Sense N.C. Output Input CS_DIS
Floating N.R.
To ground
1. Not recommended.
(1)
Through 1 kΩ
resistor
XX X X
XN.R.
Through 10 kΩ
resistor
Through 10 kΩ
resistor
6/31 Doc ID 12730 Rev 6
VNQ5027AK-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
CC
I
CSD
V
CSD
I
INn
V
INn
CS_DIS
INPUTn
GND
OUTPUTn
CURRENT S
ENSEn
I
GND
I
SENSEn
V
SENSEn
V
Fn
I
OUTn
V
OUTn
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit
- I
- I
V
-V
I
OUT
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
Reverse DC output current 24 A
OUT
DC Input current -1 to 10 mA
I
IN
I
CSD
-I
CSENSE
V
CSENSE
E
DC Current Sense disable Input current -1 to 10 mA
DC Reverse CS pin current 200 mA
Current Sense maximum voltage
Maximum switching energy (single pulse)
MAX
(L=0.8 mH; R
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(Typ.))
V
-41
CC
+V
CC
140 mJ
V V
Doc ID 12730 Rev 6 7/31
Electrical specifications VNQ5027AK-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (human body model: R=1.5KΩ; C=100pF)
4000 2000 4000 5000 5000
V V V V V
V
V
ESD
ESD
T
– Input – Current sense –CS_DIS – Output –V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature - 40 to 150 °C
T
j
Storage temperature - 55 to 150 °C
stg

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Max value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (with one channel ON) 1.35 °C/W
Thermal resistance junction-ambient See Figure 29. °C/W
8/31 Doc ID 12730 Rev 6
VNQ5027AK-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8 V<VCC<36 V, -40 °C< Tj <150 °C, unless otherwise stated.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
I
L(off)
1. PowerMOS leakage included.
2. For each channel.
Operating supply voltage 4.5 13 36 V
CC
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shut-down hysteresis
On-state resistance
ON
Clamp voltage IS= 20 mA 41 46 52 V
I
Supply current
S
Off-state output current
Output - VCC diode
V
F
voltage
(2)
I
= 3A; Tj= 25°C
OUT
= 3A; Tj= 150°C
I
OUT
I
= 3A; VCC=5V; Tj= 25°C
OUT
Off-state; V V
IN=VOUT=VSENSE=VCSD
On-state; V I
OUT
VIN=V Tj=25°C
(2)
V
IN=VOUT
CC
CC
=0A
=0V; VCC=13V;
OUT
=0V; VCC=13V;
Tj=125°C
-I
=3A; Tj=150°C 0.7 V
OUT
=13V; Tj=25°C;
=0V
=13V; VIN=5V;
0.5 V
(1)
2
5
8
000.01 3
27 54 37
(1)
14
5
mΩ mΩ mΩ
µA
mA
µA
Table 7. Switching (VCC=13V; Tj= 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
(dV
OUT
(dV
OUT
W
ON
W
OFF
Turn-on delay time RL= 4.3Ω (see Figure 6.)40 µs
Turn-off delay time RL= 4.3Ω (see Figure 6.)40 µs
/dt)onTurn-on voltage slope RL= 4.3Ω
/dt)
Turn-off voltage slope RL= 4.3Ω
off
Switching energy losses during t
won
Switching energy losses during
t
woff
RL= 4.3Ω (see Figure 6.)0.2 mJ
RL= 4.3Ω (see Figure 6.)0.3 mJ
See
Figure 19.
See
Figure 21.
V/µs
V/µs
Doc ID 12730 Rev 6 9/31
Electrical specifications VNQ5027AK-E

Table 8. Current Sense (8V<VCC<16V)

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 0.5A;
OUT
dK
dK
dK
K
0
0/K0
K
1
1/K1
K
2
2/K2
K
3
I
OUT/ISENSE
(1)
Current sense ratio drift
I
OUT/ISENSE
(1)
Current sense ratio drift
I
OUT/ISENSE
(1)
Current sense ratio drift
I
/ I
OUT
SENSE
V
= 0.5 V; V
SENSE
= -40°C...150°C
T
j
I
= 0.5A; V
OUT
= 0V;
V
CSD
= -40 °C to 150 °C
T
J
I
= 2A;
OUT
V
SENSE
= 4 V; V
SENSE
CSD
Tj= -40°C...150°C
= 25°C...150°C
T
j
I
= 2A; V
OUT
V
CSD
= -40 °C to 150 °C
T
J
I
OUT
V
SENSE
= -40°C...150°C
T
j
= 0V;
= 3A;
= 4 V; V
SENSE
CSD
Tj= 25°C...150°C
I
= 3A; V
OUT
V
CSD
= -40 °C to 150 °C
T
J
I
OUT
V
SENSE
= -40°C...150°C
T
j
= 0V;
= 10A;
= 4 V; V
SENSE
CSD
Tj= 25°C...150°C
CSD
= 0.5V;
=0 V;
= 4V;
=0 V;
= 4V;
= 0 V;
=0 V;
1680 2910 4120
-12 12 %
2050 2190
2700 2700
3410 3210
-10 10 %
2260 2350
2690 2690
3160 3030
-7 7 %
2490 2590
2700 2700
2870 2800
I
= 10A; V
OUT
V
= 0V;
CSD
= -40 °C to 150 °C
T
J
I
= 0A; V
OUT
= 5V; VIN= 0V;
V
CSD
= -40°C...150°C
T
j
= 0V; VIN= 5V;
V
CSD
= -40°C...150°C
T
j
= 2A; V
I
OUT
= 5V; VIN= 5V;
V
CSD
dK
3/K3
I
SENSE0
(1)
Current sense ratio drift
Analog sense leakage current
Tj= -40°C...150°C
I
V
SENSE
OL
open load on-state current detection threshold
Max analog sense output voltage
V
I
OUT
IN
= 5V, I
= 3A; V
10/31 Doc ID 12730 Rev 6
= 4 V;
SENSE
-4 4 %
= 0V;
SENSE
0
0
= 0V;
SENSE
0
= 5 µA 5 30 mA
SENSE
= 0V 5 V
CSD
µA
1
µA
2
µA
1
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