ST VNP7N04 User Manual
VNP7N04
"OMNIFET":
FULLY AUTOPROTECTED POWER MOSFET
TYPE V
VNP7N04 42 V 0.14 Ω 7 A
■ LINEAR CURRENT LIMITATION
■ THERMAL SHUT DO W N
■ SHORT CIRCUIT PROTECTION
■ INTEGRATED CLAMP
■ LOW CURRENT DRAWN FROM INPUT PIN
■ DIAGNOSTIC FEEDBACK THROUGH INPUT
clamp
R
DS(on)
I
lim
PIN
■ ESD PROTECTION
■ DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
■ COMPATIBLE WITH STANDARD POWER
MOSFET
■ STANDARD TO-220 PAC KA GE
DESCRIP TION
The VNP7N04 is a monolithic device made using
STMicroelectronics VIPower M0 Technology,
intended
for replacement of standard power
MOSFETS in DC to 50 KHz applications.
Built-in thermal shut-down, linear current limi-
BLOCK DIAG RAM
3
2
1
TO-220
tation and overvoltage clamp protect the chip
in harsh enviroments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
March 2004
1/11
VNP7N04
ABSOLUTE MAXIMUM RATING
Symbol Parameter Value Unit
V
V
V
P
T
T
THERMAL DATA
R
thj-case
R
thj-amb
Drain-source Voltage (Vin = 0) Internally Clamped V
DS
Input Voltage 18 V
in
I
Drain Current Internally Limited A
D
I
Reverse DC Output Current -7 A
R
Electrostatic Discharge (C= 100 pF, R=1.5 KΩ)
esd
Total Dissipation at Tc = 25 oC31W
tot
T
Operating Junction Temperature Internally Limited
j
Case Operating Temperature Internally Limited
c
Storage Temperature -55 to 150
stg
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
2000 V
4
62.5
o
o
o
C
o
C
o
C
C/W
C/W
ELECTRICAL CHARACTERISTICS (T
= 25 oC unless otherwise specified)
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
CLAMP
Drain-source Clamp
ID = 200 mA V
= 0 364248 V
in
Voltage
V
CLTH
Drain-source Clamp
ID = 2 mA V
= 0 35 V
in
Threshold Voltage
V
INCL
Input-Source Reverse
I
= -1 mA -1 -0.3 V
in
Clamp Voltage
I
I
DSS
ISS
Zero Input Voltage
Drain Current (V
in
Supply Current from
= 0)
= 13 V V
V
DS
V
= 25 V V
DS
= 0
in
= 0
in
VDS = 0 V Vin = 10 V 250 500 µA
50
200
Input Pin
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
IN(th)
Input Threshold
V
= Vin ID + Iin = 1 mA 0.8 3 V
DS
Voltage
R
DS(on)
Static Drain-source On
Resistance
Vin = 10 V ID = 3.5 A
V
= 5 V ID = 3.5 A
in
0.14
0.28
DYNAMIC
µA
µA
Ω
Ω
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(∗) Forward
fs
V
= 13 V ID = 3.5 A 3.5 5 S
DS
Transconductance
C
Output Capacitance V
oss
= 13 V f = 1 MHz V
DS
= 0 250 400 pF
in
2/11
VNP7N04
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING (∗∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
t
d(off)
t
t
d(on)
t
t
d(off)
t
(di/dt)
Q
Turn-on Delay Time
Rise Time
r
Turn-off Delay Time
Fall Time
f
Turn-on Delay Time
Rise Time
r
Turn-off Delay Time
Fall Time
f
Turn-on Current Slope V
on
Total Input Charge VDD = 12 V ID = 3.5 A V
i
V
= 15 V Id = 3.5 A
DD
V
= 10 V R
gen
(see figure 3)
V
= 15 V Id = 3.5 A
DD
V
= 10 V R
gen
(see figure 3)
= 15 V ID = 3.5 A
DD
= 10 V R
V
in
gen
gen
gen
= 10 Ω
= 1000 Ω
= 10 Ω
50
60
130
50
140
0.4
2.5
50 A/µs
= 10 V 18 nC
in
SOURCE DRAIN DIO DE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VSD (∗) Forward On Voltage ISD = 3.5 A Vin = 0 1.6 V
Q
I
RRM
t
(∗∗)
rr
rr
(∗∗)
(∗∗)
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I
= 3.5 A di/dt = 100 A/µs
SD
V
= 30 V Tj = 25 oC
DD
(see test circuit, figure 5)
70
0.2
3.6
100
120
200
100
280
0.8
4
1
2
ns
ns
ns
ns
ns
µs
µs
µs
ns
µC
A
PROTECTION
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
lim
t
dlim
T
jsh
T
jrs
Igf (∗∗) Fault Sink Current Vin = 10 V VDS = 13 V
Eas (∗∗) Single Pulse
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(∗∗) Parameters guaranteed by design/characterizat i on
Drain Current Limit Vin = 10 V VDS = 13 V
V
= 5 V VDS = 13 V
in
(∗∗) Step Response
Current Limit
Vin = 10 V
V
= 5 V
in
(∗∗) Overtemperature
5
5
150
Shutdown
(∗∗) Overtemperature Reset 135
V
= 5 V VDS = 13 V
in
0.4 J
Avalanche Energy
starting Tj = 25 oC VDD = 20 V
= 10 V R
V
in
= 1 KΩ L = 30 mH
gen
13
15
50
20
7
7
10
10
20
25
A
A
µs
µs
o
C
o
C
mA
mA
3/11
VNP7N04
PROTECTION FEATURES
During normal operation, the Input pin is
electrically connected to the gate of the internal
power MOSFET. The device then behaves like a
standard power MOSFET and can be used as a
switch from DC to 50 KHz. The only difference
from the user’s standpoint is that a small DC
current (I
) flows into the Input pin in order to
iss
supply the internal circuitry.
The device integrates:
- OVERVOLTAGE CLAMP PROTECTION:
internally set at 42V, along with the rugged
avalanche characteristics of the Power
MOSFET stage give this device unrivalled
ruggedness and energy handling capability.
This feature is mainly important when driving
inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT: limits
the drain current Id to Ilim whatever the Input
pin voltage. When the current limiter is active,
the device operates in the linear region, so
power dissipation may exceed the capability of
the heatsink. Both case and junction
temperatures increase, and if this phase lasts
long enough, junction temperature may reach
the overtemperature threshold T
jsh
.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing
the chip temperature and are not dependent on
the input voltage. The location of the sensing
element on the chip in the power stage area
ensures fast, accurate detection of the junction
temperature. Overtemperature cutout occurs at
minimum 150
restarted when the chip temperature falls
below 135
o
C. The device is automatically
o
C.
- STATUS FEEDBACK: In the case of an
overtemperature fault condition, a Status
Feedback is provided through the Input pin.
The internal protection circuit disconnects the
input from the gate and connects it instead to
ground via an equivalent resistance of 100 Ω.
The failure can be detected by monitoring the
voltage at the Input pin, which will be close to
ground potential.
Additional features of this device are ESD
protection according to the Human Body model
and the ability to be driven from a TTL Logic
circuit (with a small increase in R
DS(on)
).
4/11
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