Quad high side smart power solid state relay
Features
Typ e V
VNI4140K-32 VCC-41 V 0.08 Ω 1 A 41 V
1. Per channel
■ Output current: 1 A per channel
■ Shorted load protections
■ Junction overtemperature protection
■ Case overtemperature protection for thermal
demag
(1)
independence of the channels
■ Thermal case shutdown restart not
simultaneous for the various channels
■ Protection against loss of ground
■ Current limitation
■ Undervoltage shutdown
■ Open drain diagnostic outputs
■ 3.3 V CMOS/TTL compatible inputs
■ Fast demagnetization of inductive loads
■ Conforms to IEC 61131-2
■ ESD according to IEC 61000-4-2 up to +/-
25 KV
R
DSon
(1)
I
out
(1)
V
CC
VNI4140K-32
Datasheet − production data
PowerSSO-24
Description
The VNI4140K-32 is a monolithic device made
using STMicroelectronics VIPower technology,
intended for driving four independent resistive,
capacitive or inductive loads with one side
connected to ground. Active current limitation
avoids the system power supply dropping in the
case of shorted load. Built-in thermal shutdown
protects the chip from overtemperature and shortcircuit. In overload condition, the channel turns
OFF and back ON automatically so as to maintain
junction temperature between T
condition causes case temperature to reach
T
, the overloaded channel is turned OFF and
CSD
restarts only when case temperature has
decreased down to T
. In the case of more than
CR
one channel in overload, re-start of the
overloaded channels is not simultaneous, in order
to avoid high peak current from the supply. Nonoverloaded channels continue to operate
normally. The open drain diagnostic outputs
indicate overtemperature conditions.
and TR. If this
TSD
Figure 1. Block diagram
March 2012 Doc ID022576 Rev 3 1/26
This is information on a product in full production.
www.st.com
26
Contents VNI4140K-32
Contents
1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Recommended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
9 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
9.1 VNI4140K-32 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
10 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
12 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26 Doc ID022576 Rev 3
VNI4140K-32 Pin connection
1 Pin connection
Figure 2. Pin connection (top view)
V
CC
IN1
STAT1
IN2
STAT2
GND
STAT3
IN3
STAT4
IN4
NC
NC
Table 1. Pin description
Pin Name Description
Tab TAB Exposed tab internally connected to Vcc
1 Vcc Supply voltage
2 IN1 Channel 1 input 3.3 V CMOS/TTL compatible
3 STAT1 Channel 1 status in open drain configuration
4 IN2 Channel 2 input 3.3 V CMOS/TTL compatible
OUT1
OUT1
OUT1
OUT2
OUT2
OUT2
OUT3
OUT3
OUT3
OUT4
OUT4
OUT4
5 STA2 Channel 2 status in open drain configuration
6 GND Device ground connection
7 STAT3 Channel 3 status in open drain configuration
8 IN3 Channel 3 input 3.3 V CMOS/TTL compatible
9 STAT4 Channel 4 status in open drain configuration
10 IN4 Channel 4 input 3.3 V CMOS/TTL compatible
11 NC
12 NC
13 OUT4 Channel 4 power stage output, internally protected
14 OUT4 Channel 4 power stage output, internally protected
15 OUT4 Channel 4 power stage output, internally protected
16 OUT3 Channel 3 power stage output, internally protected
17 OUT3 Channel 3 power stage output, internally protected
Doc ID022576 Rev 3 3/26
Pin connection VNI4140K-32
Table 1. Pin description (continued)
Pin Name Description
18 OUT3 Channel 3 power stage output, internally protected
19 OUT2 Channel 2 power stage output, internally protected
20 OUT2 Channel 2 power stage output, internally protected
21 OUT2 Channel 2 power stage output, internally protected
22 OUT1 Channel 1 power stage output, internally protected
23 OUT1 Channel 1 power stage output, internally protected
24 OUT1 Channel 1 power stage output, internally protected
4/26 Doc ID022576 Rev 3
VNI4140K-32 Maximum ratings
2 Maximum ratings
Table 2. Absolute maximum rating
Symbol Parameter Value Unit
V
-V
I
I
V
I
V
E
P
T
GND
OUT
V
STAT
Power supply voltage 41 V
CC
Reverse supply voltage -0.3 V
CC
DC ground reverse current -250 mA
Output current (continuos) Internally limited A
I
Reverse output current (per channel) -5 A
R
I
Input current (per channel) ± 10 mA
IN
Input voltage +V
IN
Status pin voltage +V
STAT
Status pin current ± 10 mA
Electrostatic discharge (R = 1.5 kΩ; C = 100 pF) 2000 V
ESD
Single pulse avalanche energy per channel not
AS
simultaneous
Power dissipation at Tc = 25 °C Internally limited W
TOT
T
Junction operating temperature Internally limited °C
J
Storage temperature -55 to 150 °C
STG
2.1 Thermal data
CC
CC
V
V
300 mJ
Table 3. Thermal data
Symbol Parameter Value Unit
R
th(JC)
R
th(JA)
1. Per channel.
Thermal resistance junction-case
Thermal resistance junction-ambient Max. see Figure 11 °C/W
3 Recommended
Table 4. Input switching limits
Symbol Parameter Value Unit
f
Vin MAX
Maximum input switching frequency 10 kHz
(1)
Max. 2 °C/W
Doc ID022576 Rev 3 5/26
Electrical characteristics VNI4140K-32
4 Electrical characteristics
10.5 V < VCC < 36 V; -40 °C < TJ < 125 °C; unless otherwise specified.
Table 5. Power section
Symbol Parameter Test condition Min. Typ. Max. Unit
Vcc Supply voltage 10.5 36 V
I
R
DS(ON)
V
clamp
= 0.7 A at TJ = 25 °C
ON state resistance
OUT
I
OUT
= 0.7 A
Is = 20 mA 41 45 52 V
I
S
Supply current
All channels in OFF state,
ON state with V
IN
= 5 V
250
2.4 4
0.080
0.140ΩΩ
µA
mA
V
OUT(OFF)
I
OUT(OFF)
I
LGND
F
1. To cover EN55022 class A and class B normative.
= 24 V; -25 °C < TJ < 125 °C, RL = 48 Ω, input rise time < 0.1 µs)
V
CC
OFF state output
voltage
OFF state output
current
Output current in
ground disconnection
Charge pump
CP
frequency
V
= 0 V and I
IN
V
= V
IN
= V
V
cc
= 0 V 0 5 µA
OUT
= GND = 24 V;
IN
= 0 A 1 V
OUT
TJ = 125 °C
Channel in ON state
(1)
500 µA
1450 kHz
Table 6. Switching
Symbol Parameter Test condition Min. Typ. Max. Unit
t
d
t
d
(OFF)
dV/dt
dV/dt
(ON)
Tu r n O N d el ay 6 µ S
t
Rise time 5 µS
r
Turn OFF 12 µS
t
Fall time 5 µS
f
Turn ON voltage slope 4 V/µS
(ON)
Turn OFF voltage
(off)
slope
4V/µS
6/26 Doc ID022576 Rev 3
VNI4140K-32 Electrical characteristics
Figure 3. Switching parameter conventions
6OUT
6IN
D6D4nT
D6/.
T
T
D
/.
T
RISE
D
D6/&&
/&&
FALL
TFTR
T
6OUT
TD/.
TD/&&
T
T
Doc ID022576 Rev 3 7/26
Electrical characteristics VNI4140K-32
Table 7. Logical input
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
I(HYST)
I
Table 8. Protection and diagnostic
Input low level voltage 0.8 V
IL
Input high level voltage 2.20 V
IH
Input hysteresis
voltage
Input current
IN
V
= 15 V 10
IN
= 36 V 210
V
IN
0.15 V
Symbol Parameter Test conditions Min. Typ. Max. Unit
v
STAT
V
USD
V
USDHYS
I
LIM
I
PEAK
I
LSTAT
T
TSD
Status voltage
output low
I
= 1.6 mA 0.6 V
STAT
Undervoltage
protection
Undervoltage
hysteresis
DC short-circuit
current
Maximum DC output
current
V
= 24 V; R
CC
Dynamic load 1.6 A
Status leakage current VCC = V
Junction shutdown
temperature
710.5V
0.4 0.5 V
< 10 mΩ 1.01 2.6 A
LOAD
= 36 V 30 µΑ
STAT
150 170 190 °C
µΑ
T
T
HIST
T
CSD
T
T
CHYST
V
demag
Junction reset
R
temperature
Junction thermal
hysteresis
Case shutdown
temperature
Case reset
CR
temperature
Case thermal
hysteresis
Output voltage at
turn-OFF
I
OUT
= 0.5 A; L
LOAD
8/26 Doc ID022576 Rev 3
>= 1 mH
135 °C
715 °C
125 130 135 °C
110 °C
715 °C
-41VCC-45VCC-
V
CC
52
V
VNI4140K-32 Electrical characteristics
Figure 4. Current and voltage conventions
Doc ID022576 Rev 3 9/26
Truth table VNI4140K-32
5 Truth table
Table 9 . Truth ta b l e
Conditions INPUTn OUTPUTn STATUSn
Normal operation
Overtemperature
Undervoltage
Shorted load
(Current limitation before thermal shutdown)
L
H
L
H
L
H
L
H
L
H
L
L
L
L
L
X
H
H
H
L
X
X
H
H
10/26 Doc ID022576 Rev 3
VNI4140K-32 Thermal management
6 Thermal management
The power dissipation in the IC is the main factor that sets the safe operating condition of
the device in the application. Therefore, it must be very carefully considered. Furthermore,
the available space on the PCB should be chosen considering the power dissipation.
Heatsinking can be achieved using copper on the PCB with proper area and thickness. Two
different protections have been implemented to guarantee safety of the device if it overheats
due to an overloaded condition or high environment temperature. The following flowchart
explains in detail this protection functionality.
Figure 5. Thermal behavior
Vi n( i ) = H
OUT(i) On
STAT(i) Off (H)
NO
Tj ( i ) > Tt s d
YES
4)
Tc > Tc r
1)
STAT(i) On (L)
YES
OUT(i) Off
Tc > Tc s d
NO
NOYES
2)
NO
Tj(i) > Tjr
3)
Doc ID022576 Rev 3 11/26
YES
Switching waveforms VNI4140K-32
7 Switching waveforms
Figure 6. Switching waveforms
12/26 Doc ID022576 Rev 3
VNI4140K-32 Pin functions
8 Pin functions
Figure 7. Input circuit
Figure 8. Status circuit
Doc ID022576 Rev 3 13/26
Pin functions VNI4140K-32
Figure 9. Charge pump switching frequency (typical) vs. temperature
Freq_CP
2000
1800
1600
1400
1200
CP_frequency (KHz)
1000
800
-50 0 50 100 150 200
temperature("C)
Freq_CP
14/26 Doc ID022576 Rev 3
VNI4140K-32 Package and PCB thermal data
9 Package and PCB thermal data
9.1 VNI4140K-32 thermal data
Figure 10. VNI4140K-32 PCB
Note: Layout condition of R
FR4 area = 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness = 70 mm (front and back
side), Copper areas: from minimum pad layout to 8 cm
Figure 11. R
vs. PCB copper area in open box free air condition (one channel ON)
thJA
and Zth measurements (PCB: Double layer, Thermal Vias,
th
2
).
Doc ID022576 Rev 3 15/26
Package and PCB thermal data VNI4140K-32
Figure 12. VNI4140K-32 thermal impedance junction ambient single pulse
(one channel ON)
16/26 Doc ID022576 Rev 3
VNI4140K-32 Reverse polarity protection
10 Reverse polarity protection
This schematic can be used with any type of load.
The following is an indication on how to dimension the R
R
= (-VCC) / (-I
GND
where -I
maximum rating section of the device datasheet.
Power dissipation in R
PD = (-V
Note: In normal conditions (no reverse polarity) due to the diode there is a voltage drop between
GND of the device and GND of the system.
Figure 13. Reverse polarity protection
is the DC reverse ground pin current and can be found in the absolute
GND
)2/R
CC
GND
GND
)
(when VCC < 0: during reverse polarity situations) is:
GND
+ Vcc
+ Vcc
Input
Input
i
i
Output
Output
Status
Status
i
i
GND
GND
GND
resistor.
i
i
Load
Load
R
R
GND
GND
Doc ID022576 Rev 3 17/26
Diode
Diode
Package mechanical data VNI4140K-32
11 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at:www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
18/26 Doc ID022576 Rev 3
VNI4140K-32 Package mechanical data
Table 10. PowerSSO-24 mechanical data
mm
Symbol
Min. Typ. Max.
A 2.15 2.47
A2 2.15 2.40
a1 0 0.075
b 0.33 0.51
c 0.23 0.32
D 10.10 10.50
E 7.4 7.6
e 0.8
e3 8.8
G 0.1
G1 0.06
H 10.1 10.5
h 0.4
L 0.55 0.85
N 10deg
X 4.1 4.7
Y 6.5 7.1
Figure 14. PowerSSO-24 package dimensions
Doc ID022576 Rev 3 19/26
Package mechanical data VNI4140K-32
Figure 15. PowerSSO-24 tube shipment (no suffix)
Table 11. PowerSSO-24 tube shipment
Base Q.ty 49
Bulk Q.ty 1225
Tube length (± 0.5) 532
A 3.5
B 13.8
C (± 0.1) 0.6
Note: All dimensions are in mm.
20/26 Doc ID022576 Rev 3
VNI4140K-32 Package mechanical data
Figure 16. PowerSSO-24 reel shipment (suffix “TR”)
Table 12. PowerSSO-24 reel dimensions
Base Q.ty 1000
Bulk Q.ty 1000
A (max.) 330
B (min.) 1.5
C (± 0.2) 13
F 20.2
G (2 ± 0) 24.4
N (min.) 100
T (max.) 30.4
Doc ID022576 Rev 3 21/26
Package mechanical data VNI4140K-32
Figure 17. PowerSSO-24 tape dimensions
Table 13. PowerSSO-24 tape dimensions
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.05) 1.55
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.1) 11.5
Compartment Depth K (max) 2.85
Hole Spacing P1 (± 0.1) 2
Note: According to the electronic industries association (EIA) standard 481 rev. A, Feb 1986.
22/26 Doc ID022576 Rev 3
VNI4140K-32 Package mechanical data
Figure 18. VNI4140K-32 suggested footprint
n
2
3OLDER-ASK/PENING
Note: STMicroelectronics is not responsible for any PCB related issues. The footprint shown in the
above figure is a suggestion which might not be in line to the customer PCB supplier design
rules.
All dimensions are in mm.
Doc ID022576 Rev 3 23/26
Ordering information VNI4140K-32
12 Ordering information
Table 14. Ordering information
Order codes Package Packaging
VNI4140K-32 PowerSSO-24 Tube
VNI4140KTR-32 PowerSSO-24 Tape and reel
24/26 Doc ID022576 Rev 3
VNI4140K-32 Revision history
13 Revision history
Table 15. Document revision history
Date Revision Changes
12-Dec-2011 1 Initial release.
06-Feb-2012 2
07-Mar-2012 3
Updated I
minimum value in Table 8: Protection and
lim
diagnostic.
Inserted new feature: ESD according to IEC 61000-4-2 up
to +/-25 KV, in cover page.
Suggested footprint inserted.
In Table 5. parameter I
has been added.
LGND
Doc ID022576 Rev 3 25/26
VNI4140K-32
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26/26 Doc ID022576 Rev 3
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