ST VNH5050A-E User Manual

VNH5050A-E

Automotive fully integrated H-bridge motor driver

Features

	Type	RDS(on)	Iout	Vccmax
	VNH5050A-E	50 mΩ max	30 A	41 V
		(per leg)

■Output current: 30 A

■3 V CMOS compatible inputs

■Undervoltage and overvoltage shutdown

■Overvoltage clamp

■Thermal shutdown

■Cross-conduction protection

■Current and power limitation

■Very low standby power consumption

■PWM operation up to 20 KHz

■Protection against loss of ground and loss of

VCC

■Current sense output proportional to motor current

■Output protected against short to ground and short to VCC

■Package: ECOPACK®

Description

The VNH5050A-E is a full bridge motor driver intended for a wide range of automotive applications. The device incorporates a dual monolithic high-side driver and two low-side switches. All switches are designed using STMicroelectronics® well known and proven

PowerSSO-36 TP

proprietary VIPower® M0 technology that allows to efficiently integrate on the same die a true Power MOSFET with an intelligent signal/protection circuitry. The three dies are assembled in a PowerSSO-36 TP package on electrically isolated lead frames. This package, specifically designed for the harsh automotive environment offers improved thermal performance thanks to exposed die pads. Moreover, its fully symmetrical mechanical design allows superior manufacturability at board level. The input signals INA and INB can directly interface to the microcontroller to select the motor direction and the brake condition. The DIAGA/ENA or DIAGB/ENB, when connected to an external pull-up resistor, enables one leg of the bridge. Each DIAGA/ENA provides a digital diagnostic feedback signal as well. The normal operating condition is explained in the truth table. The CS pin allows monitoring the motor current by delivering a current proportional to its value when CS_DIS pin is driven low or left open. When CS_DIS is driven high, CS pin is in high impedance condition. The PWM, up to 20 KHz, allows to control the speed of the motor in all possible conditions. In all cases, a low level state on the PWM pin turns off both the LSA and LSB switches.

Table 1.	Device summary
	Package		Order codes
		Tube		Tape and reel
	PowerSSO-36 TP	VNH5050A-E		VNH5050ATR-E
December 2011		Doc ID 16009 Rev 10	1/33
				www.st.com

Contents	VNH5050A-E

Contents

1	Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 5
2	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		8
	2.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
	2.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	2.3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
	2.4	Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
3	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		21
	3.1	Reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
4	Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		24
	4.1	PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24

4.1.1Thermal calculation in clockwise and anti-clockwise operation in

steady-state mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.1.2Thermal resistances definition (values according to the PCB heatsink

area) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.1.3 Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5	Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			29
	5.1	ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		29
	5.2	PowerSSO-36	TP package information . . . . . . . . . . . . . . . . . . . . . . . . . .	29
	5.3	PowerSSO-36	TP packing information . . . . . . . . . . . . . . . . . . . . . . . . . . .	31
6	Revision history .		. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32

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VNH5050A-E	List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 5. Pin functions description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 6. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 7. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Logic inputs (INA, INB, ENA, ENB, PWM, CS_DIS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 10. Switching (VCC = 13 V, RLOAD = 1.5 Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 11. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 12. Current sense (9 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 13. Truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Truth table in fault conditions (detected on OUTA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 15. Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 16. Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 17. Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 18. Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 25 Table 19. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 20. PowerSSO-36 TP mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 21. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

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List of figures	VNH5050A-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 5. Definition of the low-side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 6. Definition of the high-side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 7. Definition of dynamic cross conduction current during a PWM operation. . . . . . . . . . . . . . 16 Figure 8. Definition of delay response time of sense current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 9. Waveforms in full-bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 10. Waveforms in full-bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 11. Typical application circuit for DC to 20 kHz PWM operation short circuit protection . . . . . 21 Figure 12. Behavior in fault condition (how a fault can be cleared) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 13. Half-bridge configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 14. Multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 15. PowerSSO-36™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 16. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 17. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . 25 Figure 18. Detailed chipset configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 19. PowerSSO-36 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 27 Figure 20. PowerSSO-36 LSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 27 Figure 21. Thermal fitting model of an H-bridge in PowerSSO-36. . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 22. PowerSSO-36 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 23. PowerSSO-36 TP tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 24. PowerSSO-36 TP tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

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VNH5050A-E	Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

6##

VCC

3)'.!,

#,!-0

SIGNAL

&!5,4

CLAMP

0/7%2

$%4%#4)/.

,)-)4!4) /.

FAULT

POWER

DETECTION

LIMITATION

,3!?/6%24%-0%2!452%

,3"?/6%24%-0%2!452%

LSA_OVERTEMPERATURE

LSB_OVERTEMPERATURE

(3!?/6%24%-0%2!452%

/6 56

(3"?/6%24%-0%2!452%

HSA_OVERTEMPERATURE

OV + UV

HSB_OVERTEMPERATURE

#,!-0?(3

#,!-0?(3

CLAMP! _HSA

CLAMP_HSB "

(3

HS

$2)6%2DRIVER

,/')#LOGIC

DRIVER$2)6%2

HS(3

!

A

(3!

HS

HS

B

"

A

(3B"

CURRENT

CURRENT

#522%.4

#522%.4

LIMITATION_A

LIMITATION_B

,)-)4!4)/.?!

,)-)4!4) /.?"

SOURCE_HSA

1/K

1/K

SOURCE_HSB

3/52#%?(3!

CLAMP_LSA

+

+

3/52#%?(3"

DRAIN_LSA

CLAMP_LSB

DRAIN_LSB

#,!-0?,3

#,!-0?,3

$2!).?,3!

!

"

$2!).?,3"

LSA

LSB

DRIVER

DRIVER

,3!

$2)6%2

LSA

LSB

,3"

$2)6%2

,3!

,3"

OVERLOAD

OVERLOAD

DETECTOR_A

DETECTOR_B

/6%2,/!$

/6%2,/!$

$%4%#4/2?!

DIAGA/ENA

INA CS CS_DIS

PWM

INB

$%4%#4/2?"

GNDA

DIAGB/ENB

GNDB

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	Table 2.	Block description
		Name	Description
	Logic control		Allows the turn-on and the turn-off of the high-side and the
			low-side switches according to the truth table.
	Undervoltage/overvoltage		Shuts down the device for battery voltage outside the range
			(4,5...24V).
	High-side and low-side clamp voltage		Protect the high-side and the low-side switches from high
			voltage on the battery line.
	High-side and low-side driver		Drive the gate of the concerned switch to allow a proper
			RDS(on) for the leg of the bridge.
	Current limitation		Limits the motor current in case of short circuit.
	High-side and low-side		In case of short-circuit with the increase of the junction
			temperature, it shuts down the concerned driver to prevent
	overtemperature protection
			degradation and to protect the die.
	Low-side overload detector		Detects when low-side current exceeds shutdown current
			and latches off the concerned low-side.
			Signalizes an abnormal condition of the switch (output
	Fault detection		shorted to ground or output shorted to battery) by pulling
			down the concerned ENx/DIAGx pin.
	Power limitation		Limits the power dissipation of the high-side driver inside
			safe range in case of short to ground condition.

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Block diagram and pin description							VNH5050A-E
	Table 3.	Suggested connections for unused and not connected pins
							INPUTx, PWM
	Connection / pin		Current sense	N.C.	SOURCE_HSx	DRAIN_LSx	DIAGx/ENx
							CS_DIS
	Floating		Not allowed	X	X	X	X
	To ground		Through 1 kΩ	X	Not allowed	X	Through 10 kΩ
			resistor				resistor
	Figure 2.	Configuration diagram (top view)

GND_A

1

36

DRAIN LSA

GND_A

GND_A

Slug2

Slug3

GND_A

GND_A

GND_A

DRAIN LSA

SOURCE HSA

SOURCE HSA

SOURCE HSA

SOURCE HSA

VCC

SOURCE HSA

Slug1

INA

ENA/DIAGA

IN_PWM

NC

18

19

GND_B

DRAIN LSB

GND_B

GND_B

GND_B GND_B

GND_B

DRAIN LSB

SOURCE HSB

SOURCE HSB

SOURCE HSB SOURCE HSB

VCC

SOURCE HSB

INB

ENB/DIAGB

CS_DIS

CS

Table 4.	Pin definitions and functions
	Pin N°	Symbol	Function
	13, 24	VCC, Heat	Drain of high-side switches and power supply voltage.
		slug1
	18	NC	Not connected.
	15	INA	Clockwise input.
	16	ENA/DIAGA	Status of high-side and low-side switches A;
			Open drain output.
	17	IN_PWM	PWM input.
	19	CS	Output of current sense.

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VNH5050A-E				Block diagram and pin description
	Table 4.	Pin definitions and functions (continued)
		Pin N°	Symbol	Function
		20	CS_DIS	Active high CMOS compatible pin to disable current sense
				pin.
		21	ENB/DIAGB	Status of high-side and low-side switches B;
				Open drain output.
		22	INB	Counter clockwise input.
	23, 25, 26, 27, 28, 29, 35		OUTB, Heat	Source of high-side switch B / drain of low-side switch B.
			Slug3
	30, 31, 32, 33, 34,36		GND_B	Source of low-side switch B.
	2, 8, 9, 10, 11, 12, 14		OUTA, Heat	Source of high-side switch A / drain of low-side switch A.
			Slug2
	1, 3, 4, 5, 6, 7		GND_A	Source of low-side switch A.

Table 5.	Pin functions description
Name		Description
VCC		Battery connection.
GND		Power ground.
OUTA		Power connections to the motor.
OUTB
INA		Voltage controlled input pins with hysteresis, CMOS compatible. These two pins
		control the state of the bridge in normal operation according to the truth table (brake
INB
		to VCC, Brake to GND, clockwise and counterclockwise).
		Voltage controlled input pin with hysteresis, CMOS compatible.Gates of low-side
PWM		FETS get modulated by the PWM signal during their on phase allowing speed control
		of the motor.
		Open drain bidirectional logic pins.These pins must be connected to an external pull
ENA/DIAGA		up resistor. When externally pulled low, they disable half-bridge A or B. In case of fault
		detection (thermal shutdown of a high-side FET or excessive on-state voltage drop
ENB/DIAGB		across a low-side FET), these pins are pulled low by the device (see truth table in fault
		condition).
		Analog current sense output. This output delivers a current proportional to the motor
CS		current if CS_DIS is low or left open. The information can be read back as an analog
		voltage across an external resistor.
CS_DIS		Active high CMOS compatible pin to disable the current sense pin.

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Electrical specifications	VNH5050A-E

2 Electrical specifications

Figure 3. Current and voltage conventions

							IS
		IINA						VCC
					V
				INA	CC			IOUTA
		IINB			OUTA
								IOUTB
				INB	OUT
		IENA				B	I	VOUTA
				DIAGA/ENA	CS			SENSE
		I					ICSD	V
								OUTB
		ENB			CS_DIS		VSENSE
				DIAGB/ENB
				PWM	GND
				Ipw			VCSD
					IGND
VINA	VINB	VENA	VENB	Vpw

2.1Absolute maximum ratings

	Table 6.	Absolute maximum ratings
	Symbol	Parameter	Value	Unit
	VCC	Supply voltage	+ 41	V
	Imax	DC output current	Internally limited	A
	I	Reverse output current (continuous)(1)	25	A
	R
	IIN	Input current (INA and INB pins)	+/- 10	mA
	IEN	Enable input current (DIAGA/ENA and DIAGB/ENB pins)	+/- 10	mA
	Ipw	PWM Input current	+/- 10	mA
	ICS_DIS	CS_DIS input current	+/- 10	mA
	VCS	Current sense maximum voltage	VCC-41/+VCC	V
	VESD	Electrostatic discharge	2	kV
		(Human body model: R = 1.5 kΩ, C = 100 pF)
	Tc	Junction operating temperature	-40 to 150	°C
	TSTG	Storage temperature	-55 to 150	°C
	IGND	DC reverse ground pin current	200	mA

1. Based on the internal wires capability.

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VNH5050A-E	Electrical specifications

2.2Thermal data

	Table 7.	Thermal data
	Symbol	Parameter		Max. value	Unit
	Rthj-case	Thermal resistance junction-case (per leg)	HSD	3.7	°C/W
			LSD	3.9	°C/W
	Rthj-amb	Thermal resistance junction-ambient		See Figure 17	°C/W

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Electrical specifications	VNH5050A-E

2.3Electrical characteristics

VCC = 9 V up to 18 V; -40 °C < Tj < 150 °C, unless otherwise specified.
Table 8.	Power section
Symbol	Parameter		Test conditions	Min.	Typ.	Max.	Unit
VCC	Operating supply voltage			5.5		18	V
			Off-state with all fault cleared
			and ENx = 0 (standby)		3	6	µA
			INA = INB = PWM = 0;
			Tj = 25 °C; VCC = 13 V
			Off-state with all fault cleared
			and ENx = 0 (standby)
			VCC = 13 V;			10	µA
			INA = INB = PWM = 0;
IS	Supply current		Tj = -40 °C to 150 °C
			Off-state (no standby)
			INA = INB = PWM = 0;			5	mA
			ENx = 5 V;
			Tj = -40 °C to 150 °C
			On-state:		3	6	mA
			INA or INB = 5V; no PWM
			On-state:
			INA or INB = 5 V;			8	mA
			PWM = 20 kHz
			IOUT = 8.5 A; Tj = -40 °C		17		mΩ
	Static high-side		OUT = 8.5 A; Tj = 25 °C		26		mΩ
RONHS			IOUT = 8.5 A; Tj = 150 °C		52		mΩ
	resistance
			IOUT = 8.5 A;			60	mΩ
			Tj = - 40 °C to 150 °C
			IOUT = 8.5 A; Tj = 25 °C		20		mΩ
RONLS	Static low-side resistance		IOUT = 8.5 A;			40	mΩ
			Tj = - 40 °C to 150 °C
Vf	High-side free-wheeling		IOUT = -8.5 A; Tj = 150 °C		0.7	0.9	V
	diode forward voltage
			Tj = 25 °C; VCC = 13V;	0		3	µA
IL(off)	High-side off-state output		VOUTX = ENX = 0 V
	current (per channel)		Tj = 125°C; VCC = 13V;	0		5	µA
			VOUTX = ENX = 0 V
IRM	Dynamic cross-		IOUT = 8.5 A (see Figure 7)		1		A
	conduction current

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