ST VND920P-E User Manual

Features
Typ e R
VND920P-E 16 mΩ 35 A
1. Per channel with all the output pins connected to the PCB.
DS(on)
I
OUT
(1)
V
CC
36 V
VND920P-E
Double channel high-side driver
ECOPACK
Automotive Grade: compliance with AEC
®
guidelines
Very low standby current
CMOS compatible input
Proportional load current sense
Current sense disable
Thermal shutdown protection and diagnosis
Undervoltage shutdown
Overvoltage clamp
Load current limitation
SO-28 (double island)
Description
The VND920P-E is a double chip device designed in STMicroelectronics™ VIPower ™ M0-3 technology. The VND920P-E is intended for driving any type of load with one side connected to ground. The active V protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload.
The device integrates an analog current sense output which delivers a current proportional to the load current. The device automatically turns off in the case where the ground pin becomes disconnected.
pin voltage clamp
CC

Table 1. Device summary

Package
SO-28 VND920P-E VND920PTR-E
February 2011 Doc ID 10898 Rev 4 1/26
Order codes
Tube Tape and reel
www.st.com
1
Contents VND920P-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 17
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 18
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 Maximum demagnetization energy (V
= 13.5 V) . . . . . . . . . . . . . . . . . 19
CC
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26 Doc ID 10898 Rev 4
VND920P-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (V Table 7. V
Table 8. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (9 V <= V
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 13. Thermal calculation according to the PCB heatsink area . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 14. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 15. SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
=13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
<=16 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CC
Doc ID 10898 Rev 4 3/26
List of figures VND920P-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. I
OUT/ISENSE
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. I
LIM
vs T Figure 14. On-state resistance vs V
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. On-state resistance vs T
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. R
thj-amb
Figure 23. SO-28 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 24. Thermal fitting model of a double channel HSD in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. SO-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 26. SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 27. SO-28 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
versus I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
case
vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 21
4/26 Doc ID 10898 Rev 4
VND920P-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V
1
CC
GND 1
INPUT 1
GND 2
V
CC
CLAMP
OVERTEMPERATURE
DETECTION
V
CC
CLAMP
LOGIC
OVERVOLTAGE
DETECTION
UNDERVOLTAGE
DETECTION
DRIVER
CURRENT LIMITER
I
OVERVOLTAGE
DETECTION
UNDERVOLTAGE
DETECTION
Power CLAMP
OUTPUT 1
VDS LIMITER
OUT CURRENT
Power CLAMP
K
SENSE 1
V
CC
2
DRIVER
INPUT 2
LOGIC
OVERTEMPERATURE
DETECTION
CURRENT LIMITER
VDS LIMITER
I
OUT CURRENT
K
OUTPUT 2
SENSE 2
Doc ID 10898 Rev 4 5/26
Block diagram and pin description VND920P-E

Figure 2. Configuration diagram (top view)

V
1
CC
1
GND 1
INPUT 1
CURRENT SENSE 1
NC NC
1
V
CC
V
2
CC
GND 2
INPUT 2
CURRENT SENSE 2
NC NC
2
V
CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current Sense N.C. Output Input
Floating X X X
To ground
Through 1KΩ
resistor
14
X
28
15
V
OUTPUT 1 OUTPUT 1 OUTPUT 1
OUTPUT 1 OUTPUT 1 OUTPUT 1
OUTPUT 2
OUTPUT 2 OUTPUT 2
OUTPUT 2
OUTPUT 2 OUTPUT 2
V
CC
CC
1
2
Through 10 KΩ
resistor
6/26 Doc ID 10898 Rev 4
VND920P-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S1
V
CC1
I
Note: V
Fn
= V
CCn
- V
IN1
V
IN1
I
IN2
V
IN2
during reverse battery condition.
OUTn
INPUT1
INPUT2
GROUND1

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Tabl e 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality document.

Table 3. Absolute maximum ratings

I
GND1
V
CC2
OUTPUT1
OUTPUT2
GROUND2
V
CC1
CURRENT SENSE 1
CURRENT SENSE 2
I
GND2
I
OUT1
I
SENSE1
I
OUT2
I
SENSE2
V
SENSE2
V
V
V
OUT2
I
S2
(*)
F1
SENSE1
V
OUT1
V
CC2
Symbol Parameter Value Unit
V
- V
- I
I
OUT
- I
OUT
I
V
CSENSE
DC supply voltage 41 V
CC
Reverse DC supply voltage - 0.3 V
CC
DC reverse ground pin current - 200 mA
gnd
DC output current Internally limited A
Reverse DC output current - 21 A
DC input current +/- 10 mA
IN
Current Sense maximum voltage
- 3
+ 15
Electrostatic discharge (human body model: R = 1.5 KΩ; C = 100pF)
V
ESD
INPUT CURRENT SENSE OUTPUT V
CC
4000 2000 5000 5000
Doc ID 10898 Rev 4 7/26
V V
V V V V
Electrical specifications VND920P-E
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Maximum switching energy
E
MAX
P
T
T
T
(L = 0.25 mH; R
= 150 °C; IL = 45 A)
T
jstart
Power dissipation TC ≤ 25°C 6.25 W
tot
Junction operating temperature Internally limited °C
j
Case operating temperature - 40 to 150 °C
c
Storage temperature - 55 to 150 °C
stg
= 0 Ω; V
L
=13.5V;
bat
355 mJ

2.2 Thermal data

Table 4. Thermal data (per island)

Symbol Parameter Value Unit
R
thj-lead
R
thj-amb
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 1cm2 of Cu (at least 35 µm thick) connected to all V
2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 µm thick) connected to all V
Thermal resistance junction-lead 15 °C/W
Thermal resistance junction-ambient (one chip ON)
Thermal resistance junction-ambient (two chips ON)
pins. Horizontal mounting and no artificial air flow.
CC
pins. Horizontal mounting and no artificial air flow.
CC
55
46
(1)
(1)
45
32
(2)
(2)
°C/W
°C/W
8/26 Doc ID 10898 Rev 4
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