ST VND830SP-E User Manual

VND830SP-E

Double channel high-side driver

Features

Type	RDS(on)	IOUT	VCC
VND830SP-E	60 mΩ(1)	6 A(1)	36 V

1. Per each channel.

■ECOPACK®: lead free and RoHS compliant

■Automotive Grade: compliance with AEC guidelines

■Very low standby current

■CMOS compatible input

■On-state open-load detection

■Off-state open-load detection

■Thermal shutdown protection and diagnosis

■Undervoltage shutdown

■Overvoltage clamp

■Output stuck to VCC detection

■Load current limitation

■Reverse battery protection

■Electrostatic discharge protection

10

1

PowerSO-10

Description

The VND830SP-E is a monolithic device made by using STMicroelectronics™ VIPower™ M0-3 technology, intended for driving any kind of load with one side connected to ground.

Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).

Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open-load condition both is on-state and off-state. Output shorted to VCC is detected in the off-state. Device automatically turns-off in case of ground pin disconnection.

Table 1.	Device summary
	Package		Order codes
		Tube		Tape and reel
	PowerSO-10	VND830SP-E		VND830SPTR-E

February 2011

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VND830SP-E	Contents

Contents

1	Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 5
2	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 6
	2.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
	2.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.4	Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
	2.5	Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
3	Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		18

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18

3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 18

3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 19

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4	Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		21
	4.1	PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
5	Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		24
	5.1	ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	5.2	PowerSO-10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	5.3	PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
6	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		27

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VND830SP-E	List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 7. VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 8. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 9. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 13. Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 14. Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 15. Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 17. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

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VND830SP-E	List of figures

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 13. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 23. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 24. PowerSO-10 maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . 17

Figure 25. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 26. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 27. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 21 Figure 29. Thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 22 Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 32. PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 33. PowerSO-10 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 34. PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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VND830SP-E	Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

			Vcc
	Vcc	OVERVOLTAGE
	CLAMP
		UNDERVOLTAGE
	GND	CLAMP 1
	INPUT1	DRIVER 1	OUTPUT1
	STATUS1		CLAMP 2
		CURRENT LIMITER 1	DRIVER 2
		LOGIC
	OVERTEMP. 1		OUTPUT2
		OPEN-LOAD ON 1
	INPUT2		CURRENT LIMITER 2
		OPEN-LOAD OFF 1	OPEN-LOAD ON 2
	STATUS2
			OPEN-LOAD OFF 2
	OVERTEMP. 2

Figure 2. Configuration diagram (top view)

GROUND

INPUT 1

STATUS 1

STATUS 2

INPUT 2

VCC

6	5	OUTPUT 1
7	4	OUTPUT 1
8	3	N.C.
9	2	OUTPUT 2
10	1	OUTPUT 2
	11

	Table 2.	Suggested connections for unused and not connected pins
	Connection / pin		Status	N.C.	Output	Input
	Floating		X	X	X	X
	To ground		—	X	—	Through 10 KΩ
						resistor

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VND830SP-E	Electrical specifications

2 Electrical specifications

2.1Absolute maximum ratings

Stressing the device above the rating listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3.	Absolute maximum ratings
Symbol	Parameter					Value	Unit
VCC	DC supply voltage					41	V
-VCC	Reverse DC supply voltage					-0.3	V
-IGND	DC reverse ground pin current					-200	mA
IOUT	DC output current					Internally limited	A
-IOUT	Reverse DC output current					-6	A
IIN	DC input current					+/-10	mA
ISTAT	DC status current					+/-10	mA
	Electrostatic discharge (Human Body Model: R = 1.5 KΩ;
	C = 100 pF)
VESD	– INPUT					4000	V
	– STATUS					4000	V
	– OUTPUT					5000	V
	– VCC					5000	V
	Maximum switching energy
EMAX	(L = 1.8 mH; R = 0 Ω; V	bat	= 13.5 V; T	jstart	= 150 °C;	100	mJ
	L
	IL = 9 A)
Ptot	Power dissipation TC = 25 °C					73.5	W
Tj	Junction operating temperature					Internally limited	°C
Tc	Case operating temperature					-40 to 150	°C
Tstg	Storage temperature					-55 to 150	°C

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VND830SP-E	Electrical specifications

2.2Thermal data

Table 4.	Thermal data (per island)
Symbol	Parameter	Value			Unit
Rthj-case	Thermal resistance junction-case	1.7			°C/W
Rthj-amb	Thermal resistance junction-ambient	51.7(1)		37(2)	°C/W

1.When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.

2.When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.

2.3Electrical characteristics

Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless otherwise stated.

(Per each channel)

Figure 3. Current and voltage conventions

				IS
	IIN1		VF1	(1)
				V
		INPUT 1	VCC	CC
	V	ISTAT1		I
				OUT1
	IN1	STATUS 1	OUTPUT 1
	VSTAT1	IIN2		VOUT1
		INPUT 2	IOUT2
	VIN2	ISTAT2
			OUTPUT 2	VOUT2
		STATUS 2
		GND
		VSTAT2
			IGND
	1. VFn = VCCn - VOUTn during reverse battery condition.

Table 5.	Power output
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
(1)	Operating supply voltage		5.5	13	36	V
VCC
(1)	Undervoltage shutdown		3	4	5.5	V
VUSD
(1)	Overvoltage shutdown		36			V
VOV
RON	On-state resistance	IOUT = 2 A; Tj = 25 °C			60	mΩ
		IOUT = 2 A; VCC > 8 V			120	mΩ

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VND830SP-E

Electrical specifications

Table 5.

Power output (continued)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Off-state; VCC = 13 V;

12

40

µA

VIN = VOUT = 0 V

I (1)

Supply current

Off-state; V

= 13 V;

12

25

µA

S

CC

VIN = VOUT = 0 V; Tj = 25°C

On-state; VCC = 13 V

5

7

mA

IL(off1)

Off-state output current

VIN = VOUT = 0 V; VCC = 36 V;

0

50

µA

Tj = 125 °C

IL(off2)

Off-state output current

VIN = 0 V; VOUT = 3.5 V

-75

0

µA

IL(off3)

Off-state output current

VIN = VOUT = 0 V; VCC = 13 V;

5

µA

Tj = 125 °C

IL(off4)

Off-state output current

VIN = VOUT = 0 V; VCC = 13 V;

3

µA

Tj = 25 °C

1. Per device.

Table 6.

Protections(1)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

TTSD

Shutdown temperature

150

175

200

°C

TR

Reset temperature

135

°C

Thyst

Thermal hysteresis

7

15

°C

t

Status delay in overload

T

> T

20

µs

SDL

conditions

j

TSD

Ilim

Current limitation

VCC = 13 V

6

9

15

A

5.5 V < VCC < 36 V

15

A

Vdemag

Turn-off output clamp

IOUT = 2 A; L = 6 mH

VCC - 41

VCC - 48

VCC - 55

V

voltage

1.To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.

Table 7.	VCC - output diode
Symbol	Parameter	Test conditions		Min.		Typ.	Max.	Unit
VF	Forward on voltage	-IOUT = 1.3 A; Tj = 150 °C		—		—	0.6	V
Table 8.	Status pin
Symbol	Parameter	Test conditions		Min.		Typ.	Max.	Unit
VSTAT	Status low output voltage	ISTAT = 1.6 mA					0.5	V
ILSTAT	Status leakage current	Normal operation; VSTAT = 5 V					10	µA
CSTAT	Status pin input capacitance	Normal operation; VSTAT = 5 V					100	pF

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VND830SP-E

Electrical specifications

Table 8.

Status pin (continued)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VSCL

Status clamp voltage

ISTAT = 1 mA

6

6.8

8

V

ISTAT = -1 mA

-0.7

V

Table 9.

Switching (VCC = 13 V)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

td(on)

Turn-on delay time

RL = 6.5 Ω from VIN rising

—

30

—

µs

edge to VOUT = 1.3 V

td(off)

Turn-off delay time

RL = 6.5 Ω from VIN falling

—

30

—

µs

edge to VOUT = 11.7 V

dVOUT/dt(on)

Turn-on voltage slope

RL = 6.5 Ω from VOUT = 1.3 V

—

See

—

V/µs

to VOUT = 10.4 V

Figure 21

dVOUT/dt(off)

Turn-off voltage slope

RL = 6.5 Ω from VOUT = 11.7 V

—

See

—

V/µs

to VOUT = 1.3 V

Figure 22

Table 10.

Open-load detection

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

I

OL

Open-load on-state detection

V

= 5 V

50

100

200

mA

threshold

IN

t

Open-load on-state detection

I

= 0 A

200

µs

DOL(on)

delay

OUT

VOL

Open-load off-state voltage

VIN

= 0 V

1.5

2.5

3.5

V

detection threshold

tDOL(off)

Open-load detection delay at

1000

µs

turn-off

Table 11.

Logic input

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VIL

Input low level

1.25

V

IIL

Low level input current

VIN = 1.25 V

1

µA

VIH

Input high level

3.25

V

IIH

High level input current

VIN = 3.25 V

10

µA

VI(hyst)

Input hysteresis voltage

0.5

V

VICL

Input clamp voltage

IIN = 1 mA

6

6.8

8

V

IIN = -1 mA

-0.7

V

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