ST VND830SP-E User Manual

Features
Typ e R
VND830SP-E 60 mΩ
DS(on)
(1)
I
OUT
6A
(1)
V
CC
36 V
VND830SP-E
Double channel high-side driver
10
1. Per each channel.
ECOPACK
Automotive Grade: compliance with AEC
®
guidelines
Very low standby current
CMOS compatible input
On-state open-load detection
Off-state open-load detection
Thermal shutdown protection and diagnosis
Undervoltage shutdown
Overvoltage clamp
Output stuck to V
Load current limitation
Reverse battery protection
Electrostatic discharge protection
detection
CC

Table 1. Device summary

1
PowerSO-10
Description
The VND830SP-E is a monolithic device made by using STMicroelectronics™ VIPower™ M0-3 technology, intended for driving any kind of load with one side connected to ground.
Active V against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open-load condition both is on-state and off-state. Output shorted to V Device automatically turns-off in case of ground pin disconnection.
pin voltage clamp protects the device
CC
is detected in the off-state.
CC
Order codes
Package
Tube Tape and reel
PowerSO-10 VND830SP-E VND830SPTR-E
February 2011 Doc ID 10879 Rev 2 1/25
www.st.com
1
VND830SP-E Contents
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5 Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 18
3.1.2 Solution 2: a diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
) in the ground line . . . . . . . . . . . . . . . . . . . . 19
GND
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2 PowerSO-10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Doc ID 10879 Rev 2 2/28
VND830SP-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. V
Table 8. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Switching (V
Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements on V Table 14. Electrical transient requirements on V Table 15. Electrical transient requirements on V
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
= 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
Doc ID 10879 Rev 2 3/28
VND830SP-E List of figures
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. On-state resistance vs Figure 14. On-state resistance vs V
Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. I
LIM
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
case
Figure 24. PowerSO-10 maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . 17
Figure 25. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 22
Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. PowerSO-10 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Tcase
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
CC
Doc ID 10879 Rev 2 4/28
VND830SP-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V
cc
V
GND
INPUT1
STATUS1
INPUT2
STATUS2
cc
CLAMP
OVERT EMP. 1
OVERT EMP. 2
LOGIC
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPEN-LOAD ON 1
OPEN-LOAD OFF 1
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPEN-LOAD ON 2
OPEN-LOAD OFF 2
OUTPUT1
OUTPUT2

Figure 2. Configuration diagram (top view)

GROUND INPUT 1 STATUS 1 STATUS 2 INPUT 2
10
6 7
8 9
5 4 3
2
1
OUTPUT 1 OUTPUT 1 N.C. OUTPUT 2 OUTPUT 2
11
V
CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input
Floating X X X X
To ground X
Through 10 KΩ
resistor
Doc ID 10879 Rev 2 5/28
VND830SP-E Electrical specifications

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Ta bl e 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
-V
-I
I
OUT
-I
I
STAT
V
E
P
T
CC
CC
GND
OUT
I
IN
ESD
MAX
tot
T
j
T
c
stg
DC supply voltage 41 V
Reverse DC supply voltage -0.3 V
DC reverse ground pin current -200 mA
DC output current Internally limited A
Reverse DC output current -6 A
DC input current +/-10 mA
DC status current +/-10 mA
Electrostatic discharge (Human Body Model: R = 1.5 KΩ; C=100pF)
–INPUT –STATUS –OUTPUT –V
CC
4000 4000 5000 5000
V V V V
Maximum switching energy (L = 1.8 mH; R
=9A)
I
L
=0Ω; V
L
=13.5V; T
bat
jstart
= 150 °C;
100 mJ
Power dissipation TC=25°C 73.5 W
Junction operating temperature Internally limited °C
Case operating temperature -40 to 150 °C
Storage temperature -55 to 150 °C
Doc ID 10879 Rev 2 6/28
VND830SP-E Electrical specifications

2.2 Thermal data

Table 4. Thermal data (per island)

Symbol Parameter Value Unit
R
thj-case
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.
2. When mounted on a standard single-sided FR-4 board with 6 cm artificial air flow.
Thermal resistance junction-case 1.7 °C/W
Thermal resistance junction-ambient 51.7
2
of Cu (at least 35 µm thick). Horizontal mounting and no
(1)
37
(2)
°C/W

2.3 Electrical characteristics

Values specified in this section are for 8 V < V otherwise stated.
(Per each channel)

Figure 3. Current and voltage conventions

I
IN1
INPUT 1
I
V
IN1
STAT1
STATUS 1
V
STAT1
I
IN2
INPUT 2
I
V
STAT2
IN2
STATUS 2
V
STAT2
< 36 V; -40 °C < Tj < 150 °C, unless
CC
(1)
V
F1
V
CC
I
OUT1
OUTPUT 1
V
OUT1
I
OUT2
OUTPUT 2
V
OUT2
GND
I
GND
I
S
V
CC
1. VFn = V

Table 5. Power output

CCn
- V
during reverse battery condition.
OUTn
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
Operating supply voltage 5.5 13 36 V
(1)
Undervoltage shutdown 3 4 5.5 V
(1)
Overvoltage shutdown 36 V
I
= 2 A; Tj = 25 °C 60 mΩ
On-state resistance
ON
OUT
I
OUT
= 2 A; V
> 8 V 120 mΩ
CC
V
V
USD
V
R
CC
OV
Doc ID 10879 Rev 2 7/28
VND830SP-E Electrical specifications
Table 5. Power output (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
= 13 V;
CC
= 0 V
OUT
= 13 V;
CC
= 0 V; Tj = 25°C
OUT
= 13 V 5 7 mA
CC
= 0 V; VCC=36V;
OUT
OUT
OUT
= 3.5 V -75 0 µA
OUT
= 0 V; V
= 0 V; V
CC
CC
= 13 V;
= 13 V;
050µA
12 40 µA
12 25 µA
A
A
(1)
I
S
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
1. Per device.

Table 6. Protections

Supply current
Off-state output current
Off-state output current V
Off-state output current
Off-state output current
(1)
Off-state; V
= V
V
IN
Off-state; V V
= V
IN
On-state; V
= V
V
IN
Tj=125°C
= 0 V; V
IN
= V
V
IN
Tj = 125 °C
V
= V
IN
Tj=25°C
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
T
t
SDL
I
V
demag
Shutdown temperature 150 175 200 °C
TSD
T
Reset temperature 135 °C
R
Thermal hysteresis 7 15 °C
hyst
Status delay in overload conditions
Current limitation
lim
Turn-off output clamp voltage
> T
T
j
TSD
V
= 13 V 6 9 15 A
CC
5.5 V < V
I
OUT
< 36 V 15 A
CC
= 2 A; L = 6 mH V
-41 V
CC
CC
-48 V
20 µs
-55 V
CC
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.

Tabl e 7. VCC - output diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
Forward on voltage -I
F

Table 8. Status pin

=1.3A; Tj=150°C 0.6 V
OUT
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
STAT
I
LSTAT
C
STAT
Status low output voltage I
= 1.6 mA 0.5 V
STAT
Status leakage current Normal operation; V
Status pin input capacitance Normal operation; V
= 5 V 10 µA
STAT
= 5 V 100 pF
STAT
Doc ID 10879 Rev 2 8/28
VND830SP-E Electrical specifications
Table 8. Status pin (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 1 mA 6 6.8 8 V
V
Table 9. Switching (V
Status clamp voltage
SCL
CC
= 13 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
dV
OUT
dV
OUT

Table 10. Open-load detection

Turn-on delay time
Turn-off delay time
/dt
Turn-on voltage slope
(on)
/dt
Turn-off voltage slope
(off)
STAT
I
= -1 mA -0.7 V
STAT
= 6.5 Ω from VIN rising
R
L
edge to V
R
= 6.5 Ω from VIN falling
L
edge to V
= 6.5 Ω from V
R
L
to V
OUT
= 6.5 Ω from V
R
L
to V
OUT
= 1.3 V
OUT
= 11.7 V
OUT
= 10.4 V
= 1.3 V
OUT
OUT
= 1.3 V
= 11.7 V
—30—µs
—30—µs
See
Figure 21
See
Figure 22
—V/µs
—V/µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
t
DOL(on)
V
t
DOL(off)

Table 11. Logic input

Open-load on-state detection
OL
threshold
Open-load on-state detection delay
Open-load off-state voltage
OL
detection threshold
Open-load detection delay at turn-off
= 5 V 50 100 200 mA
V
IN
= 0 A 200 µs
I
OUT
V
= 0 V 1.5 2.5 3.5 V
IN
1000 µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
Input low level 1.25 V
IL
I
Low level input current V
IL
Input high level 3.25 V
IH
High level input current V
I
IH
= 1.25 V 1 µA
IN
= 3.25 V 10 µA
IN
Input hysteresis voltage 0.5 V
I
= 1 mA 6 6.8 8 V
Input clamp voltage
ICL
IN
= -1 mA -0.7 V
I
IN
V
V
V
V
I(hyst)
Doc ID 10879 Rev 2 9/28
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