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VND830PEP-E
User Manual
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ST VND830PEP-E User Manual

Features
Type R
VND830PEP-E 60mΩ
1. Per each channel.
DS(on)
(1)
I
6A
OUT
(1)
V
CC
36V
VND830PEP-E
Double channel high side driver
■ CMOS compatible inputs
■ On-state open load detection
■ Off-state open load detection
■ Shorted load protection
■ Undervoltage and overvoltage shutdown
■ Protection against loss of ground
■ Very low standby current
■ Reverse battery protection (see Application
schematic on page 16)
■ In compliance with the 2002/95/EC european
directive

Table 1. Device summary

PowerSSO-24
Description
The VND830PEP-E is a monolithic device designed in STMicroelectronics VIPower™ M0-3 Technology, intended for driving any kind of load with one side connected to ground.
Active V against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open load condition both in on and off-state. Output shorted to V automatically turns off in case of ground pin disconnection.
pin voltage clamp protects the device
CC
is detected in the off-state. Device
CC
Order codes
Package
Tube Tape and reel
July 2009 Doc ID 10826 Rev 5 1/25
PowerSSO-24 VND830PEP-E VND830PEPTR-E
www.st.com
1
Contents VND830PEP-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2 Solution 2: a diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
) in the ground line . . . . . . . . . . . . . . . . . . . . 17
GND
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2/25 Doc ID 10826 Rev 5
VND830PEP-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Switching (V Table 7. V
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
Table 8. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements on V Table 14. Electrical transient requirements on V Table 15. Electrical transient requirements on V
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 17. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
= 13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
pin (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
pin (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
pin (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
Doc ID 10826 Rev 5 3/25
List of figures VND830PEP-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Open-load status timing (with external pull-up) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Over temperature status timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 8. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 20. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 27. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 28. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 29. Rthj-amb vs PCB copper area in open box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 30. PowerSSO-24 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 20
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 20
Figure 32. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4/25 Doc ID 10826 Rev 5
VND830PEP-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

Figure 2. Configuration diagram (top view)

V
CC
GND
NC
INPUT2
NC
INPUT1
NC
C.SENSE1
NC
C.SENSE2
NC
V
CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input
Floating X X X
To ground
Through 1KΩ
resistor
X
OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1
TAB = V
CC
Through 10KΩ
resistor
Doc ID 10826 Rev 5 5/25
Electrical specifications VND830PEP-E

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
DC supply voltage 41 V
CC
Reverse DC supply voltage - 0.3 V
CC
DC reverse ground pin current - 200 mA
GND
DC output current Internally limited A
Reverse DC output current - 6 A
OUT
DC input current +/- 10 mA
I
IN
DC status current +/- 10 mA
stat
- V
- I
-I
V
I
OUT
I
Electrostatic discharge (human body model:R=1.5KΩ; C=100pF) – Input
V
ESD
– Status – Output –V
CC
P
T
Power dissipation TC = 25°C 54 W
tot
Junction operating temperature Internally limited °C
T
j
T
Case operating temperature - 40 to 150 °C
c
Storage temperature - 55 to 150 °C
stg

2.2 Thermal data

4000 4000 5000 5000
V V V V

Table 4. Thermal data (per island)

Symbol Parameter Value Unit
R
thj-case
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all V
2. When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35µm thick) connected to all V
Thermal resistance junction-case (max) 2.3 °C/W
Thermal resistance junction-ambient (one chip ON) (max) 57
pins.
CC
pins.
CC
6/25 Doc ID 10826 Rev 5
(1)
42
(2)
°C/W
VND830PEP-E Electrical specifications

2.3 Electrical characteristics

Note: V
Values specified in this section are for 8V < V
< 36V; -40°C < Tj < 150°C, unless
CC
otherwise stated.

Figure 3. Current and voltage conventions

= V
Fn

Table 5. Power output

Symbol Parameter Test conditions Min. Typ. Max. Unit
CCn
- V
during reverse battery condition.
OUTn
V
V
V
R
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Operating supply voltage 5.5 13 36 V
CC
Undervoltage shutdown 3 4 5.5 V
USD
Overvoltage shutdown 36 V
OV
I
= 2A; Tj = 25°C
On-state resistance
ON
I
Supply current
S
Off-state output current V
Off-state output current V
Off-state output current
Off-state output current
OUT
= 2A; Tj = 125°C
I
OUT
Off-state; V
= V
V
IN
OUT
Off-state; V
= V
V
IN
OUT
On-state; V
= 0A
I
OUT
= V
IN
OUT
= 0V; V
IN
V
= V
IN
OUT
Tj = 125°C
V
= V
IN
OUT
Tj = 25°C
= 13V;
CC
= 0V
= 13V;
CC
= 0V; Tj = 25°C
= 13V; V
CC
IN
= 5V;
12
12
= 0V 0 50 µA
= 3.5V -75 0 µA
OUT
= 0V; V
= 0V; V
CC
CC
= 13V;
= 13V;
5
60
120mΩmΩ
µA
40
µA
25
mA
7
5µA
3µA
Doc ID 10826 Rev 5 7/25
Electrical specifications VND830PEP-E
Table 6. Switching (V
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
dV
OUT
dV
OUT

Table 7. VCC - output diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
Turn-on delay time
Turn-off delay time
/dt
Turn-on voltage slope
(on)
/dt
Turn-off voltage slope
(off)
CC
= 13V)
R
= 6.5Ω from VIN rising
L
edge to V
= 6.5Ω from VIN falling
R
L
edge to V
= 6.5Ω from V
R
L
V
= 10.4V
OUT
R
= 6.5Ω from V
L
to V
OUT
OUT
OUT
= 1.3V
= 1.3V
= 11.7V
OUT
OUT
= 1.3V to
= 11.7V
-30 -µs
-30 -µs
See
-
-
Figure 14
See
Figure 13
-V/µs
-V/µs
V
F

Table 8. Status pin

Forward on voltage - I
= 1.3A; Tj = 150°C - - 0.6 V
OUT
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
STAT
I
LSTAT
C
STAT
V
SCL

Table 9. Logic inputs

Status low output volt­age
= 1.6 mA 0.5 V
I
STAT
Status leakage current Normal operation; V
Status pin input capacitance
Status clamp voltage
Normal Operation; V
I
= 1mA
STAT
= - 1mA
I
STAT
= 5V 10 µA
STAT
= 5V 100 pF
STAT
66.8
-0.7
8V
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
I
V
I
I(hyst)
Input low level 1.25 V
IL
Low level input current V
IL
Input high level 3.25 V
IH
High level input current V
IH
= 1.25V 1 µA
IN
= 3.25V 10 µA
IN
Input hysteresis voltage 0.5 V
Input clamp voltage
ICL
I
IN
I
IN
= 1mA = -1mA
66.8
- 0.7
8V
V
V

Table 10. Protections

Symbol Parameter Test conditions Min. Typ. Max. Unit
T
Shutdown temperature 150 175 200 °C
TSD
Reset temperature 135 °C
T
R
(1)
8/25 Doc ID 10826 Rev 5
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