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VND830P-E
User Manual
27 pgs431.4 Kb0
Table of contents
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ST VND830P-E User Manual

Features
Type R
VND830P-E 60 mΩ
1. Per each channel.
DS(on)
(1)
I
OUT
6A
(1)
V
CC
36 V
VND830P-E
Double channel high-side driver
■ ECOPACK
■ Automotive Grade: compliance with AEC
®
guidelines
■ Very low standby current
■ CMOS compatible input
■ On-state open-load detection
■ Off-state open-load detection
■ Thermal shutdown protection and diagnosis
■ Undervoltage shutdown
■ Overvoltage clamp
■ Output stuck to V
■ Load current limitation
■ Reverse battery protection
■ Electrostatic discharge protection
detection
CC

Table 1. Device summary

Description
The VND830P-E is a monolithic device made by using STMicroelectronics™ VIPower™ M0-3 technology, intended for driving any kind of load with one side connected to ground.
Active V against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open-load condition both is on-state and off-state. Output shorted to V Device automatically turns-off in case of ground pin disconnection.
pin voltage clamp protects the devices
CC
is detected in the off-state.
CC
Order codes
Package
Tube Tape and reel
SO-16L VND830P-E VND830PTR-E
September 2010 Doc ID 17546 Rev 2 1/27
www.st.com
1
VND830P-E Contents
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2 Solution 2: a diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
) in the ground line . . . . . . . . . . . . . . . . . . . . 17
GND
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2 SO-16L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3 SO-16L packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 17546 Rev 2 2/27
VND830P-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. V
Table 8. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Switching (V
Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements on V Table 14. Electrical transient requirements on V Table 15. Electrical transient requirements on V
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 17. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
= 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
Doc ID 17546 Rev 2 3/27
VND830P-E List of figures
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. I
Figure 14. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. On-state resistance vs Figure 17. On-state resistance vs V
Figure 18. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. SO-16L maximum turn-off current versus load inductance. . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20
Figure 28. SO-16 L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Thermal fitting model of a quad channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 30. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 32. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
LIM
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Tcase
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
CC
Doc ID 17546 Rev 2 4/27
VND830P-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V
cc
V
GND
INPUT1
STATUS1
INPUT2
STATUS2
cc
CLAMP
OVERT EMP. 1
OVERT EMP. 2
LOGIC
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPEN-LOAD ON 1
OPEN-LOAD OFF 1
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPEN-LOAD ON 2
OPEN-LOAD OFF 2
OUTPUT1
OUTPUT2

Figure 2. Configuration diagram (top view)

V
CC
1
16
N.C.
GND
INPUT 1
STATUS 1
STATUS 2
INPUT 2
V
CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input
Floating X X X X
To ground - X -
8
9
V
CC
OUTPUT 1
OUTPUT 1
OUTPUT 1
OUTPUT 2
OUTPUT 2
OUTPUT 2
V
CC
Through 10 KΩ
resistor
Doc ID 17546 Rev 2 5/27
VND830P-E Electrical specifications

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Tabl e 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
- V
- I
I
- I
I
STAT
V
E
P
T
CC
CC
GND
OUT
OUT
I
IN
ESD
MAX
tot
T
j
T
c
stg
DC supply voltage 41 V
Reverse DC supply voltage - 0.3 V
DC reverse ground pin current - 200 mA
DC output current Internally limited A
Reverse DC output current - 6 A
DC input current +/- 10 mA
DC status current +/- 10 mA
Electrostatic discharge (Human Body Model: R=1.5 KΩ; C = 100 pF)
- INPUT
- STATUS
- OUTPUT
- V
CC
4000 4000 5000 5000
V V V V
Maximum switching energy (L = 1.8 mH; R
= 9 A)
I
L
= 0 Ω; V
L
Power dissipation T
= 13.5 V; T
bat
=25°C 8.3 W
lead
= 150 °C;
jstart
102 mJ
Junction operating temperature Internally limited °C
Case operating temperature - 40 to 150 °C
Storage temperature - 55 to 150 °C
Doc ID 17546 Rev 2 6/27
VND830P-E Electrical specifications

2.2 Thermal data

Table 4. Thermal data (per island)

Symbol Parameter Value Unit
R
thj-lead
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow.
2. When mounted on a standard single-sided FR-4 board with 6 cm Horizontal mounting and no artificial air flow.
Thermal resistance junction-lead (max) 15 °C/W
Thermal resistance junction-ambient (max) 65
2
of Cu (at least 35 µm thick) connected to all VCC pins.
(1)
48
(2)
°C/W

2.3 Electrical characteristics

Values specified in this section are for 8 V < V otherwise stated.
(Per each channel)

Figure 3. Current and voltage conventions

I
IN1
INPUT 1
I
V
IN1
STAT1
STATUS 1
V
STAT1
I
IN2
INPUT 2
I
V
STAT2
IN2
STATUS 2
V
STAT2
< 36 V; -40 °C < Tj < 150 °C, unless
CC
(1)
V
F1
V
CC
I
OUT1
OUTPUT 1
V
OUT1
I
OUT2
OUTPUT 2
V
OUT2
GND
I
GND
I
S
V
CC
1. VFn = V

Table 5. Power output

CCn
- V
during reverse battery condition.
OUTn
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
Operating supply voltage 5.5 13 36 V
(1)
Undervoltage shutdown 3 4 5.5 V
(1)
Overvoltage shutdown 36 V
I
= 2 A; Tj = 25 °C
On-state resistance
ON
OUT
I
OUT
= 2 A; V
CC
> 8 V
60
120mΩmΩ
V
V
USD
V
R
CC
OV
Doc ID 17546 Rev 2 7/27
VND830P-E Electrical specifications
Table 5. Power output (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
I
S
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
1. Per device.

Table 6. Protections

Supply current
Off-state output current V
Off-state output current V
Off-state output current
Off-state output current
(1)
Off-state; V
= V
V
IN
Off-state; V
= V
V
IN
On-state; V
= 5 V; I
V
IN
= V
IN
= 0 V; V
IN
V
= V
IN
= 125 °C
T
j
V
= V
IN
=25 °C
T
j
= 13 V;
CC
= 0 V
OUT
= 13 V;
CC
= 0 V; Tj = 25°C
OUT
= 13 V;
CC
= 0 A
OUT
= 0 V 0 50 µA
OUT
= 3.5 V -75 0 µA
OUT
OUT
OUT
= 0 V; V
= 0 V; V
CC
CC
= 13 V;
= 13 V;
12 40 µA
12 25 µA
57mA
5µA
3µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
T
T
Shutdown temperature 150 175 200 °C
TSD
Reset temperature 135 °C
T
R
Thermal hysteresis 7 15 °C
hyst
Status delay in overload
SDL
conditions
T
> T
j
TSD
20 µs
V
= 13 V 6 9 15 A
I
V
demag
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.

Tabl e 7. VCC - output diode

Current limitation
lim
Turn-off output clamp voltage
CC
5.5 V < V
I
OUT
< 36 V 15 A
CC
= 2 A; L = 6 mH V
-41 V
CC
CC
-48 V
-55 V
CC
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
Forward on voltage -I
F

Table 8. Status pin

=1.3 A; Tj=150°C - - 0.6 V
OUT
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
STAT
I
LSTAT
C
STAT
Status low output voltage I
= 1.6 mA 0.5 V
STAT
Status leakage current Normal operation; V
Status pin input capacitance Normal operation; V
= 5 V 10 µA
STAT
= 5 V 100 pF
STAT
Doc ID 17546 Rev 2 8/27
VND830P-E Electrical specifications
Table 8. Status pin (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 1 mA 6 6.8 8 V
V
Table 9. Switching (V
Status clamp voltage
SCL
CC
= 13 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
dV/dt
dV/dt

Table 10. Open-load detection

Turn-on delay time
Turn-off delay time
Turn-on voltage slope
(on)
Turn-off voltage slope
(off)
STAT
I
= - 1 mA -0.7 V
STAT
= 6.5 Ω from VIN rising
R
L
edge to V
R
= 6.5 Ω from VIN falling
L
edge to V
= 6.5 Ω from V
R
L
to V
OUT
= 6.5 Ω from V
R
L
to V
OUT
= 1.3 V
OUT
= 11.7 V
OUT
= 10.4 V
= 1.3 V
OUT
OUT
= 1.3 V
= 11.7 V
-30-µs
-30-µs
See
-
-
Figure 14
See
Figure 15
-V/µs
-V/µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
t
DOL(on)
V
t
DOL(off)

Table 11. Logic input

Open-load on-state detection
OL
threshold
Open-load on-state detection delay
Open-load off-state voltage
OL
detection threshold
Open-load detection delay at turn-off
= 5 V 50 100 200 mA
V
IN
= 0 A 200 µs
I
OUT
V
= 0 V 1.5 2.5 3.5 V
IN
1000 µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
I
V
V
Input low level 1.25 V
IL
I
Low level input current V
IL
Input high level 3.25 V
IH
High level input current V
IH
Input hysteresis voltage 0.5 V
hyst
Input clamp voltage
ICL
= 1.25 V 1 µA
IN
= 3.25 V 10 µA
IN
I
= 1 mA 6 6.8 8 V
IN
= -1 mA -0.7 V
I
IN
Doc ID 17546 Rev 2 9/27
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