VND830MSP-E
Double channel high-side driver
Features
Type |
RDS(on) |
IOUT |
VCC |
VND830MSP-E |
60 mΩ |
6 A(1) |
36 V |
1. Per channel
■ECOPACK®: lead free and RoHS compliant
■Automotive Grade: compliance with AEC guidelines
■Very low standby current
■CMOS compatible input
■On-state open-load detection
■Off-state open-load detection
■Thermal shutdown protection and diagnosis
■Undervoltage shutdown
■Overvoltage clamp
■Output stuck to VCC detection
■Load current limitation
■Reverse battery protection
■Electrostatic discharge protection
10
1
PowerSO-10
Description
The VND830MSP-E is a monolithic device made using STMicroelectronics™ VIPower™ M0-3 technology. It is intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protects the device against overload.
The device detects open-load condition both in on-state and off-state. Output shorted to VCC is detected in the off-state. The open-load threshold is aimed at detecting the 5 W/12 V standard bulb as an open-load fault in the on-state.
Device automatically turns off in case of ground pin disconnection.
Table 1. |
Device summary |
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Package |
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Order codes |
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Tube |
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Tape and reel |
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PowerSO-10™ |
VND830MSP-E |
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VND830MSPTR-E |
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February 2011 |
Doc ID 10903 Rev 3 |
1/28 |
www.st.com
Contents |
VND830MSP-E |
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Contents
1 |
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 5 |
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2 |
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 6 |
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2.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
6 |
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2.2 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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2.3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2.4 |
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
14 |
3 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
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3.1 |
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . |
17 |
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 17 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 18
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.5 PowerSO-10 maximum demagnetization energy (VCC = 13.5 V) . . . . . . . 20
4 |
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
21 |
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4.1 |
PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
21 |
5 |
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
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5.1 |
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
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5.2 |
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
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5.3 |
PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
26 |
6 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
27 |
2/28 |
Doc ID 10903 Rev 3 |
VND830MSP-E |
List of tables |
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List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 7. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. VCC - output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 14. Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 15. Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Doc ID 10903 Rev 3 |
3/28 |
List of figures |
VND830MSP-E |
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List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 11. Status low output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 12. Satus clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 26. Maximum turnoff current versus load inductance(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 27. PowerSO-10 PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 21 Figure 29. PowerSO-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 22 Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 22 Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 26 Figure 33. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4/28 |
Doc ID 10903 Rev 3 |
VND830MSP-E |
Block diagram and pin description |
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Vcc |
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Vcc |
OVERVOLTAGE |
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CLAMP |
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UNDERVOLTAGE |
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GND |
CLAMP 1 |
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INPUT1 |
DRIVER 1 |
OUTPUT1 |
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STATUS1 |
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CLAMP 2 |
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CURRENT LIMITER 1 |
DRIVER 2 |
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LOGIC |
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OUTPUT2 |
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OPEN LOAD ON 1 |
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INPUT2 |
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CURRENT LIMITER 2 |
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OPEN LOAD OFF 1 |
OPEN LOAD ON 2 |
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STATUS2 |
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OPEN LOAD OFF 2 |
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OVERTEMP. 2 |
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GROUND |
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OUTPUT 1 |
INPUT 1 |
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4 |
OUTPUT 1 |
STATUS 1 |
8 |
3 |
N.C. |
STATUS 2 |
9 |
2 |
OUTPUT 2 |
INPUT 2 |
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1 |
OUTPUT 2 |
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VCC |
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PowerSO-10 |
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Table 2. |
Suggested connections for unused and not connected pins |
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Connection / pin |
Status |
N.C. |
Output |
Input |
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Floating |
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X |
X |
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To ground |
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Through 10KΩ |
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resistor |
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Doc ID 10903 Rev 3 |
5/28 |
Electrical specifications |
VND830MSP-E |
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VCC |
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VCC |
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IIN1 |
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INPUT1 |
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OUTPUT1 |
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IOUT1 |
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F1 |
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VIN1 |
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ISTAT1 |
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OUT1 |
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STATUS 1 |
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VSTAT1 |
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IIN2 |
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OUTPUT2 |
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INPUT2 |
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STAT2 |
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STATUS 2 |
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VSTAT2 |
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GND |
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IGND |
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1. VFn = VCCn - VOUTn during reverse battery condition.
2.1Absolute maximum ratings
Stressing the device above the rating listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality document.
Table 3. |
Absolute maximum ratings |
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Symbol |
Parameter |
Value |
Unit |
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VCC |
DC supply voltage |
41 |
V |
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-VCC |
Reverse DC supply voltage |
-0.3 |
V |
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- IGND |
DC reverse ground pin current |
-200 |
mA |
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IOUT |
DC output current |
Internally limited |
A |
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-IOUT |
Reverse DC output current |
-6 |
A |
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IIN |
DC input current |
+/- 10 |
mA |
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ISTAT |
CD status current |
+/- 10 |
mA |
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Electrostatic discharge (Human Body Model: |
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R = 1.5 KΩ; C = 100 pF) |
4000 |
V |
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– INPUT |
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VESD |
4000 |
V |
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– STATUS |
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– OUTPUT |
5000 |
V |
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5000 |
V |
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– VCC |
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Doc ID 10903 Rev 3 |
VND830MSP-E |
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Electrical specifications |
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Table 3. |
Absolute maximum ratings (continued) |
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Symbol |
Parameter |
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Value |
Unit |
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Maximum switching energy |
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EMAX |
(L = 0.18 mH; R = 0 Ω; V |
bat |
= 13.5 V; |
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100 |
mJ |
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L |
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Tjstart = 150 °C; IL = 9 A) |
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Ptot |
Power dissipation at Tc = 25 °C |
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73.5 |
W |
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Tj |
Junction operating temperature |
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Internally limited |
°C |
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Tc |
Case operating temperature |
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-40 to 150 |
°C |
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TSTG |
Storage temperature |
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-55 to 150 |
°C |
2.2Thermal data
Table 4. |
Thermal data |
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Symbol |
Parameter |
Value |
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Unit |
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Rthj-case |
Thermal resistance junction-case |
1.7 |
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°C/W |
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Rthj-amb |
Thermal resistance junction-ambient |
51.7(1) |
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37(2) |
°C/W |
1.When mounted on a standard single sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.
2.When mounted on a standard single sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.
Doc ID 10903 Rev 3 |
7/28 |
Electrical specifications |
VND830MSP-E |
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Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless otherwise specified. (Per each channel).
Table 5. |
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Power output |
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Symbol |
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Parameter |
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Test conditions |
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Min. |
Typ. |
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Max. |
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Unit |
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(1) |
Operating supply voltage |
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5.5 |
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13 |
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36 |
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V |
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VCC |
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(1) |
Undervoltage shutdown |
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3 |
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4 |
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5.5 |
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V |
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VUSD |
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(1) |
Overvoltage shutdown |
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36 |
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V |
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VOV |
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RON |
On-state resistance |
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IOUT = 2 A; Tj = 25 °C |
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60 |
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mΩ |
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IOUT = 2 A; VCC > 8 V |
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120 |
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mΩ |
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Off-state; VCC = 13 V; |
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12 |
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40 |
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µA |
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VIN = VOUT = 0 V |
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IS(1) |
Supply current |
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Off-state; VCC=13V; |
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12 |
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25 |
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µA |
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VIN = VOUT = 0 V; Tj = 25 °C |
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On-state; VCC = 13 V; VIN = 5 V; |
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5 |
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7 |
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mA |
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IOUT = 0 A |
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IL(off1) |
Off-state output current |
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VIN = VOUT = 0 V |
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0 |
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50 |
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µA |
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IL(off2) |
Off-state output current |
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VIN = 0 V; VOUT = 3.5 V |
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-75 |
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0 |
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µA |
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IL(off3) |
Off-state output current |
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VIN = VOUT = 0 V; VCC = 13 V; |
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5 |
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µA |
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Tj = 125 °C |
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IL(off4) |
Off-state output current |
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VIN = VOUT = 0 V; VCC = 13 V; |
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3 |
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µA |
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Tj = 25 °C |
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1. Per device. |
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Table 6. |
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Switching (VCC = 13 V) |
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Symbol |
Parameter |
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Test conditions |
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Min |
Typ |
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Max |
Unit |
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td(on) |
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Turn-on delay time |
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RL = 6.5 Ω from VIN rising edge |
5 |
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30 |
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60 |
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µs |
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to VOUT = 1.3 V |
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td(off) |
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Turn-on delay time |
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RL = 6.5 Ω from VIN falling |
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10 |
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30 |
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70 |
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µs |
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edge to VOUT = 11.7 V |
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(dVOUT/dt)on |
Turn-on voltage slope |
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RL = 6.5 Ω from VOUT = 1.3 V |
0.15 |
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See |
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1.5 |
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V/µs |
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to VOUT = 10.4 V |
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Figure 21 |
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(dVOUT/dt)off |
Turn-off voltage slope |
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RL = 6.5 Ω from VOUT = 11.7 V |
0.1 |
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See |
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0.75 |
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V/µs |
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to VOUT = 1.3 V |
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Figure 22 |
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Table 7. |
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Logic input |
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Symbol |
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Parameter |
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Test conditions |
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Min |
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Typ |
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Max |
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Unit |
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VIL |
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Input low level |
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1.25 |
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V |
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IIL |
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Low level input current |
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VIN = 1.25 V |
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1 |
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µA |
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Electrical specifications |
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Table 7. |
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Logic input (continued) |
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Symbol |
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Parameter |
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Test conditions |
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Min |
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Typ |
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Max |
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Unit |
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VIH |
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Input high level |
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3.25 |
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V |
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IIH |
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High level input current |
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VIN = 3.25 V |
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10 |
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µA |
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VI(hyst) |
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Input hysteresis voltage |
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0.5 |
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V |
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VICL |
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Input clamp voltage |
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IIN = 1 mA |
6 |
6.8 |
8 |
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V |
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IIN = -1 mA |
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-0.7 |
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V |
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Table 8. |
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VCC - output diode |
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Symbol |
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Parameter |
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Test conditions |
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Min |
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Typ |
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Max |
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Unit |
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VF |
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Forward on voltage |
-IOUT = 1.3 A; Tj = 150 °C |
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- |
- |
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0.6 |
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V |
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Table 9. |
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Status pin |
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Symbol |
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Parameter |
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Test conditions |
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Min |
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Typ |
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Max |
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Unit |
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VSTAT |
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Status low output voltage |
ISTAT = 1.6 mA |
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0.5 |
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V |
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ILSTAT |
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Status leakage current |
Normal operation; VSTAT = 5 V |
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10 |
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mA |
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CSTAT |
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Status pin input |
Normal operation; VSTAT = 5 V |
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100 |
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pF |
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capacitance |
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VSCL |
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Status clamp voltage |
ISTAT = 1 mA |
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6 |
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6.8 |
8 |
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V |
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ISTAT = -1 mA |
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-0.7 |
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V |
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Table 10. |
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Protection(1) |
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Symbol |
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Parameter |
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Test conditions |
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Min. |
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Typ. |
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Max. |
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Unit |
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TTSD |
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Shutdown temperature |
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150 |
175 |
200 |
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°C |
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TR |
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Reset temperature |
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135 |
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°C |
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Thyst |
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Thermal hysteresis |
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7 |
15 |
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°C |
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tSDL |
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Status delay in overload |
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Tj > TTSD |
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20 |
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µs |
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conditions |
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Ilim |
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Current limitation |
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VCC = 13 V |
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6 |
9 |
15 |
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A |
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5.5 V < VCC < 36 V |
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15 |
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A |
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Vdemag |
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Turn-off output clamp |
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IOUT = 2 A; L = 6 mH |
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VCC-41 |
VCC-48 |
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VCC-55 |
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V |
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voltage |
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1.To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
Doc ID 10903 Rev 3 |
9/28 |