ST VND830LSP-E User Manual

Features

Typ e R

DS(on)

VND830LSP-E 60 mΩ 18 A

1. Per channel

■ ECOPACK

■ Automotive Grade: compliance with AEC

®

: lead free and RoHS compliant

guidelines

■ Very low standby current

■ CMOS compatible input

■ On-state open-load detection

■ Off-state open-load detection

■ Thermal shutdown protection and diagnosis

■ Undervoltage shutdown

■ Overvoltage clamp

■ Output stuck to V

■ Load current limitation

■ Reverse battery protection

■ Electrostatic discharge protection

detection

CC

I

OUT

(1)

V

36 V

CC

(1)

VND830LSP-E

Double channel high-side driver

Description

The VND830LSP-E is a monolithic device made
using STMicroelectronics™ VIPower™ M0-3
technology. It is intended for driving any kind of
load with one side connected to ground. Active
V

pin voltage clamp protects the device against

CC

low energy spikes (see ISO7637 transient
compatibility table).

Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload.

The device detects open-load condition both in
on-state and off-state. The open-load threshold is
aimed at detecting the 5 W/12 V standard bulb as
an open-load fault in the on-state.

Device automatically turns off in case of ground
pin disconnection.

10

1

PowerSO-10

Table 1. Device summary

Order codes

Package

Tube Tape and reel

Power-SO-10™ VND830LSP-E VND830LSPTR-E

February 2011 Doc ID 10882 Rev 3 1/27

www.st.com

1

Contents VND830LSP-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.5 PowerSO-10 maximum demagnetization energy
(V

= 13.5 V) 19

CC

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.2 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2/27 Doc ID 10882 Rev 3

VND830LSP-E List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 7. V

Table 8. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 9. Switching (V

Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 13. Electrical transient requirements on V
Table 14. Electrical transient requirements on V
Table 15. Electrical transient requirements on V

Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 17. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

- output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

CC

= 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

Doc ID 10882 Rev 3 3/27

List of figures VND830LSP-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 11. Status low output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 12. Satus clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 13. On-state resistance vs T
Figure 14. On-state resistance vs V

Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 23. I

LIM

vs T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

case

Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 26. Maximum turn- off current versus load inductance
Figure 27. PowerSO-10 PC board

Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 29. PowerSO-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 21

Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 21

Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 25

Figure 33. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

CC

(1)

(1)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4/27 Doc ID 10882 Rev 3

VND830LSP-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

cc

V

GND

INPUT1

STATUS1

INPUT2

STATUS2

cc

CLAMP

OVER TEMP. 1

OVER TEMP. 2

LOGIC

OVERVO LTAGE

UNDERVOLTAGE

CLAMP 1

DRIVER 1

CURRENT LIMITER 1

OPEN LOAD ON 1

OPEN LOAD OFF 1

CLAMP 2

DRIVER 2

CURRENT LIMITER 2

OPEN LOAD ON 2

OPEN LOAD OFF 2

OUTPUT1

OUTPUT2

Figure 2. Configuration diagram (top view)

GROUND
INPUT 1

STATUS 1
STAT US 2
INPUT 2

6
7

8
9

10

5
4
3

2

1

11

V

CC

OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2

PowerSO-10

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input

Floating X X X X

To ground X

Through 10KΩ

resistor

Doc ID 10882 Rev 3 5/27

Electrical specifications VND830LSP-E

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

CC

I

IN1

V

IN1

V

STAT1

I

STAT1

I

IN2

V

IN2

I

STAT2

V

STAT2

INPUT1

STATUS 1

INPUT2

STATUS 2

GND

OUTPUT1

OUTPUT2

I

GND

I

OUT1

I

OUT2

V

OUT2

(1)

V

F1

V

OUT1

V

CC

1. VFn = V

CCn

- V

during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Ta bl e 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics sure program and other relevant quality
document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

- I

I

-I

I

V

CC

GND

OUT

OUT

I

IN

STAT

ESD

P

DC supply voltage 41 V

Reverse DC supply voltage -0.3 V

CC

DC reverse ground pin current -200 mA

DC output current Internally limited A

Reverse DC output current -6 A

DC input current +/- 10 mA

CD status current +/- 10 mA

Electrostatic discharge (Human Body Model:
R=1.5KΩ; C=100pF)

– INPUT
–STATUS
–OUTPUT
–V

CC

Power dissipation at Tc=25°C 74 W

tot

4000
4000
5000
5000

V
V
V
V

6/27 Doc ID 10882 Rev 3

VND830LSP-E Electrical specifications

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Maximum switching energy

E

T

MAX

T

j

T

c

STG

(L = 0.14 mH; R
T

= 150 °C; IL=14A)

jstart

=0Ω; V

L

=13.5V;

bat

Junction operating temperature Internally limited °C

Case operating temperature -40 to 150 °C

Storage temperature -55 to 150 °C

52 mJ

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Value Unit

R

thj-case

R

thj-amb

1. When mounted on a standard single sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal

mounting and no artificial air flow.

2. When mounted on a standard single sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick). Horizontal

mounting and no artificial air flow.

Thermal resistance junction-case 2 °C/W

Thermal resistance junction-ambient 52

(1)

37

(2)

°C/W

Doc ID 10882 Rev 3 7/27

Electrical specifications VND830LSP-E

2.3 Electrical characteristics

Values specified in this section are for 8 V < V

< 36 V; -40 °C < Tj < 150 °C, unless

CC

otherwise specified. (Per each channel).

Table 5. Power output

Symbol Parameter Test conditions Min. Typ. Max. Unit

(1)

V

V

USD

V

R

I

I

L(off1)

I

L(off2)

I

L(off3)

I

L(off4)

Operating supply voltage 5.5 13 36 V

CC

(1)

Undervoltage shutdown 3 4 5.5 V

(1)

Overvoltage shutdown 36 V

OV

I

=2A; Tj=25°C 60 mΩ

On-state resistance

ON

(1)

Supply current

S

Off-state output current

Off-state output current VIN=0V; V

Off-state output current

Off-state output current

OUT

=2A; V

I

OUT

Off-state; V
V

IN=VOUT

Off-state; V
V

IN=VOUT

On-state; V

V

IN=VOUT

= 125 °C

T

j

V

IN=VOUT

=125°C

T

j

V

IN=VOUT

Tj =25°C

8V 120 mΩ

CC >

=13V;

CC

=0V

=13V;

CC

=0V; Tj=25°C

=13V 5 7 mA

CC

=0V; VCC=36V;

=3.5V -75 0 µA

OUT

12 40 µA

12 25 µA

050µA

=0V; VCC=13V;

=0V; VCC=13V;

5µA

3µA

1. Per device.

Table 6. Protection

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

T

T

V

demag

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

Tabl e 7. V

Shutdown temperature 150 175 200 °C

TSD

Reset temperature 135 °C

T

R

Thermal hysteresis 7 15 °C

hyst

V

= 13 V 18 23 29 A

I

Current limitation

lim

Turn-off output clamp
voltage

diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

- output diode

CC

CC

5.5 V < V

I

OUT

<36 V 29 A

CC

=2A; L=6mH VCC-41 VCC-48 VCC-55 V

Symbol Parameter Test conditions Min Typ Max Unit

V

Forward on voltage -I

F

= 1.3 A; Tj= 150 °C — — 0.6 V

OUT

8/27 Doc ID 10882 Rev 3

VND830LSP-E Electrical specifications

Table 8. Status pin

Symbol Parameter Test conditions Min Typ Max Unit

V

Status low output voltage I

STAT

I

LSTAT

C

V

Table 9. Switching (VCC=13V)

Status leakage current Normal operation; V

Status pin input

STAT

capacitance

Status clamp voltage

SCL

Symbol Parameter Test conditions Min Typ Max Unit

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

Turn-on delay time

Turn-on delay time

/dt)onTurn-on voltage slope

/dt)

Turn-off voltage slope

off

= 1.6 mA 0.5 V

STAT

= 5 V 10 mA

STAT

Normal operation; V

I

= 1 mA 6 6.8 8 V

STAT

= -1 mA -0.7 V

I

STAT

=13Ω from VIN rising edge

R

L

to V

R
to V

R
V

R
to V

=1.3V

OUT

=13Ω from VIN falling edge

L

= 11.7 V

OUT

=13Ω from V

L

=10.4V

OUT

=13Ω from V

L

=1.3V

OUT

= 5 V 100 pF

STAT

—30—µs

—30—µs

OUT

OUT

= 1.3 V to

=11.7V

—

—

See

Figure 21

See

Figure 22

—V/µs

—V/µs

Table 10. Open-load detection

Symbol Parameter Test conditions Min Typ Max Unit

Open-load on-state detection

I

OL

threshold

t

T

Table 11. Logic input

Open-load on-state detection delay I

DOL(on)

Openload off-state voltage detection

V

OL

threshold

DOL(off)

Open-load detection delay at turn-off 1000 µs

V

= 5 V 0.6 0.9 1.2 A

IN

= 0 A 200 µs

OUT

VIN= 0 V 1.5 2.5 3.5 V

Symbol Parameter Test conditions Min Typ Max Unit

V

V

V

I

V

I

I(hyst)

Input low level 1.25 V

IL

Low level input current VIN=1.25V 1 µA

IL

Input high level 3.25 V

IH

High level input current VIN= 3.25 V 10 µA

IH

Input hysteresis voltage 0.5 V

I

=1mA 6 6.8 8 V

Input clamp voltage

ICL

IN

I

=-1mA -0.7 V

IN

Doc ID 10882 Rev 3 9/27