ST VND830LSP User Manual

®
VND830LSP
DOUBLE CHANNEL HIGH SIDE DRIVER
TYPE R
DS(on)
I
OUT
V
CC
VND830 LSP 60 m(*) 18 A (*) 36 V
(*) Per each channel
CMOS COMPATIBLE INPUTS
OPEN DRAIN STATUS OUTPUTS
OFF STATE OPEN LOAD DETECTION
SHORTED LOAD PROTECTION
UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
LOSS OF GROUND PROTECTION
VERY LOW STAND-BY CURRENT
REVERSE BATTERY PROTECTION (**)
DESCRIPTION
The VND830LSP is a monolith ic device made by using STMicroelectronics VIPower M0-3 Technology, i ntended for dr iving any ki nd of load with one side connected to ground. Active VCC pin voltage clamp protec ts the device against low energy spikes (see ISO7637 transient
BLO C K DIAGRA M
10
1
PowerSO-10
compatibility table). Active current limitation combined with thermal shutdown a nd automatic restart protects the device against over load. The device detects open load condition both in on and off state. The openload threshold is aimed at detecting the 5W/12V standard bulb as an openload fault in the on state. Device automatically turns off in case of ground pin disconnection.
V
CC
V
CC
CLAMP
GND
INPUT1
STATUS1
OVERTEMP. 1
INPUT2
STATUS2
OVERTEMP. 2
(**) See application schematic at page 8
LOGIC
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPENLOAD ON 1
OPENLOAD OFF 1
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPENLOAD ON 2
OPENLOAD OFF 2
OUTPUT1
OUTPUT2
March 20 03 1/18
VND830LSP
ABSOLUTE MAXIMUM RATI NG
Symbol Parameter Value Unit
tot
DC Supply Voltag e 41 V Reverse DC Supply Voltage - 0.3 V
CC
DC Reverse Ground Pin Current - 200 mA DC Output Current Internally Limited A Reverse DC Output Current - 6 A DC Input Current +/- 10 mA DC Status Cur rent +/- 10 mA Electros tatic Dischar ge (Human Bod y Model: R=1.5K Ω; C=100pF)
- INPUT
- STATUS
- OUTPU T
- V
CC
4000 4000 5000 5000
Powe r Dissipation TC=25°C 74 W
Maximum Switching Energy (L=0.14m H; R Junction Operating Temperature Internally Limited °C
j
Case Operating Temperature - 40 to 150 °C
c
=0; V
L
=13.5V ; T
bat
=150ºC ; IL=14A)
jstart
52 mJ
Storage Temperature - 55 to 150 °C
V
CC
- V
- I
GND
I
OUT
- I
OUT
I
IN
I
STAT
V
ESD
P
E
MAX
T
T
T
stg
CONNECTION DIAGRAM (TOP VIEW)
V V V V
GROUND INPUT 1 STATUS 1 STATUS 2 INPUT 2
V
CC
CURRENT AND VOLTAGE CONVENTIONS
I
IN1
I
V
IN1
V
STAT1
STAT1
I
IN2
I
V
STAT2
IN2
V
STAT2
INPUT 1
STATUS 1
INPUT 2
STATUS 2
6 7 8 9
10
11
5 4 3
2 1
V
CC
OUTPUT 1 OUTPUT 1 N.C. OUTPUT 2 OUTPUT 2
I
OUT1
I
S
V
CC
OUTPUT 1
V
OUT1
I
OUT2
V
OUT2
GND
OUTPUT 2
I
GND
2/18
1
VND830LSP
THERMAL DATA
Symbol Parameter Value Unit
R
thj-case
R
thj-amb
(*) When mounted on a standard single-sided FR-4 board with 50mm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air
flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C< Tj <150°C, unless otherwise specified)
(Per each channel) POWER OUTPUT
Symbol Parameter Test Conditions Mi n Typ Max Unit
V
CC
V
USD
V
OV
R
ON
I
S
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Thermal R esistance Ju nction-ca se 2 °C/W
Thermal Resistance Ju nction-amb ient 52 (*) °C/W
(**) Oper at i ng Su pp ly Voltage 5.5 13 36 V
(**) Undervoltage Shut-down 3 4 5.5 V
(**) Overvoltage Shut-down 36 V
On State Resistance
(**) Supply Current
Off State Output Curren t VIN=V Off State Output Curren t VIN=0V; V Off State Output Curren t VIN=V Off State Output Curren t VIN=V
=2A; Tj=25°C
I
OUT
I
=2A; VCC> 8V
OUT
Off State; V Off State; V
V
IN=VOUT
On State; V
OUT
OUT OUT
=13V; V
CC
=13V; Tj =25°C;
CC
=0V
=13V
CC
IN=VOUT
=0V
12
12
5
=0V; VCC=36V; Tj=125°C 0 50 µA
=3.5V -75 0 µA
OUT
=0V; Vcc=13V; Tj =125°C 5 µA =0V; Vcc=13V; Tj =25°C 3 µA
60
120
40
25
7
m m
µA
µA
mA
(**) Per device
SWITCHING (VCC =13V)
Symbol Parame ter Test Condit ions Min Ty p Max Unit
RL=6.5Ω from VIN rising edge to V
=1.3V
OUT
RL=6.5Ω from VIN falling edge to V
=11.7V
OUT
RL=6.5Ω from V V
=10.4V
OUT
RL=6.5Ω from V V
=1.3V
OUT
=1.3V to
OUT
=11.7V to
OUT
30 µs
30 µs
See
relative
diagram
See
relative
diagram
dV
dV
t
d(on)
t
d(off )
dt
dt
OUT
(on)
OUT
(off)
Turn-on Delay Time
Turn-off Delay Time
/
Turn-on Voltage Slope
/
Turn-off Voltage Slope
LOGIC INPUT
Symbol Param eter Test Conditions M in Typ Max Unit
Input Low Level 1.25 V
IL
Low Level Input Current VIN = 1.25V 1 µA
IL
Input High Level 3.25 V
IH
High Level Input Current VIN = 3.25V 10 µA Input Hyst eresis Voltage 0.5 V
I
Input Clamp Voltage
= 1mA
IN
I
= -1mA
IN
66.8
-0.7
8V
V
V
V
I
V
I
IH
I(hyst)
ICL
V/µs
V/µs
V
3/18
1
VND830LSP
ELECTRICAL CHARACTERISTICS (continued)
STATUS PIN
Symbol Parameter Test Conditions Min Typ Max Unit
V
STAT
I
LSTAT
C
STAT
V
SCL
Status Low Output Voltage I Status Leakage Current Normal Operation; V Status Pin Input
Capacitance Status Clamp Voltage
PROTECTIONS
Symbol Parame ter Test Condit ions Min Ty p Max Unit
T
TSD
T
T
t
SDL
I
V
demag
hyst
lim
Shut-down Temperature 150 175 200 °C
Reset Temp erature 135 °C
R
Ther ma l Hy steresi s 7 15 °C Status Delay in Overload
Conditions Current limitation Turn-off Output Clamp
Voltage
= 1.6 mA 0.5 V
STAT
Normal Operation; V
= 1mA
I
STAT
I
= - 1mA
STAT
Tj>T
TSD
V
=13V
CC
5.5V < V I
OUT
< 36V
CC
=2A; L= 6m H VCC-41 VCC-48 VCC-55 V
= 5V 10 µA
STAT
= 5V 100 pF
STAT
66.8
-0.7
18 23 29
8V
20 µs
29
V
A A
OPENLOAD DETECTION
Symbol Param eter Test Conditions M in Typ Max Unit
I
OL
t
DOL(on)
V
T
DOL(off)
OPEN LOAD STATUS TIMING (with external pull-up)
V
INn
V
STATn
Openload ON State Detectio n Threshold Openload ON State Detection Delay
=5V 0.6 0.9 1.2 A
V
IN
=0A 200 µs
I
OUT
Openload OFF State Voltage Detection
OL
Threshold Openload Detection Delay
at Turn Off
V
OUT
t
DOL(off)
VIN=0V 1.5 2.5 3.5 V
OL
I
OUT
t
DOL(on)
> V
< I
OL
V
INn
V
STATn
1000 µs
OVER TEMP STATUS TIMING
Tj > T
TSD
t
SDL
t
SDL
4/18
2
1
Switching time Waveforms
V
OUTn
dV
/dt
OUT
(on)
V
INn
t
d(on)
80%
10%
t
d(off)
90%
dV
OUT
VND830LSP
/dt
(off)
t
t
TRUTH TABLE
CONDITIONS INPUT OUTPUT STATUS
Normal Operation
Current Limitation
Overtemperature
Undervoltage
Overvoltage
Output Voltage > V
Output Current < I
OL
OL
L
H
L H H
L H
L H
L H
L H
L H
L
H
L X X
(T
(T
< T
j
> T
j
L
L
L
L
L
L H
H
L H
TSD
TSD
H H
H ) H ) L
H
L
X
X
H
H
L
H
H
L
5/18
1
VND830LSP
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1
Test Pulse
1 -25 V -50 V -75 V -100 V 2 ms 10
2 +25 V +5 0 V +75 V +100 V 0.2 ms 10 3a -25 V -50 V -100 V -150 V 0.1 µs 50 3b +25 V +50 V +75 V +100 V 0.1 µs 50
4 -4 V -5 V -6 V -7 V 100 ms, 0.01
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2
ISO T/R 76 37/1
Test Pulse
1C C C C
2C C C C 3aCCCC 3bCCCC
4C C C C
5C E E E
CLASS CONTENTS
C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device is not performed as designed after exposure and cannot be returned
to proper operation without replacing the device.
I II III IV Dela ys and
I II III IV
TEST LEVELS
TEST LEVELS R ESULTS
Impedance
6/18
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