ST VND830E-E User Manual

VND830E-E

Double channel high-side driver

Features

Type	RDS(on)	IOUT	VCC
VND830E-E	65 mΩ(1)	9.5 A(1)	36 V

1. Per each channel.

■Output current: 9.5 A

■CMOS compatible inputs

■On-state open-load detection

■Off-state open-load detection

■Output stuck to VCC detection

■Open drain status outputs

■Undervoltage shutdown

■Overvoltage clamp

■Thermal shutdown

■Current and power limitation

■Very low standby current

■Protection against loss of ground and loss of VCC

■Reverse battery protection

■Very low electromagnetic susceptibility

■Optimized electromagnetic emission

Description

The VND830E-E is a monolithic device made by using STMicroelectronics™ VIPower™ M0-3 technology. It is intended for driving resistive or inductive loads with one side connected to ground.

Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).

The device detects open-load condition both in on-state and off-state. Output shorted to VCC is detected in the off-state.

Output current limitation protects the device in overload condition. In case of long duration overload, the device limits the dissipated power to safe level up to thermal shutdown intervention.

Thermal shutdown with automatic restart allows the device to recover normal operation as soon as fault condition disappears.

Table 1.	Device summary
	Package		Order codes
		Tube		Tape and reel
	SO-16L	VND830E-E		VND830ETR-E

May 2010

Doc ID 17461 Rev 1

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www.st.com

VND830E-E	Contents

Contents

1	Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 5
2	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 6
	2.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
	2.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.4	Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
3	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		16
	3.1	GND protection network against reverse battery . . . . . . . . . . . . . . . . . . .	16
		3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . .	16
		3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . .	17
	3.2	Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
	3.3	MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
	3.4	Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
	3.5	Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
4	Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		20
	4.1	SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
5	Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		23
	5.1	ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
6	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		25

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List of tables	VND830E-E

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Power outputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 6. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 7. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 8. VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 13. Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 14. Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 15. Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 17. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

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VND830E-E	List of figures

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 13. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 23. ILIM vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 25. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 26. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 27. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 28. SO-16L PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 29. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 30. SO-16 L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 31. Thermal fitting model of a quad channel HSD in SO-16L. . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 32. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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Block diagram and pin description	VND830E-E

1 Block diagram and pin description

Figure 1. Block diagram

			Vcc
	Vcc	OVERVOLTAGE
	CLAMP
		UNDERVOLTAGE
	GND	CLAMP 1
	INPUT1	DRIVER 1	OUTPUT1
	STATUS1		CLAMP 2
		CURRENT LIMITER 1	DRIVER 2
		LOGIC
	OVERTEMP. 1		OUTPUT2
		OPEN-LOAD ON 1
	INPUT2		CURRENT LIMITER 2
		OPEN-LOAD OFF 1	OPEN-LOAD ON 2
	STATUS2
			OPEN-LOAD OFF 2
	OVERTEMP. 2

Figure 2. Configuration diagram (top view)

							VCC
		VCC			1	16
		N.C.					OUTPUT 1
		GND					OUTPUT 1
	INPUT 1						OUTPUT 1
STATUS 1							OUTPUT 2
STATUS 2							OUTPUT 2
	INPUT 2						OUTPUT 2
		VCC			8	9	VCC
Table 2. Suggested connections for unused and not connected pins
Connection / pin		Status				N.C.	Output		Input
Floating			X			X	X		X
To ground			-			X	-	Through 10 KΩ
									resistor

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VND830E-E	Electrical specifications

2 Electrical specifications

2.1Absolute maximum ratings

Stressing the device above the rating listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

	Table 3.	Absolute maximum ratings
	Symbol	Parameter	Value	Unit
	VCC	DC supply voltage	41	V
	- VCC	Reverse DC supply voltage	- 0.3	V
	- IGND	DC reverse ground pin current	- 200	mA
	IOUT	DC output current	Internally limited	A
	- IOUT	Reverse DC output current	- 6	A
	IIN	DC input current	+/- 10	mA
	ISTAT	DC status current	+/- 10	mA
		Electrostatic discharge (Human Body Model: R = 1.5 KΩ;
		C = 100 pF)
	VESD	- INPUT	4000	V
		- STATUS	4000	V
		- OUTPUT	5000	V
		- VCC	5000	V
		Maximum switching energy
	EMAX	(L = 0.45 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;	57	mJ
		IL = 13.5 A)
	Ptot	Power dissipation TC = 25 °C	8.3	W
	Tj	Junction operating temperature	Internally limited	°C
	Tc	Case operating temperature	- 40 to 150	°C
	Tstg	Storage temperature	- 55 to 150	°C

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Electrical specifications	VND830E-E

2.2Thermal data

Table 4.	Thermal data (per island)
Symbol	Parameter	Value			Unit
Rthj-lead	Thermal resistance junction-lead	15			°C/W
R	Thermal resistance junction-ambient	65(1)		47(2)	°C/W
thj-amb

1.When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow.

2.When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow.

2.3Electrical characteristics

Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless otherwise stated.

(Per each channel)

Figure 3. Current and voltage conventions

				IS
	IIN1		VF1	(1)
				V
		INPUT 1	VCC	CC
	V	ISTAT1		I
				OUT1
	IN1	STATUS 1	OUTPUT 1
	VSTAT1	IIN2		VOUT1
		INPUT 2	IOUT2
	VIN2	ISTAT2
			OUTPUT 2	VOUT2
		STATUS 2
		GND
		VSTAT2
			IGND
	1. VFn = VCCn - VOUTn during reverse battery condition.

Table 5.	Power outputs
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
VCC	Operating supply voltage		5.5	13	36	V
VUSD	Undervoltage shutdown		3	4	5.5	V
VOV	Overvoltage shutdown		36			V
RON	On-state resistance	IOUT = 2 A; Tj = 25°C			65	mΩ
		IOUT = 2 A; VCC > 8 V			130	mΩ

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VND830E-E

Electrical specifications

Table 5.

Power outputs (continued)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Off-state; VCC = 13 V;

12

40

µA

VIN = VOUT = 0 V

IS

Supply current

Off-state; VCC = 13 V;

12

25

µA

VIN = VOUT = 0 V; Tj = 25°C

On-state; VCC = 13 V;

5

7

mA

VIN = 5 V; IOUT = 0 A

IL(off1)

Off-state output current

VIN = VOUT = 0 V

0

50

µA

IL(off2)

Off-state output current

VIN = 0 V; VOUT = 3.5 V

-75

0

µA

IL(off3)

Off-state output current

VIN = VOUT = 0 V; VCC = 13 V;

5

µA

Tj = 125°C

IL(off4)

Off-state output current

VIN = VOUT = 0 V; VCC = 13 V;

3

µA

Tj =25°C

Table 6.

Switching (VCC = 13 V)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

td(on)

Turn-on delay time

RL = 6.5 Ω from VIN rising

-

50

-

µs

edge to VOUT = 1.3 V

td(off)

Turn-off delay time

RL = 6.5 Ω from VIN falling

-

50

-

µs

edge to VOUT = 11.7 V

dVOUT/dt(on)

Turn-on voltage slope

RL = 6.5 Ω from VOUT = 1.3 V

-

See

-

V/µs

to VOUT = 10.4 V

Figure 21

dVOUT/dt(off)

Turn-off voltage slope

RL = 6.5 Ω from VOUT = 11.7 V

-

See

-

V/µs

to VOUT = 1.3 V

Figure 22

Table 7.

Logic input

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VIL

Input low level

1.25

V

IIL

Low level input current

VIN = 1.25 V

1

µA

VIH

Input high level

3.25

V

IIH

High level input current

VIN = 3.25 V

10

µA

VI(hyst)

Input hysteresis voltage

0.5

V

VICL

Input clamp voltage

IIN = 1 mA

6

6.8

8

V

IIN = -1 mA

-0.7

V

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