ST VND830E-E User Manual
Features
Type R
VND830E-E 65 mΩ
1. Per each channel.
■ Output current: 9.5 A
■ CMOS compatible inputs
■ On-state open-load detection
■ Off-state open-load detection
■ Output stuck to V
■ Open drain status outputs
■ Undervoltage shutdown
■ Overvoltage clamp
■ Thermal shutdown
■ Current and power limitation
■ Very low standby current
■ Protection against loss of ground and loss of
V
CC
■
Reverse battery protection
■ Very low electromagnetic susceptibility
■ Optimized electromagnetic emission
DS(on)
(1)
CC
I
OUT
9.5 A
detection
(1)
V
CC
36 V
VND830E-E
Double channel high-side driver
Description
The VND830E-E is a monolithic device made by
using STMicroelectronics™ VIPower™ M0-3
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground.
Active V
against low energy spikes (see ISO7637 transient
compatibility table).
The device detects open-load condition both in
on-state and off-state. Output shorted to V
detected in the off-state.
Output current limitation protects the device in
overload condition. In case of long duration
overload, the device limits the dissipated power to
safe level up to thermal shutdown intervention.
pin voltage clamp protects the device
CC
CC
is
Thermal shutdown with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears.
Table 1. Device summary
Package
SO-16L VND830E-E VND830ETR-E
May 2010 Doc ID 17461 Rev 1 1/26
Order codes
Tube Tape and reel
www.st.com
1
VND830E-E Contents
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2 Solution 2: a diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
) in the ground line . . . . . . . . . . . . . . . . . . . . 17
GND
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 17461 Rev 1 2/26
List of tables VND830E-E
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Switching (V
Table 7. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. V
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements on V
Table 14. Electrical transient requirements on V
Table 15. Electrical transient requirements on V
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 17. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
= 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
3/26 Doc ID 17461 Rev 1
VND830E-E List of figures
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. On-state resistance vs T
Figure 14. On-state resistance vs V
Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. I
LIM vs Tcase
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 25. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 26. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 27. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 28. SO-16L PC board
Figure 29. R
vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20
thj-amb
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 30. SO-16 L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 31. Thermal fitting model of a quad channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 32. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
CC
Doc ID 17461 Rev 1 4/26
Block diagram and pin description VND830E-E
1 Block diagram and pin description
Figure 1. Block diagram
V
cc
V
GND
INPUT1
STATUS1
INPUT2
STATUS2
cc
CLAMP
OVERT EMP. 1
OVERT EMP. 2
LOGIC
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPEN-LOAD ON 1
OPEN-LOAD OFF 1
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPEN-LOAD ON 2
OPEN-LOAD OFF 2
OUTPUT1
OUTPUT2
Figure 2. Configuration diagram (top view)
V
CC
1
16
N.C.
GND
INPUT 1
STATUS 1
STATUS 2
INPUT 2
V
CC
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground - X -
8
9
V
CC
OUTPUT 1
OUTPUT 1
OUTPUT 1
OUTPUT 2
OUTPUT 2
OUTPUT 2
V
CC
Through 10 KΩ
resistor
5/27 Doc ID 17461 Rev 1
VND830E-E Electrical specifications
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in Tab le 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality
document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
- V
- I
I
- I
I
V
E
T
CC
CC
GND
OUT
OUT
I
IN
STAT
ESD
MAX
P
tot
T
T
c
stg
DC supply voltage 41 V
Reverse DC supply voltage - 0.3 V
DC reverse ground pin current - 200 mA
DC output current Internally limited A
Reverse DC output current - 6 A
DC input current +/- 10 mA
DC status current +/- 10 mA
Electrostatic discharge (Human Body Model: R = 1.5 KΩ;
C = 100 pF)
- INPUT
- STATUS
- OUTPUT
- V
CC
4000
4000
5000
5000
Maximum switching energy
(L = 0.45 mH; R
= 13.5 A)
I
L
= 0 Ω; V
L
= 13.5 V; T
bat
jstart
= 150 °C;
57 mJ
Power dissipation TC=25°C 8.3 W
Junction operating temperature Internally limited °C
j
Case operating temperature - 40 to 150 °C
Storage temperature - 55 to 150 °C
V
V
V
V
Doc ID 17461 Rev 1 6/27
Electrical specifications VND830E-E
2.2 Thermal data
Table 4. Thermal data (per island)
Symbol Parameter Value Unit
R
thj-lead
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all VCC pins.
Horizontal mounting and no artificial air flow.
2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick) connected to all VCC pins.
Horizontal mounting and no artificial air flow.
Thermal resistance junction-lead 15 °C/W
Thermal resistance junction-ambient 65
(1)
47
(2)
°C/W
2.3 Electrical characteristics
Values specified in this section are for 8 V < V
otherwise stated.
(Per each channel)
Figure 3. Current and voltage conventions
I
IN1
INPUT 1
I
V
IN1
STAT1
STATUS 1
V
STAT1
I
IN2
INPUT 2
I
V
STAT2
IN2
STATUS 2
V
STAT2
< 36 V; -40 °C < Tj < 150 °C, unless
CC
(1)
V
F1
V
CC
I
OUT1
OUTPUT 1
V
OUT1
I
OUT2
OUTPUT 2
V
OUT2
GND
I
GND
I
S
V
CC
1. VFn = V
Table 5. Power outputs
CCn
- V
during reverse battery condition.
OUTn
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
R
Operating supply voltage 5.5 13 36 V
CC
Undervoltage shutdown 3 4 5.5 V
USD
Overvoltage shutdown 36 V
OV
I
= 2 A; Tj = 25°C
On-state resistance
ON
OUT
I
OUT
= 2 A; V
CC
7/27 Doc ID 17461 Rev 1
> 8 V
65
130mΩmΩ
VND830E-E Electrical specifications
Table 5. Power outputs (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
µA
40
µA
25
mA
7
5µA
3µA
I
Supply current
S
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Table 6. Switching (V
Off-state output current V
Off-state output current V
Off-state output current
Off-state output current
CC
Off-state; V
V
Off-state; V
V
On-state; V
V
V
T
V
T
= 13 V)
= V
IN
= V
IN
= 5 V; I
IN
= V
IN
= 0 V; V
IN
= V
IN
= 125°C
j
= V
IN
=25°C
j
= 13 V;
CC
= 0 V
OUT
= 13 V;
CC
= 0 V; Tj = 25°C
OUT
= 13 V;
CC
= 0 A
OUT
= 0 V 0 50 µA
OUT
= 3.5 V -75 0 µA
OUT
OUT
OUT
= 0 V; V
= 0 V; V
CC
CC
= 13 V;
= 13 V;
12
12
5
Symbol Parameter Test conditions Min. Typ. Max. Unit
= 6.5 Ω from VIN rising
R
t
d(on)
t
d(off)
dV
OUT
dV
OUT
Table 7. Logic input
Turn-on delay time
Turn-off delay time
/dt
Turn-on voltage slope
(on)
/dt
Turn-off voltage slope
(off)
L
edge to V
= 6.5 Ω from VIN falling
R
L
edge to V
R
= 6.5 Ω from V
L
to V
OUT
= 6.5 Ω from V
R
L
to V
OUT
= 1.3 V
OUT
= 11.7 V
OUT
= 10.4 V
= 1.3 V
OUT
OUT
= 1.3 V
= 11.7 V
-50-µs
-50-µs
See
-
-
Figure 21
See
Figure 22
-V/µs
-V/µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
V
I
I(hyst)
Input low level 1.25 V
IL
Low level input current V
I
IL
Input high level 3.25 V
IH
High level input current V
IH
= 1.25 V 1 µA
IN
= 3.25 V 10 µA
IN
Input hysteresis voltage 0.5 V
Input clamp voltage
ICL
I
IN
I
IN
= 1 mA
= -1 mA
66.8
-0.7
8V
V
Doc ID 17461 Rev 1 8/27
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