ST VND810PEP-E User Manual
VND810PEP-E
Double channel high-side driver
Features
Type |
RDS(on) |
IOUT |
VCC |
VND810PEP-E |
160mW(1) |
3.5A(1) |
36V |
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1. Per each channel.
■CMOS compatible inputs
■Open drain status outputs
■On-state open-load detection
■Off-state open-load detection
■Shorted load protection
■Undervoltage and overvoltage shutdown
■Loss of ground protection
■Very low standby current
■Reverse battery protection
■In compliance with the 2002/95/EC european directive
PowerSSO-12
Description
The VND810PEP-E is a monolithic device made using STMicroelectronics® VIPower™ M0-3 Technology. The VND810PEP-E is intended for driving any type of multiple load with one side connected to ground.
The active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects the open-load condition in both the on and off-state.
In the off-state the device detects if the output is shorted to VCC. The device automatically turns off in the case where the ground pin becomes disconnected.
Table 1. |
Device summary |
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Package |
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Order codes |
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Tube |
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Tape and reel |
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PowerSSO-12 |
VND810PEP-E |
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VND810PEPTR-E |
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November 2011 |
Doc ID 10858 Rev 5 |
1/25 |
www.st.com
Contents |
VND810PEP-E |
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Contents
1 |
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 5 |
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2 |
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 6 |
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2.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
6 |
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2.2 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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2.3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
3 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
14 |
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3.1 |
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . |
14 |
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 14
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 15
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 |
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
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4.1 |
PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
5 |
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
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5.1 |
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
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5.2 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
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5.3 |
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
22 |
6 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
23 |
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2/25 |
Doc ID 10858 Rev 5 |
VND810PEP-E |
List of tables |
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List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Power outputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 11. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 12. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 13. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 14. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 15. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 16. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 17. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 18. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 19. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Doc ID 10858 Rev 5 |
3/25 |
List of figures |
VND810PEP-E |
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List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 9. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 10. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 17 Figure 11. PowerSSO-12 thermal impedance junction ambient single pulse (one channel ON). . . . . 18 Figure 12. Thermal fitting model of a double channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 18 Figure 13. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 14. PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 15. PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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VND810PEP-E |
Block diagram and pin description |
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1 Block diagram and pin description
Figure 1. Block diagram
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Vcc |
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Vcc |
OVERVOLTAGE |
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CLAMP |
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UNDERVOLTAGE |
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GND |
CLAMP 1 |
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INPUT1 |
DRIVER 1 |
OUTPUT1 |
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STATUS1 |
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CLAMP 2 |
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CURRENT LIMITER 1 |
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DRIVER 2 |
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LOGIC |
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OVERTEMP. 1 |
OUTPUT2 |
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OPEN-LOAD ON 1 |
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INPUT2 |
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CURRENT LIMITER 2 |
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OPEN-LOAD OFF 1 |
OPEN-LOAD ON 2 |
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STATUS2 |
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OPEN-LOAD OFF 2 |
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OVERTEMP. 2 |
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Figure 2. Configuration diagram (top view)
GND |
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1 |
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12 |
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Vcc |
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NC |
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2 |
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11 |
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OUTPUT1 |
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INPUT1 |
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3 |
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10 |
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OUTPUT1 |
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STATUS1 |
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4 |
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OUTPUT2 |
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STATUS2 |
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5 |
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OUTPUT2 |
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INPUT2 |
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7 |
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Vcc |
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TAB = Vcc
Table 2. |
Suggested connections for unused and not connected pins |
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Connection / pin |
Status |
Not connected |
Output |
Input |
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Floating |
X |
X |
X |
X |
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To ground |
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Through 10KΩ |
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resistor |
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5/24 |
Electrical specifications |
VND810PEP-E |
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2 Electrical specifications
2.1Absolute maximum ratings
Stressing the device above the rating listed in Table 3: Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document available on www.st.com.
Table 3. |
Absolute maximum ratings |
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Symbol |
Parameter |
Value |
Unit |
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VCC |
DC supply voltage |
41 |
V |
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- VCC |
Reverse DC supply voltage |
- 0.3 |
V |
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- IGND |
DC reverse ground pin current |
- 200 |
mA |
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IOUT |
DC output current |
Internally limited |
A |
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- IOUT |
Reverse DC output current |
- 6 |
A |
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IIN |
DC input current |
+/- 10 |
mA |
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ISTAT |
DC Status current |
+/- 10 |
mA |
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Electrostatic discharge (human body model: R=1.5KΩ; |
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C = 100pF) |
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VESD |
- INPUT |
4000 |
V |
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- STATUS |
4000 |
V |
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- OUTPUT |
5000 |
V |
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- VCC |
5000 |
V |
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Ptot |
Power dissipation (per island) at TC = 25°C |
54 |
W |
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Tj |
Junction operating temperature |
Internally limited |
°C |
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Tc |
Case operating temperature |
- 40 to 150 |
°C |
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Tstg |
Storage temperature |
- 55 to 150 |
°C |
6/24 |
Doc ID 10858 Rev 5 |
VND810PEP-E |
Electrical specifications |
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2.2Thermal data
Table 4. |
Thermal data (per island) |
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Symbol |
Parameter |
Maximum value |
Unit |
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Rthj-case |
Thermal resistance junction-case |
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2.3 |
°C/W |
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Rthj-amb |
Thermal resistance junction-ambient |
61(1) |
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50(2) |
°C/W |
(one chip ON) |
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1.When mounted on a standard single-sided FR-4 board with 1cm2 of Cu (at least 35 µm thick) connected to all VCC pins.
2.When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35 µm thick) connected to all VCC pins.
2.3Electrical characteristics
Values specified in this section are for 8V < VCC < 36V; -40°C < Tj < 150°C, unless otherwise stated.
Figure 3. Current and voltage conventions
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IS |
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VF1 |
(*) |
VCC |
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VCC |
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IINn |
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INPUTn |
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VINn |
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I |
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IOUTn |
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STATn |
OUTPUTn |
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STATUSn |
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VOUTn |
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VSTATn |
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GND |
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IGND |
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Note: |
VFn = VCCn - VOUTn during reverse battery condition. |
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Electrical specifications |
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VND810PEP-E |
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Table 5. |
Power outputs |
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Symbol |
Parameter |
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Test conditions |
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Min |
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Typ |
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Max |
Unit |
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VCC |
Operating supply |
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5.5 |
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13 |
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36 |
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V |
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voltage |
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VUSD |
Undervoltage shutdown |
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3 |
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4 |
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5.5 |
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V |
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VOV |
Overvoltage shutdown |
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36 |
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V |
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RON |
On-state resistance |
IOUT = 1A; Tj = 25°C |
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160 |
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mΩ |
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IOUT = 1A; VCC > 8V |
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320 |
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mΩ |
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Off-state; VCC = 13V; |
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VIN = VOUT = 0V |
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12 |
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40 |
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µA |
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Off-state; VCC = 13V; |
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IS |
Supply current |
VIN = VOUT = 0V; |
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Tj = 25°C |
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12 |
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25 |
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µA |
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On-state; VCC = 13V; VIN = 5V; |
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IOUT = 0A |
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5 |
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7 |
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mA |
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IL(off1) |
Off-state output current |
VIN = VOUT = 0V |
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0 |
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50 |
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µA |
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IL(off2) |
Off-state output current |
VIN = 0V; VOUT = 3.5V |
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-75 |
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0 |
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µA |
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IL(off3) |
Off-state output current |
VIN = VOUT = 0V; VCC = 13V; |
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5 |
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µA |
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Tj = 125°C |
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IL(off4) |
Off-state output current |
VIN = VOUT = 0V; VCC = 13V; |
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3 |
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µA |
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Tj = 25°C |
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Table 6. |
Protections and diagnostics |
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Symbol |
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Parameter |
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Test conditions |
Min. |
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Typ. |
Max. |
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Unit |
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TTSD |
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Shutdown temperature |
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150 |
175 |
200 |
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°C |
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TR |
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Reset temperature |
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135 |
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°C |
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Thyst |
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Thermal hysteresis |
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7 |
15 |
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°C |
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tSDL |
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Status delay in overload |
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Tj > TTSD |
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20 |
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µs |
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conditions |
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Ilim |
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Current limitation |
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VCC = 13V |
3.5 |
5 |
7.5 |
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A |
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5.5V < VCC < 36V |
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7.5 |
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A |
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Vdemag |
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Turn-off output clamp |
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IOUT = 1A; L = 6mH |
VCC - |
VCC - |
VCC - |
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V |
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voltage |
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41 |
48 |
55 |
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Note: |
To ensure long term reliability under heavy overload or short circuit conditions, protection |
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and related diagnostic signals must be used together with a proper software strategy. If the |
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device is subjected to abnormal conditions, this software must limit the duration and number |
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of activation cycles. |
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