ST VND810 User Manual

®
VND810
DOUBLE CHANNEL HIGH SIDE DRIVER
TYPE R
DS(on)
I
OUT
V
CC
VND810 160 m(*) 3.5 A (*) 36 V
(*) Per each channel
CMOS COMPATIBLE INPUTS
OPEN DRAIN STATUS OUTPUTS
ON STATE OPEN LOAD DETECTION
OFF STATE OPEN LOAD DETECTION
UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
PROTECTION AGAINST LOSS OF GROUND
VERY LOW STAND-BY CURRENT
REVERSE BATTERY PROTECTIO N (**)
DESCRIPTION
The VND810 is a monolithic device designe d in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltag e clamp protects th e dev ice against low energy spikes (see ISO7637 transient compatibility table). Active current limitation
BLO C K DIAG RA M
SO-16
ORDER CODES
PACKAGE TUBE T&R
SO-16
VND810 VND81013TR
combined with thermal shutdown and automatic restart protects the device against overloa d. The device detects open load condition both in on and off state. Output shorted to VCC is detected in the off state. Dev ice auto mati cally tur ns off in c ase of ground pin disconnection.
V
cc
V
cc
CLAMP
GND
INPUT1
STATUS1
OVERTEMP. 1
INPUT2
STATUS2
OVERTEMP. 2
(**) See appl ic ation schema tic at page 8
LOGIC
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPENLOAD ON 1
OPENLOAD OFF 1
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPENLOAD ON 2
OPENLOA D OFF 2
OUTPUT1
OUTPUT2
July 2002 1/19
VND810
ABSOLUTE MAXIMUM RATI NG
Symbol Parameter Value Unit
tot
DC Supply Voltage 41 V Reverse DC Supply Voltage - 0.3 V
CC
DC Reverse Ground Pin Current - 200 mA DC Output Current Internally Limited A Reverse DC Output Current - 6 A DC Input Current +/- 10 mA DC Status Cur rent +/- 10 mA Electros tatic Discharge (Hum an Body Model: R=1.5KΩ; C=100pF)
- INPUT
- STATUS
- OUTPU T
- V
CC
Maximum Switching Energy (L=1.5mH; R
=0; V
L
=13.5V; T
bat
=150ºC; IL=5A)
jstart
4000 4000 5000 5000
26 mJ
Powe r Dissipation TC=25°C 8.3 W Junction Operating Temperature Internally Limited °C
j
Case Operating Temperature - 40 to 150 °C
c
Storage Temperature - 55 to 150 °C
V
CC
- V
- I
GND
I
OUT
- I
OUT
I
IN
I
stat
V
ESD
E
MAX
P
T
T
T
stg
CONNECTION DIAGRAM (TOP VIEW)
V V V V
V
CC
N.C. GND INPUT 1 ST ATUS 1 STA TUS 2 INPUT 2 V
CC
CURRENT AND VOLTAGE CONVENTIONS
I
IN1
I
V
IN1
V
STAT 1
STAT1
I
IN2
I
V
STAT2
IN2
V
STAT2
INPUT 1
STATUS 1
INPUT 2
STATUS 2
1
16
V
CC
V
CC
OUTPUT 1 OUTPUT 1 OUTPUT 2 OUTPUT 2 V
CC
8
V
9
CC
I
S
V
I
OUT1
CC
V
CC
OUTPUT 1
V
OUT1
I
OUT2
V
OUT2
GND
OUTPUT 2
I
GND
2/19
VND810
THERMAL DATA
Symbol Parameter Value Unit
R
thj-lead
R
thj-amb
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting an d no ar tificial ai r flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C < Tj <150°C, unless otherwise specified)
(Per each channel) POWER OUTPUTS
Symbol Parameter Test Conditions Min Typ Max Unit
V
CC
V
USD
V
OV
R
ON
I
S
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Thermal R esistanc e Junctio n-lead 15 °C/W
Thermal Resistance Junctio n-ambient 75 (*) °C/W
(**) Operating Supply Voltage 5.5 13 36 V
(**) Under Voltage Shut-down 3 4 5.5 V
(**) Ove rvoltage Shut-down 36 V
On State Resistance
(**) Supply Current
Off State Output Curr ent VIN=V Off State Output Curr ent VIN=0V; V Off State Output Curr ent VIN=V Off State Output Curr ent VIN=V
=1A; Tj=25°C
I
OUT
I
=1A; VCC>8V
OUT
Off State; V Off State; V
Tj=25°C
On State; V
OUT
OUT OUT
=13V; VIN=V
CC
=13V; VIN=V
CC
OUT OUT
=0V =0V;
12
12
=13V; VIN=5V; I
CC
OUT
=0A
=0V 0 50 µA
=3.5V -75 0 µA
OUT
=0V; Vcc=13V; Tj =125°C 5 µA =0V; Vcc=13V; Tj =25°C 3 µA
160 320
40
25
5
7
m m
µA
µA
mA
(**) Per device
SWITCHING (VCC=13V)
Symbol Parameter Test Conditions Min Typ Max Unit
RL=13from VIN rising ed ge to V
=1.3V
OUT
RL=13from VIN falling edge to V
=11.7V
OUT
RL=13from V V
=10.4V
OUT
RL=13from V V
=1.3V
OUT
=1.3V to
OUT
=11.7V to
OUT
30 µs
30 µs
See
relative
diagram
See
relative
diagram
dV
dV
t
t
OUT
OUT
d(on)
d(off)
/dt
/dt
Turn-on Delay Time
Turn-off Delay Time
Turn-on Voltage Slope
(on)
Turn-off Voltag e Slope
(off)
LOGIC INPUT
Symbol Param eter Test Conditions Min Typ Max Unit
Input Low Level 1.25 V
IL
Low Level Input Current VIN = 1.25V 1 µA
IL
Input High Level 3.25 V
IH
High Level Input Curr ent VIN = 3.25V 10 µA Input Hyst eresis Voltage 0.5 V
Input Clamp Voltage
= 1mA
I
IN
I
= -1mA
IN
66.8
-0.7
8V
V
I(hyst)
V
V
I
V
I
IH
ICL
V/µs
V/µs
V
3/19
1
VND810
ELECTRICAL CHARACTERISTICS (continued)
STATUS PIN
Symbol Parameter Test Conditions Min Typ Max Unit
V
STAT
I
LSTAT
C
STAT
V
SCL
Status Low Output Voltage I Status Leakage Current Normal Operation; V Status Pin Input
Capacitance Status Clamp Voltage
PROTECTIONS
Symbol Parame ter Test Condit ions Min Typ Max Unit
T
TSD
T
T
t
SDL
I
V
demag
hyst
lim
Shut-down Temperature 150 175 200 °C
Reset Temp erature 135 °C
R
Ther ma l Hy steresi s 7 15 °C Status Delay in Overload
Conditions Current limitation Turn-off Output Clamp
Voltage
= 1.6 mA 0.5 V
STAT
Normal Operation; V
= 1mA
I
STAT
I
= - 1mA
STAT
Tj>T
TSD
= 5V 10 µA
STAT
= 5V 100 pF
STAT
66.8
-0.7
3.5 5 7.5
5.5V<V I
OUT
<36V
CC
=1A; L= 6m H VCC-41 VCC-48 VCC-55 V
8V
20 µs
7.5
V
A A
OPENLOAD DETECTION
Symbol Param eter Test Conditions Min Typ Max Unit
I
OL
t
DOL(on)
V
t
DOL(off)
OPEN LOAD STATUS TIMING (with external pull-up)
V
INn
V
STAT n
Openload ON State Detectio n Threshol d Openload ON State Detection Delay
=5V 20 40 80 mA
V
IN
=0A 200 µs
I
OUT
Openload OFF State Voltage Detection
OL
Threshold Openload Detection Delay
at Turn Off
V
OUT
t
DOL(off)
VIN=0V 1.5 2.5 3.5 V
> V
OL
I
OUT
t
DOL(on)
< I
OL
V
INn
V
STAT n
1000 µs
OVERTEMP ST ATUS TIMING
Tj > T
TSD
t
SDL
t
SDL
4/19
2
Switching time Waveforms
V
OUTn
dV
/dt
OUT
(on)
V
INn
t
d(on)
80%
10%
t
d(off)
90%
dV
OUT
/dt
VND810
(off)
t
t
TRUTH TABLE
CONDITIONS INPUT OUTPUT STATUS
Normal Operation
Current Limitation
Overtemperature
Undervoltage
Overvoltage
Output Voltage > V
Output Current < I
OL
OL
L
H
L H H
L H
L H
L H
L H
L H
L
H
L X X
(T
(T
< T
j
> T
j
L
L
L
L
L
L H
H
L H
TSD
TSD
H H
H
) H
) L
H L
X X
H H
L H
H L
5/19
VND810
ELECTRICAL TRANS IENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1
Test Pulse
1 -25 V -50 V -75 V -100 V 2 ms 10
2 +25 V +50 V +75 V +100 V 0.2 ms 10 3a -2 5 V - 50 V - 100 V -150 V 0.1 µs 50 3b + 25 V +50 V +75 V +100 V 0.1 µs 50
4 -4 V -5 V -6 V -7 V 100 ms, 0.01
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2
ISO T/R 76 37 / 1
Test Pulse
1CCCC
2CCCC 3aCCCC 3bCCCC
4CCCC
5CEEE
CLASS CONTENTS
C All func tions of the device are performed as desi gned afte r exposure to disturbance. E One or more f unctions of the device is not per formed as designe d after exp osure and cannot be
returned to prop er operation withou t replacing the device.
I II III IV Delays and
I II III IV
TEST LEVELS
TEST LEVELS RESULTS
Impedance
6/19
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