VND5T050AK-E
Double channel high-side driver with analog current sense for 24 V automotive applications
Datasheet − production data
Features
Max transient supply voltage |
VCC |
58 V |
Operating voltage range |
VCC |
8 to 36V |
Typ On-State resistance (per ch.) |
RON |
50 mΩ |
Current limitation (typ) |
ILIM |
34 A |
Off state supply current |
IS |
2 µA |
■General
–Very low standby current
–3.0 V CMOS compatible input
–Optimized electromagnetic emission
–Very low electromagnetic susceptibility
–Compliance with European directive 2002/95/EC
–Fault reset standby pin (FR_Stby)
■Diagnostic Functions
–Proportional load current sense
–High current sense precision for wide range currents
–Off-state open load detection
–Output short to VCC detection
–Overload and short to ground latch off
–Thermal shutdown latch-off
–Very low current sense leakage
■Protections
–Undervoltage shutdown
–Overvoltage clamp
–Load current limitation
–Self limiting of fast thermal transients
–Protection against loss of ground and loss of VCC
–Thermal shutdown
–Electrostatic discharge protection
PowerSSO-24
Application
■All types of resistive, inductive and capacitive loads
Description
The VND5T050AK-E is a monolithic device made using STMicroelectronics® VIPower® technology, intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes.
This device integrates an analog current sense which delivers a current proportional to the load current.
Fault conditions such as overload, overtemperature or short to VCC are reported via the current sense pin.
Output current limitation protects the device in overload condition. The device will latch off in case of overload or thermal shutdown.
The device is reset by a low level pass on the fault reset standby pin.
A permanent low level on the inputs and fault reset standby pin disable all outputs and set the device in standby mode.
April 2012 |
Doc ID 022694 Rev. 2 |
1/32 |
This is information on a product in full production. |
www.st.com |
Contents |
VND5T050AK-E |
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Contents
1 |
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 5 |
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2 |
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2.2 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8 |
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2.3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2.4 |
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
21 |
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3.1 |
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . |
21 |
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 22
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4 Maximum demagnetization energy (VCC = 24 V) . . . . . . . . . . . . . . . . . . 23
4 |
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
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4.1 |
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
5 |
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
27 |
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5.1 |
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
27 |
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5.2 |
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
27 |
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5.3 |
PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
29 |
6 |
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
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7 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
31 |
2/32 |
Doc ID 022694 Rev. 2 |
VND5T050AK-E |
List of tables |
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List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 24 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Current sense (8 V < VCC < 36 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 10. Open-load detection (VFR_STBY = 5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 16. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Doc ID 022694 Rev. 2 |
3/32 |
List of figures |
VND5T050AK-E |
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List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram PowerSSO-24 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Treset definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. Tstby definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Output stuck to VCC detection delay time at FRSTBY activation . . . . . . . . . . . . . . . . . . . . . 14 Figure 9. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Delay response time between rising edge of output current and rising edge of current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 12. Device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 13. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 14. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 15. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 16. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 17. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 20. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 21. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 22. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 25. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 26. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 27. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . . 24 Figure 28. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 25
Figure 29. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 25 Figure 30. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 31. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 32. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4/32 |
Doc ID 022694 Rev. 2 |
VND5T050AK-E |
Block diagram and pin description |
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VCC |
Signal Clamp |
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Control & Diagnostic 2 |
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Undervoltage |
Control & Diagnostic 1 |
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Power |
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Clamp |
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IN1 |
DRIVER |
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IN2 |
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VON |
CH1 |
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Limitation |
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Over |
Current |
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Temperature |
Limitation |
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OFF-state |
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Open-load |
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FR_Stby |
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VSENSEH |
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CS1 |
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Current |
CH2 |
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CS2 |
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Sense |
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OUT2 |
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OVERLOAD PROTECTION |
OUT1 |
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LOGIC |
(ACTIVE POWER LIMITATION) |
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GND |
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GAPGCFT00643 |
Table 1. |
Pin function |
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Function |
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VCC |
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Battery connection |
OUT1,2 |
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Power output |
GND |
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Ground connection |
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IN1,2 |
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Voltage controlled input pins with hysteresis, CMOS compatible. They control output |
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switch state |
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CS1,2 |
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Analog current sense pins, they deliver a current proportional to the load current |
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In case of latch-off for overtemperature/overcurrent conditions, a low pulse on the |
FR_Stby |
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FR_Stby pin is needed to reset the channel. |
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The device enters in standby mode if all inputs and the FR_Stby pin are low. |
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5/32 |
Block diagram and pin description |
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Figure 2. Configuration diagram PowerSSO-24 (top view) |
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0OWER33/
("1($'5
Table 2. |
Suggested connections for unused and not connected pins |
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Connection / pin |
Current Sense |
N.C. |
Output |
Input |
FR_Stby |
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Floating |
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Not allowed |
X(1) |
X |
X |
X |
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To ground |
Through 10 KΩ |
X |
Not allowed |
Through 10 KΩ |
Through 10 KΩ |
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resistor |
resistor |
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1. X: do not care.
6/32 |
Doc ID 022694 Rev. 2 |
VND5T050AK-E |
Electrical specifications |
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IS |
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VCC |
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VCC |
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IFR_Stby |
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I |
VFn |
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FR_Stby |
OUTn |
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OUTn |
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VOUTn |
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VFR_Stby |
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ISENSEn |
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IINn |
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CSn |
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INn |
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VSENSEn |
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VINn |
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GND
IGND
Note: |
VFn = VOUTn - VCC during reverse battery condition. |
2.1Absolute maximum ratings
Stressing the device above the ratings listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions reported in this section for extended periods may affect device reliability.
Table 3. |
Absolute maximum ratings |
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Symbol |
Parameter |
Value |
Unit |
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VCC |
DC supply voltage |
58 |
V |
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-VCC |
Reverse DC supply voltage |
0.3 |
V |
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-IGND |
DC reverse ground pin current |
200 |
mA |
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IOUT |
DC output current |
Internally limited |
A |
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-IOUT |
Reverse DC output current |
30 |
A |
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IIN |
DC input current |
-1 to 10 |
mA |
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IFR_Stby |
Fault reset standby DC input current |
-1 to 1.5 |
mA |
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-ICSENSE |
DC reverse CS pin current |
200 |
mA |
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VCSENSE |
Current sense maximum voltage |
VCC - 58 to |
V |
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+VCC |
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EMAX |
Maximum switching energy |
210 |
mJ |
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L = 50 mH; Vbat = 32 V; Tjstart = 150°C; IOUT = 2 A |
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Doc ID 022694 Rev. 2 |
7/32 |
Electrical specifications |
VND5T050AK-E |
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Table 3. |
Absolute maximum ratings (continued) |
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Symbol |
Parameter |
Value |
Unit |
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Lsmax |
Maximum strain inductance in short circuit condition |
40 |
µH |
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RL = 300 mΩ, Vbatt = 32 V, Tjstart = 150°C, lout = ILMHmax |
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Electrostatic discharge |
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(Human Body Model: R = 1.5 KΩ; C = 100 pF) |
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– IN1,2 |
4000 |
V |
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VESD |
– CS1,2 |
2000 |
V |
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– FR_Stby |
4000 |
V |
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– OUT1,2 |
5000 |
V |
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– VCC |
5000 |
V |
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VESD |
Charge device model (CDM-AEC-Q100-011) |
750 |
V |
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Tj |
Junction operating temperature |
-40 to 150 |
°C |
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Tstg |
Storage temperature |
-55 to 150 |
°C |
2.2Thermal data
Table 4. |
Thermal data |
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Symbol |
Parameter |
Value |
Unit |
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Rthj-case |
Thermal resistance junction-case (max.) (with one channel ON) |
2 |
°C/W |
Rthj-amb |
Thermal resistance junction-ambient (max.) |
See |
°C/W |
Figure 27 |
8/32 |
Doc ID 022694 Rev. 2 |
VND5T050AK-E |
Electrical specifications |
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8 V < VCC < 36 V; -40°C < Tj < 150°C, unless otherwise specified.
Table 5. |
Power section |
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Symbol |
Parameter |
Test conditions |
Min. |
Typ. |
Max. |
Unit |
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VCC |
Operating supply voltage |
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8 |
24 |
36 |
V |
VUSD |
Undervoltage shutdown |
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3.5 |
5 |
V |
VUSDhyst |
Undervoltage shutdown |
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0.5 |
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V |
hysteresis |
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R |
On-state resistance(1) |
IOUT = 2 A; Tj = 25°C |
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50 |
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mΩ |
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ON |
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IOUT = 2 A; Tj = 150°C |
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100 |
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Vclamp |
Clamp voltage |
IS = 20 mA |
58 |
64 |
70 |
V |
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Off-state; VCC = 24 V; Tj = 25°C; |
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2(2) |
5(2) |
µA |
IS |
Supply current |
VIN = VOUT = VSENSE = 0 V |
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On-state; VCC = 24 V; VIN = 5 V; |
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4.2 |
6 |
mA |
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IOUT = 0 A |
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VIN = VOUT = 0 V; VCC = 24 V; |
0 |
0.01 |
3 |
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IL(off) |
Off-state output current |
Tj = 25°C |
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µA |
VIN = VOUT = 0 V; VCC = 24 V; |
0 |
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5 |
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Tj = 125°C |
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VF |
Output - VCC diode |
-IOUT = 2 A; Tj = 150°C |
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0.7 |
V |
voltage |
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1.For each channel
2.PowerMOS leakage included
Table 6. |
Switching (VCC = 24 V; Tj = 25 °C) |
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Symbol |
Parameter |
Test conditions |
Min. |
Typ. |
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Max. |
Unit |
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td(on) |
Turn-on delay time |
RL= 12 Ω |
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30 |
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µs |
td(off) |
Turn-off delay time |
RL= 12 Ω |
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40 |
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µs |
dVOUT/dt(on) |
Turn-on voltage slope |
RL= 12 Ω |
0.7 V/us |
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V/µs |
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dVOUT/dt(off) |
Turn-off voltage slope |
RL= 12 Ω |
0.8 V/us |
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V/µs |
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WON |
Switching energy losses |
RL= 12 Ω |
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0.5 |
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mJ |
during twon |
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WOFF |
Switching energy losses |
RL= 12 Ω |
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0.3 |
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mJ |
during twoff |
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Doc ID 022694 Rev. 2 |
9/32 |
Electrical specifications |
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VND5T050AK-E |
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Table 7. |
Logic inputs |
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Symbol |
Parameter |
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Test conditions |
Min. |
Typ. |
Max. |
Unit |
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VIL |
Input low level voltage |
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0.9 |
V |
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IIL |
Low level input current |
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VIN = 0.9 V |
1 |
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µA |
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VIH |
Input high level voltage |
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2.1 |
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V |
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IIH |
High level input current |
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VIN = 2.1 V |
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10 |
µA |
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VI(hyst) |
Input hysteresis voltage |
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0.25 |
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V |
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VICL |
Input clamp voltage |
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IIN = 1 mA |
5.5 |
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7 |
V |
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IIN = -1 mA |
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-0.7 |
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VFR_Stby_L |
Fault reset standby low level |
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0.9 |
V |
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voltage |
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IFR_Stby_L |
Low level fault reset standby |
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VFR_Stby = 0.9 V |
1 |
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µA |
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current |
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VFR_Stby_H |
Fault reset standby high level |
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2.1 |
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V |
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voltage |
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IFR_Stby_H |
High level fault reset standby |
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VFR_Stby = 2.1 V |
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10 |
µA |
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current |
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VFR_Stby |
Fault reset standby hysteresis |
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0.25 |
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V |
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voltage |
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VFR_Stby_CL |
Fault reset standby clamp |
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IFR_Stby = 15 mA (t < 10 ms) |
11 |
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15 |
V |
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voltage |
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IFR_Stby = -1 mA |
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-0.7 |
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V |
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treset |
Overload latch-off reset time |
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See Figure 4 |
2 |
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24 |
µs |
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tstby |
Standby delay |
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See Figure 5 |
120 |
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1200 |
µs |
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Figure 4. |
Treset definition |
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7BUHVHW |
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)5B67%< |
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,1 |
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287387 |
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&6 |
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2YHUORDG |
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&KDQQHO |
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*$3*&)7
10/32 |
Doc ID 022694 Rev. 2 |