ST VND5E160ASO-E User Manual

Double channel high-side driver with analog current sense

("1($'5

Features

Max transient supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ.) I

Off-state supply current I

1. Typical value with all loads connected.

■ General

– Inrush current active management by

power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliance with European directive

2002/95/EC
– Very low current sense leakage
– AEC-Q100 qualified

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off-state open-load detection
– Output short to V

detection

CC

– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

CC

CC

ON

LIMH

S

4.5 to 28V

41 V

160 mΩ

10 A

(1)

2 µA

VND5E160ASO-E

for automotive applications

Datasheet − production data

SO-16L

– Overtemperature shutdown with

autorestart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VND5E160ASO-E is a single channel high­side driver manufactured using ST proprietary
VIPower
SO-16L package. The device is designed to drive
12 V automotive grounded loads, and to provide
protection and diagnostics. It also implements a
3 V and 5 V CMOS-compatible interface for use
with any microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto­restart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel providing enhanced diagnostic
functions including fast detection of overload and
short-circuit to ground through power limitation
indication, overtemperature indication, short­circuit to V
open-load detection. The current sensing and
diagnostic feedback of the whole device can be
disabled by pulling the CS_DIS pin high to share
the external sense resistor with similar devices.

®

M0-5 technology and housed in

diagnosis and on-state and off-state

CC

June 2012 Doc ID 022480 Rev 4 1/35

This is information on a product in full production.

www.st.com

1

Contents VND5E160ASO-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 26

3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28

4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37 Doc ID 022480 Rev 4

VND5E160ASO-E List of tables

List of tables

Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 6. Switching (V

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8 V < V
Table 10. Open-load detection (8 V < V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 16. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

=13V; Tj= 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 022480 Rev 4 3/37

List of figures VND5E160ASO-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5. Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of output current and rising edge of current sense

(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. Iout/ Isense vs Iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

j

Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On-state resistance vs T
Figure 24. On-state resistance vs V

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. I

LIMH

vs T

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28

Figure 35. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 29

Figure 37. SO-16L thermal impedance junction ambient single pulse (one channel ON) . . . . . . . . . . 30

Figure 38. Thermal fitting model of a double channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 39. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

case

4/37 Doc ID 022480 Rev 4

VND5E160ASO-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

Signal Clamp

IN1

IN2

CS_
DIS

CS1

CS2

Undervoltage

Control & Diagnostic 1

DRIVER

Over

temp.

V

SENSEH

LOGIC

Table 1. Pin function

Name Function

V

CC

OUTPUT

GND

n

Battery connection.

Power output.

Ground connection. Must be reverse battery protected by an external
diode/resistor network.

Limitation

Current

Limitation

OFF State
Open load

Current

Sense

OVERLOAD PROTECTION

(ACTIVE POWER LIMITATION)

Power
Clamp

V

ON

CH 1

GND

Channels 2

CH 2

CONTROL & DIAGNOSTIC

OUT2

OUT1

INPUT

n

CURRENT SENSE

Voltage controlled input pin with hysteresis, CMOS compatible; it controls
output switch state.

Analog current sense pin, delivers a current proportional to the load current.

n

CS_DIS Active high CMOS compatible pin, to disable the current sense pin.

Doc ID 022480 Rev 4 5/37

Block diagram and pin description VND5E160ASO-E

Figure 2. Configuration diagram (top view)



*1'

,1387

,1387

&6(16(

&6(16(

&6',6



Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1 kΩ

resistor

X

 9FF9FF

287387

287387

287387

287387

287387

287387

9FF9FF



Through 22 kΩ

resistor

("1($'5

Through

10 kΩ resistor

Through 10 kΩ

resistor

6/37 Doc ID 022480 Rev 4

VND5E160ASO-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

V

CSD

CC

V

V

SENSE1

Fn

V

OUT1

I

I

CSD

I

IN1

V

IN1

I

IN2

V

IN2

CS_DIS

INPUT1

INPUT2

GND

OUTPUT1

CURRENT
SENSE1

OUTPUT2

CURRENT
SENSE2

I

GND

OUT1

I

SENSE1

I

OUT2

I

SENSE2

V

SENSE2

V

OUT2

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

-I

I

OUT

-I

I

CSD

-I

CSENSE

V

CSENSE

E

DC supply voltage 41 V

CC

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

GND

DC output current Internally limited A

Reverse DC output current 6 A

OUT

I

DC input current -1 to 10 mA

IN

DC current sense disable input current -1 to 10 mA

DC reverse CS pin current 200 mA

Current sense maximum voltage

Maximum switching energy (single pulse)
(L = 12 mH; RL=0Ω; V

MAX

I

OUT=IlimL

(Typ.))

=13.5V; T

bat

jstart

=150°C;

V

-41

CC

+V

CC

34 mJ

V
V

Doc ID 022480 Rev 4 7/37

Electrical specifications VND5E160ASO-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge (Human Body Model: R = 1.5 KΩ;
C = 100 pF)

V

V

ESD

ESD

T

– INPUT
– CURRENT SENSE
–CS_DIS
–OUTPUT
–V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

T

Junction operating temperature -40 to 150 °C

j

Storage temperature -55 to 150 °C

stg

4000
2000
4000
5000
5000

V
V
V
V
V

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Typical value Unit

R

th j_pcb

R

thj-amb

Thermal resistance junction-pcb (with one channel ON)

Thermal resistance junction-ambient See Figure 36 °C/W

1. The measure is done in accordance with the JESD 51-8.

(1)

21 °C/W

8/37 Doc ID 022480 Rev 4

VND5E160ASO-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8 V < VCC<28V; -40°C<Tj<150°C, unless otherwise
stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

clamp

I

L(off1)

1. For each channel.

2. PowerMOS leakage included.

Operating supply voltage 4.5 13 28 V

CC

Undervoltage shutdown 3.5 4.5 V

USD

Undervoltage shutdown
hysteresis

On-state resistance

ON

Clamp voltage IS= 20 mA 41 46 52 V

I

Supply current

S

Off-state output
current

Output - VCC diode

V

F

voltage

(1)

(1)

I

=1A; Tj= 25°C 160 mΩ

OUT

(1)

I

=1A; Tj= 150°C 320 mΩ

OUT

I

=1A; VCC=5V; Tj= 25°C 210 mΩ

OUT

Off-state; VCC=13V; Tj=25°C;
V

IN=VOUT=VSENSE=VCSD

On-state; V

=0A

I

OUT

VIN=V

=25°C

T

j

V

IN=VOUT

T

= 125°C

j

-I

=0.6A; Tj= 150°C 0.7 V

OUT

=13V; VIN=5V;

CC

=0V; VCC=13V;

OUT

=0V; VCC=13V;

=0V

0.5 V

(2)

(2)

5

2

µA

36mA

00.01 3 µA

05µA

Table 6. Switching (VCC=13V; Tj= 25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Turn-on delay time RL=13Ω (see Figure 6)— 10 — µs

Turn-off delay time RL=13Ω (see Figure 6)— 15 — µs

/dt)onTurn-on voltage slope RL=13Ω —See Figure 26 —V/µs

/dt)

Turn-off voltage slope RL=13Ω —See Figure 28 —V/µs

off

Switching energy
losses during t

won

Switching energy
losses during t

woff

RL=13Ω (see Figure 6) — 0.03 — mJ

RL=13Ω (see Figure 6) — 0.02 — mJ

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

Doc ID 022480 Rev 4 9/37

Electrical specifications VND5E160ASO-E

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

I

V

I

V

I(hyst)

V

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Table 8. Protections and diagnostics

Input low level voltage 0.9 V

IL

Low level input current VIN=0.9V 1 µA

IL

Input high level voltage 2.1 V

IH

High level input current VIN=2.1V 10 µA

IH

Input hysteresis voltage 0.25 V

I

=1mA 5.5 7 V

Input clamp voltage

ICL

IN

I

=-1mA -0.7 V

IN

CS_DIS low level voltage 0.9 V

Low level CS_DIS current V

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25 V

I

=1mA 5.5 7 V

CS_DIS clamp voltage

CSD

I

=-1mA -0.7 V

CSD

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

=13V 7 10 14 A

I

I

T

T

T

V

DEMAG

V

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

DC short circuit current

limH

Short circuit current

limL

during thermal cycling

Shutdown temperature 150 175 200 °C

TSD

T

Reset temperature TRS + 1 TRS + 5 °C

R

Thermal reset of STATUS 135 °C

RS

Thermal hysteresis

HYST

(T

TSD-TR

)

Turn-off output voltage
clamp

Output voltage drop

ON

limitation

diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

CC

5V<V

V

CC

I

OUT

<28V 14 A

CC

=13V; TR<Tj<T

=1A; VIN=0;

L=20mH

= 0.03 A;

I

OUT

= -40°C...150°C

T

j

(see Figure 8)

TSD

2.5 A

7°C

-41 VCC-46 VCC-52 V

V

CC

25 mV

10/37 Doc ID 022480 Rev 4

VND5E160ASO-E Electrical specifications

T able 9. Current sense (8 V < VCC<18V)

Symbol Pa rameter Test conditions Min. Typ. Max. Unit

I

K

K

dK

1/K1

K

dK

2/K2

K

dK

3/K3

I

SENSE0

I

OL

I

0

1

OUT/ISENSE

I

OUT/ISENSE

Current sense ratio

(1)

drift

I

2

OUT/ISENSE

Current sense ratio

(1)

drift

I

3

OUT/ISENSE

Current sense ratio

(1)

drift

Analog sense
leakage current

Open-load on-state
current detection
threshold

= 0.025 A; V

OUT

=0V; Tj= -40°C...150°C

V

CSD

I

= 0.35 A; V

OUT

=0V;

V

CSD

= -40°C...150°C

T

j

T

= 25°C...150°C

j

I

= 0.35 A; V

OUT

=0V; Tj= -40°C to 150°C

V

CSD

I

=0.5A; V

OUT

T

= -40°C...150°C

j

= 25°C...150°C

T

j

= 0.5 A; V

I

OUT

V

=0V; Tj= -40°C to 150°C

CSD

I

=1.5A; V

OUT

SENSE

SENSE

SENSE

SENSE

SENSE

Tj= -40°C...150°C
T

= 25°C...150°C

j

I

=1.5A; V

OUT

= -40°C to 150°C

T

j

=0A; V

I

OUT

V

=0V; Tj= -40°C...150°C

IN

=0A; V

I

OUT

=5V; Tj= -40°C...150°C

V

IN

I

=0.6A; V

OUT

=5V; Tj= -40°C...150°C

V

IN

SENSE

SENSE

SENSE

SENSE

VIN=5V; 8V<VCC<18V;

=5µA

I

SENSE

SENSE

=4V; V

=4 V;

=4V; V

=4V; V

=0V; V

=0V; V

=0V; V

=0.5V;

=0.5V;

=0.5V;

CSD

CSD

CSD

CSD

CSD

CSD

=0V;

=0V;

=0V;

=5V;

=0V;

=5V;

270 520 730

345

470

610

370

470

540

-13 13 %

370

460

550

390

460

510

-8 8 %

400

430

470

410

430

460

-4 4 %

01µA

02µA

01µA

15mA

V

SENSE

V

SENSEH

I

SENSEH

t

DSENSE1H

t

DSENSE1L

Max analog
senseoutput
voltage

Analog sense

(2)

output voltage in
fault condition

Analog sense

(2)

output current in
fault condition

Delay response
time from falling
edge of CS_DIS
pin

Delay response
time from rising
edge of CS_DIS
pin

I

OUT

V

CC

V

CC

V

SENSE

I

SENSE

= 1.5 A; V

=13V; R

=13V; V

<4V; 0.08A<I

= 90% of I

=0V 5 V

CSD

=3.9KΩ 8V

SENSE

=5V 9 mA

SENSE

<1.5A;

OUT

SENSE max

40 100 µs

(see Figure 4)

V

SENSE

I

SENSE

<4V; 0.08A<I

= 10% of I

SENSE max

OUT

<1.5A;

520µs

(see Figure 4)

Doc ID 022480 Rev 4 11/37

Electrical specifications VND5E160ASO-E

T able 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Pa rameter Test conditions Min. Typ. Max. Unit

t

DSENSE2H

Delay response
time from rising
edge of INPUT pin

V
I

(see Figure 4)

SENSE

SENSE

= 90% of I

<4V; 0.08A<I

SENSE max

OUT

<1.5A;

30 150 µs

Delay response

SENSE

SENSE

= 90% of I

OUT

OUTMAX

<4V;

= 90% of I

SENSEMAX

OUTMAX

;

= 1.5 A (see Figure 7)

;

110 µs

Δt

DSENSE2H

time between rising
edge of output
current and rising
edge of current

V
I
I
I

sense

SENSE

SENSE

= 10% of I

<4V; 0.08A<I

SENSE max

Delay response

t

DSENSE2L

time from falling
edge of INPUT pin

1. Parameter guaranteed by design; it is not tested.

2. Fault condition includes: power limitation, overtemperature and open-load off-state detection.

Table 10. Open-load detection (8 V < VCC<18V)

V
I

(see Figure 4)

OUT

<1.5A;

80 250 µs

Symbol Parameter Test conditions Min. Typ. Max. Unit

Open-load off-state

V

OL

voltage detection

V

=0V 2

IN

threshold

See

Figure 5

4V

Output short circuit to

t

DSTKON

V

detection delay at

CC

See Figure 5 180 1200 µs

turn Off

I

L(off2)r

I

L(off2)f

Off-state output current
at V

OUT

=4V

Off-state output current

OUT

=2V

at V

=0V; V

V
V

IN

OUT

SENSE

rising from 0 V to 4 V

VIN=0V;
V

SENSE=VSENSEH

falling from VCC to 2 V

Delay response from

=4 V; VIN=0V;

td_vol

output rising edge to

SENSE

rising edge in

V

V

OUT

V

SENSE

= 90% of V

open-load

Figure 4. Current sense delay characteristics

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

t

DSENSE2H

t

DSENSE1L

=0V;

; V

OUT

SENSEH

-120 0 µA

-50 90 µA

t

DSENSE1H

t

DSENSE2L

20 µs

12/37 Doc ID 022480 Rev 4