ST VND5E160AJ-E User Manual
Double channel high side driver with analog current sense
Features
Max transient supply voltage V
Operating voltage range V
Max On-state resistance (per ch.) R
Current limitation (typ.) I
Off state supply current I
1. Typical value with all loads connected.
■ General
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Very low current sense leakage
■ Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off state openload detection
– Output short to V
detection
CC
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
■ Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Over-temperature shutdown with
autorestart (thermal shutdown)
CC
CC
ON
LIMH
S
4.5 to 28V
41 V
160 mΩ
10 A
(1)
2 µA
VND5E160AJ-E
for automotive applications
PowerSSO-12
– Reverse battery protected (see Application
schematic)
– Electrostatic discharge protection
Application
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VND5E160AJ-E is a single channel high-side
driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-12 package. The VND5E160AJ-E is
designed to drive 12V automotive grounded loads
delivering protection, diagnostics and easy 3V
and 5V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with
auto-restart and over-voltage active clamp. A
dedicated analog current sense pin is associated
with every output channel in order to provide
Ehnanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication, overtemperature indication, short-circuit to Vcc
diagnosis and ON & OFF state open load
detection. The current sensing and diagnostic
feedback of the whole device can be disabled by
pulling the CS_DIS pin high to allow sharing of
the external sense resistor with other similar
devices.
March 2008 Rev 2 1/37
www.st.com
37
Contents VND5E160AJ-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 24
3.1.2 Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 25
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to VCC and OFF state open load detection . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
VND5E160AJ-E List of tables
List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Openload detection (8V<V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 14. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 15. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
3/37
List of figures VND5E160AJ-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Openload Off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Iout/ Isense vs. Iout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. OFF-State Open Load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to V
Figure 16. T
evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
J
Figure 17. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. On state resistance vs. T
Figure 24. On state resistance vs. V
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. I
LIMH
vs. T
Figure 28. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Maximum turn-Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28
Figure 35. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 29
Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse (one channel ON). . . . . 30
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 30
Figure 39. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 41. PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
case
4/37
VND5E160AJ-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
CC
Signal Clamp
IN 1
IN 2
CS_
DIS
CS1
CS2
Undervoltage
C ontrol & Diagnostic 1
DRIVER
Over
temp .
V
SENSEH
LOGIC
Table 1. Pin function
Name Function
V
CC
Battery connection.
L imi tation
Current
Li mitati on
OFF State
Open load
Current
Sense
OVER LOAD PR OTEC TION
(A C TIVE PO WE R L IMIT A TIO N)
Power
Clamp
V
ON
CH 1
GND
C hannels 2
CH 2
CONTROL & DIAGNOSTIC
OUT2
OUT1
OUTPUT
n
GND
INPUT
n
CURRENT SENSE
Power output.
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
Analog current sense pin, delivers a current proportional to the load current.
n
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
5/37
Block diagram and pin description VND5E160AJ-E
Figure 2. Configuration diagram (top view)
GND
INPUT2
INPUT1
CURRENT SENSE1
CURRENT SENSE2
CS_DIS
TAB = V
1
2
3
4
5
6
12
11
10
9
8
7
N.C.
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
N.C.
cc
PowerSSO-12
Table 2. Suggested connections for unused and not connected pins
Connection / pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground
Through 1kΩ
resistor
X
Through 22kΩ
resistor
Through 10kΩ
resistor
Through 10kΩ
resistor
6/37
VND5E160AJ-E Electrical specifications
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
V
CSD
CC
V
V
SENSE1
Fn
V
OUT1
I
I
CSD
I
IN1
V
IN1
I
IN2
V
IN2
CS_DIS
INPUT1
INPUT2
GND
OUTPUT1
CURRENT
SENSE1
OUTPUT2
CURRENT
SENSE2
I
GND
OUT1
I
SENSE1
I
OUT2
I
SENSE2
V
SENSE2
V
OUT2
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
-V
- I
I
- I
I
-I
CSENSE
V
CSENSE
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
OUT
Reverse DC output current 6 A
OUT
I
DC input current -1 to 10 mA
IN
DC current sense disable input current -1 to 10 mA
CSD
DC reverse CS pin current 200 mA
Current sense maximum voltage
VCC-41
+V
CC
V
V
7/37
Electrical specifications VND5E160AJ-E
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
E
Maximum switching energy (single pulse)
MAX
(L=12mH; R
Electrostatic discharge (Human Body Model: R=1.5KΩ;
C=100pF)
- INPUT
V
- CURRENT SENSE
ESD
- CS_DIS
- OUTPUT
- V
CC
V
T
Charge device model (CDM-AEC-Q100-011) 750 V
ESD
Junction operating temperature -40 to 150 °C
T
j
Storage temperature -55 to 150 °C
stg
2.2 Thermal data
Table 4. Thermal data
Symbol Parameter Max. value Unit
Thermal resistance junction-case (With one channel ON) 8 °C/W
Thermal resistance junction-ambient See Figure 36 °C/W
R
thj-case
R
thj-amb
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(Typ.) )
34 mJ
4000
2000
4000
5000
5000
V
V
V
V
V
8/37
VND5E160AJ-E Electrical specifications
2.3 Electrical characteristics
Values specified in this section are for 8V<VCC<28V; -40°C<Tj<150°C, unless otherwise
stated.
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
I
L(off1)
1. For each channel.
2. PowerMOS leakage included.
Operating supply voltage 4.5 13 28 V
CC
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shutdown
hysteresis
I
= 1A; Tj= 25°C
OUT
On state resistance
ON
Clamp voltage IS= 20 mA 41 46 52 V
clamp
I
Supply current
S
Off state output
current
Output - VCC diode
V
F
voltage
(1)
(1)
(1)
= 1A; Tj= 150°C
I
OUT
I
= 1A; VCC= 5V; Tj= 25°C
OUT
Off State; V
VIN=V
OUT=VSENSE=VCSD
On State; V
VIN=V
OUT
V
IN=VOUT
-I
= 0.6A; Tj=150°C 0.7 V
OUT
= 13V; Tj= 25°C;
CC
=0V
=13V; VIN=5V; I
CC
OUT
=0V; VCC=13V; Tj=25°C
=0V; VCC=13V; Tj=125°C
=0A
000.01 3
0.5 V
160
320
210
(2)
(2)
5
2
3
6µAmA
5
Table 6. Switching (VCC=13V, Tj=25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
mΩ
mΩ
mΩ
µA
(dV
(dV
t
d(on)
t
d(off)
OUT
OUT
W
W
ON
OFF
Turn- On delay time RL= 13Ω (see Figure 6.)10 µs
Turn- Off delay time RL= 13Ω (see Figure 6.)15 µs
Turn- On voltage
/dt)
on
slope
Turn- Off voltage
/dt)
off
slope
Switching energy
losses during twon
Switching energy
losses during t
woff
= 13Ω
R
L
R
= 13Ω
L
RL= 13Ω (see Figure 6.)0.03 mJ
RL= 13Ω (see Figure 6.)0.02 mJ
See
Figure 26.
See
Figure 28.
V/µs
V/µs
9/37
Electrical specifications VND5E160AJ-E
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
V
I(hyst)
V
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL
Table 8. Protections and diagnostics
Input low level voltage 0.9 V
IL
Low level input current VIN= 0.9V 1 µA
IL
Input high level voltage 2.1 V
IH
High level input current VIN= 2.1V 10 µA
IH
Input hysteresis voltage 0.25 V
Input clamp voltage
ICL
I
IN
= -1mA
I
IN
= 1mA
5.5
-0.7
CS_DIS low level voltage 0.9 V
Low level CS_DIS current V
= 0.9V 1 µA
CSD
CS_DIS high level voltage 2.1 V
High level CS_DIS current V
= 2.1V 10 µA
CSD
CS_DIS hysteresis voltage 0.25 V
CS_DIS clamp voltage
(1)
I
CSD
I
CSD
= 1mA
= -1mA
5.5
-0.7
7V
7V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
DC short circuit current
VCC= 13V
5V<VCC<28V
7101414A
V
V
A
= 13V;
I
T
T
T
V
DEMAG
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
Short circuit current
limL
during thermal cycling
Shutdown temperature 150 175 200 °C
TSD
Reset temperature TRS + 1 TRS + 5 °C
T
R
Thermal reset of STATUS 135 °C
RS
Thermal hysteresis
HYST
(T
Turn-Off output voltage
clamp
TSD-TR
)
I
OUT
Output voltage drop
ON
limitation
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
V
CC
TR<Tj<T
TSD
2.5 A
7°C
= 1A; VIN= 0; L= 20mH VCC-41 VCC-46 VCC-52 V
I
= 0.03A;
OUT
= -40°C...150°C
T
j
25 mV
(see Figure 8.)
10/37
VND5E160AJ-E Electrical specifications
Table 9. Current sense (8V<VCC<18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
K
K
dK
1/K1
K
dK
2/K2
K
dK
3/K3
I
SENSE0
I
OL
I
0
1
OUT/ISENSE
I
OUT/ISENSE
Current sense ratio
(1)
drift
I
2
OUT/ISENSE
Current sense ratio
(1)
drift
I
3
OUT/ISENSE
Current sense ratio
(1)
drift
Analog sense
leakage current
Openload ON state
current detection
threshold
= 0.025A; V
OUT
Tj= -40°C...150°C 270 520 730
I
= 0.35A; V
OUT
Tj= -40°C...150°C
=0.35A; V
I
OUT
= 25°C...150°C
T
j
= 0.35A; V
I
OUT
=0V;
V
CSD
SENSE
TJ= -40 °C to 150 °C
I
= 0.5A; V
OUT
SENSE
Tj= -40°C...150°C
= 0.5A; V
I
OUT
= 25°C...150°C
T
j
= 0.5 A; V
I
OUT
= 0V;
V
CSD
= -40 °C to 150 °C
T
J
I
= 1.5A; V
OUT
= -40°C...150°C
T
j
I
=1.5A; V
OUT
= 25°C...150°C
T
j
= 1.5 A; V
I
OUT
=0V;
V
CSD
= -40 °C to 150 °C
T
J
I
=0A; V
OUT
=5V; VIN=0V; Tj=-40°C...150°C
V
CSD
V
=0V; VIN=5V; Tj=-40°C...150°C
CSD
I
=0.6A; V
OUT
V
=5V; VIN=5V; Tj= -40°C...150°C
CSD
V
= 5V, 8V<VCC<18V
IN
I
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
= 5 µA
SENSE
SENSE
SENSE
=0V;
= 0.5V; V
=0.5V; V
=0.5V; V
= 0.5V;
= 4V; V
= 4V; V
= 4 V;
=4V; V
=4V; V
= 4 V;
=0V;
CSD
CSD
CSD
CSD
CSD
CSD
=0V;
=0V;
CSD
=0V;
=0V;
= 0V;
= 0V;
=0V;
345
370
-13 13 %
370
390
-8 8 %
400
410
-4 4 %
0
0
0
15mA
470
470
460
460
430
430
610
540
550
510
470
460
1
2
1
µA
µA
µA
V
SENSE
V
SENSEH
I
SENSEH
Max analog
senseoutput
voltage
Analog sense
(2)
output voltage in
fault condition
Analog sense
(2)
output current in
fault condition
I
=1.5A; V
OUT
VCC=13V; R
VCC=13V; V
=0V; 5 V
CSD
= 3.9KΩ; 8V
SENSE
= 5V; 9 mA
SENSE
11/37
Electrical specifications VND5E160AJ-E
Table 9. Current sense (8V<VCC<18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
DSENSE1H
t
DSENSE1L
t
DSENSE2H
Delay response
time from falling
edge of CS_DIS
pin
Delay response
time from rising
edge of CS_DIS
pin
Delay response
time from rising
edge of INPUT pin
<4V, 0.08A<Iout<1.5A
V
SENSE
I
=90% of I
SENSE
(see Figure 4.)
<4V, 0.08A<Iout<1.5A
V
SENSE
=10% of I
I
SENSE
(see Figure 4.)
<4V, 0.08A<Iout<1.5A
V
SENSE
I
=90% of I
SENSE
(see Figure 4.)
SENSE max
SENSE max
SENSE max
40 100 µs
520µs
30 150 µs
Delay response
time between rising
∆t
DSENSE2H
edge of output
current and rising
edge of current
sense
Delay response
t
DSENSE2L
time from falling
edge of INPUT pin
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load OFF state detection.
Table 10. Openload detection (8V<VCC<18V)
V
I
SENSE
I
OUT
I
OUTMAX
V
I
SENSE
(see Figure 4.)
<4V,
SENSE
=90% of I
= 90% of I
OUTMAX
= 1.5A (see Figure 7)
<4V, 0.08A<Iout<1.5A
SENSE
=10% of I
SENSEMAX,
SENSE max
80 250 µs
110 µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
Openload Off state
V
OL
voltage detection
VIN = 0 V 2
threshold
See
Figure 5
4V
Output short circuit to
t
DSTKON
VCC detection delay at
See Figure 5 180 1200 µs
turn Off
I
L(off2)r
I
L(off2)f
Off state output current
at V
OUT
= 4V
Off state output current
at V
OUT
= 2V
=0V; V
V
IN
rising from 0V to 4V
V
OUT
=0V; V
V
IN
V
falling from VCC to 2V
OUT
=0V
SENSE
SENSE=VSENSEH
-120 0 µA
-50 90 µA
Delay response from
= 4 V; VIN= 0V
V
OUT
V
SENSE
= 90% of V
SENSEH
20 µs
td_vol
output rising edge to
SENSE
rising edge in
V
open-load
12/37
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