ST VND5E050ASO-E User Manual

Features

("1($'5

VND5E050ASO-E

Double channel high-side driver with analog current sense

for automotive applications

Datasheet − production data

Max transient supply voltage V

Operating voltage range VCC4.5 to 28 V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off-state supply current I

1. Typical value with all loads connected.

■ General

CC

ON

LIMH

S

41 V

50 mΩ

27 A

(1)

2 µA

– Inrush current active management by

power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliant with European directive

2002/95/EC
– Very low current sense leakage
– AEC-Q100 qualified

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off-state open load detection
– Output short to V

detection

CC

– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

SO-16L

– Overtemperature shutdown with auto

restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection

Applications

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VND5E050ASO-E is a double channel high­side driver manufactured using ST proprietary
VIPower
SO-16L package. The device is designed to drive
12 V automotive grounded loads, and to provide
protection and diagnostics. It also implements a
3 V and 5 V CMOS-compatible interface for the
use with any microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with
auto-restart and overvoltage active clamp. A
dedicated analog current sense pin is associated
with every output channel providing enhanced
diagnostic functions including fast detection of
overload and short-circuit to ground through
power limitation indication, overtemperature
indication, short-circuit to V
state and off-state open-load detection. The
current sensing and diagnostic feedback of the
whole device can be disabled by pulling the
CS_DIS pin high to share the external sense
resistor with similar devices.

®

M0-5 technology and housed in

diagnosis and on-

CC

June 2012 Doc ID 022473 Rev 4 1/37

This is information on a product in full production.

www.st.com

1

Contents VND5E050ASO-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 26

3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37 Doc ID 022473 Rev 4

VND5E050ASO-E List of tables

List of tables

Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Switching (VCC = 13 V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8 V < V
Table 10. Open load detection (8 V < V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 15. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 16. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

CC

< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 022473 Rev 4 3/37

List of figures VND5E050ASO-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of output current and rising edge of current sense

(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. I

OUT/ISENSE

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

J

Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 24. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28

Figure 35. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29

Figure 37. SO-16L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 38. Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 39. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

vs I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

OUT

4/37 Doc ID 022473 Rev 4

VND5E050ASO-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

Signal Clamp

IN1

IN2

CS_
DIS

CS1

CS2

Undervoltage

Control & Diagnostic 1

DRIVER

Over

temp.

V

SENSEH

LOGIC

Table 1. Pin function

Name Function

V

CC

OUTPUT

GND

1,2

Battery connection.

Power output .

Ground connection. Must be reverse battery protected by an external
diode/resistor network.

Limitation

Current

Limitation

OFF State
Open load

Current

Sense

OVERLOAD PROTECTION

(ACTIVE POWER LIMITATION)

Power
Clamp

V

ON

CH 1

GND

Channels 2

CH 2

CONTROL & DIAGNOSTIC

OUT2

OUT1

INPUT

1,2

CURRENT SENSE

Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.

Analog current sense pin, delivers a current proportional to the load current.

1,2

CS_DIS Active high CMOS compatible pin, to disable the current sense pin.

Doc ID 022473 Rev 4 5/37

Block diagram and pin description VND5E050ASO-E

Figure 2. Configuration diagram (top view)



*1'

,1387

,1387

&6(16(

&6(16(

&6',6



Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1 KΩ

resistor

X

 9FF9FF



Through

22 KΩ resistor

287387

287387

287387

287387

287387

287387

9FF9FF

("1($'5

Through 10 KΩ

resistor

Through 10 KΩ

resistor

6/37 Doc ID 022473 Rev 4

VND5E050ASO-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

V

CSD

CC

V

V

SENSE1

Fn

V

OUT1

I

I

CSD

I

IN1

V

IN1

I

IN2

V

IN2

CS_DIS

INPUT1

INPUT2

GND

OUTPUT1

CURRENT
SENSE1

OUTPUT2

CURRENT
SENSE2

I

GND

OUT1

I

SENSE1

I

OUT2

I

SENSE2

V

SENSE2

V

OUT2

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Table 3: Absolute maximum ratings may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the Operating sections of

this specification is not implied. Exposure to the conditions in table below for extended

periods may affect device reliability.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

-I

I

-I

I

CC

GND

OUT

OUT

I

IN

CSD

DC supply voltage 41 V

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

DC output current Internally limited A

Reverse DC output current 20 A

DC input current -1 to 10 mA

DC current sense disable input current -1 to 10 mA

-I

CSENSE

V

CSENSE

DC reverse CS pin current 200 mA

- 41 to

V

Current sense maximum voltage

CC

+V

CC

V

Doc ID 022473 Rev 4 7/37

Electrical specifications VND5E050ASO-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Maximum switching energy (single pulse)

E

V

V

MAX

ESD

ESD

(L = 3 mH; R
I

OUT=IlimL

=0Ω; V

L

(Typ.))

=13.5V; T

bat

jstart

=150°C;

Electrostatic discharge
(human body model: R = 1.5 KΩ; C=100pF)
– Input
– Current sense
–CS_DIS
–Output
–V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

104 mJ

4000
2000
4000
5000
5000

V
V
V
V
V

T

T

stg

Junction operating temperature -40 to 150 °C

j

Storage temperature -55 to 150 °C

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Typical value Unit

R

th j-pcb

R

thj-amb

1. The measure is done in accordance with the JESD 51-8.

Thermal resistance junction-pcb (with one channel

(1)

ON)

Thermal resistance junction-ambient See Figure 36 °C/W

2.3 Electrical characteristics

Values specified in this section are for 8 V<VCC<28V; -40°C<Tj<150 °C, unless otherwise

stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

20 °C/W

V

V

V

USDhyst

R

V

clamp

Operating supply voltage 4.5 13 28 V

CC

Undervoltage shutdown 3.5 4.5 V

USD

Undervoltage shutdown
hysteresis

I

=2A; Tj=25°C 50

OUT

On-state resistance

ON

(1)

=2A; Tj= 150°C 100

OUT

I

=2A; VCC=5V; Tj= 25°C 65

OUT

Clamp voltage IS=20mA 41 46 52 V

8/37 Doc ID 022473 Rev 4

0.5 V

mΩI

VND5E050ASO-E Electrical specifications

Table 5. Power section (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Off-state; V
V

I

S

Supply current

IN=VOUT=VSENSE=VCSD

On-state; V
I

=0A

OUT

VIN=V

=25°C

T

I

L(off1)

1. For each channel.

2. PowerMOS leakage included.

Table 6. Switching (VCC=13V; Tj= 25°C)

Off-state output current

(1)

Output - VCC diode

V

F

voltage

(1)

j

VIN=V

=125°C

T

j

-I

=4A; Tj= 150°C 0.7 V

OUT

=13V; Tj= 25°C;

CC

=13V; VIN=5V;

CC

=0V; VCC=13V;

OUT

=0V; VCC=13V;

OUT

=0V

(2)5(2)

2

36mA

00.013

05

Symbol Parameter Test conditions Min. Typ. Max. Unit

Turn-on delay time RL=6.5Ω (see Figure 6)— 20 — µs

Turn-off delay time RL=6.5Ω (see Figure 6)— 45 — µs

/dt

Turn-on voltage slope RL=6.5Ω —

(on)

/dt

Turn-off voltage slope RL=6.5Ω —

(off)

Switching energy
losses during t

won

Switching energy
losses during t

woff

RL=6.5Ω (see Figure 6)— 0.15 — mJ

RL=6.5Ω (see Figure 6)— 0.3 — mJ

See

Figure 26

See

Figure 28

—V/µs

—V/µs

dV

dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

µA

µA

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

I(hyst)

V

V

CSDL

I

CSDL

V

CSDH

I

I

IH

ICL

Input low level voltage 0.9 V

IL

Low level input current VIN=0.9V 1 µA

IL

Input high level voltage 2.1 V

IH

High level input current VIN=2.1V 10 µA

Input hysteresis voltage 0.25 V

I

=1mA 5.5 7

Input clamp voltage

IN

IIN=-1mA -0.7

CS_DIS low level voltage 0.9 V

Low level CS_DIS current V

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

Doc ID 022473 Rev 4 9/37

V

Electrical specifications VND5E050ASO-E

Table 7. Logic inputs (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

CSDH

V

CSD(hyst)

V

CSCL

Table 8. Protections and diagnostics

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25 V

I

=1mA 5.5 7

CS_DIS clamp voltage

CSD

I

=-1mA -0.7

CSD

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

= 13 V 19 27 38 A

I

limH

I

limL

T

TSD

T

T

T

HYST

V

DEMAG

RS

DC short circuit current

Short circuit current
during thermal cycling

Shutdown temperature 150 175 200 °C

Reset temperature TRS+1 TRS+5 °C

R

Thermal reset of status 135 °C

Thermal hysteresis

TSD -TR

)

(T

Turn-off output voltage
clamp

CC

5V < V

<28V 38 A

CC

VCC=13V;
T

R<Tj<TTSD

I

=2A; VIN=0;

OUT

L=6mH

7A

7°C

-41 VCC-46 VCC-52 V

V

CC

V

I

=0.1A;

V

ON

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

T able 9. Current sense (8 V < VCC<18V)

Output voltage drop
limitation

OUT

T

= -40°C...+150°C

j

(see Figure 8)

25 mV

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

dK

K

0

K

1

1/K1

K

2

I

OUT/ISENSE

I

OUT/ISENSE

Current sense ratio

(1)

drift

I

OUT/ISENSE

= 0.05 A; V

OUT

=0V; Tj= -40°C...150°C

V

CSD

I

=1A; V

OUT

V

CSD

= -40°C...150°C

T

j

SENSE

=0V;

Tj= 25°C...150°C

I

=1A; V

OUT

V

CSD

SENSE

=0V;

TJ= -40 °C to 150 °C

I

=2A; V

OUT

V

CSD

T

= -40°C...150°C

j

= 25°C...150°C

T

j

SENSE

=0V;

SENSE

=4V;

=4V;

=4V;

=0.5V;

1440 2250 3630

1740

2070

2820

1750

2070

2562

-15 15 %

1900

2000

2395

1899

2000

2282

10/37 Doc ID 022473 Rev 4

VND5E050ASO-E Electrical specifications

T able 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

dK

2/K2

K

dK

3/K3

I

SENSE0

I

OL

Current sense ratio

(1)

drift

I

3

OUT/ISENSE

Current sense ratio

(1)

drift

Analog sense leakage
current

Open load on-state
current detection
threshold

=2 A; V

OUT

=0V;

V

CSD

TJ= -40 °C to 150 °C

I

=4A;

OUT

V
T
T

I
V

=4V;V

SENSE

= -40°C...150°C

j

= 25°C...150°C

j

=4 A; V

OUT

=0V;

CSD

TJ= -40 °C to 150 °C

I

=0A; V

OUT

V

=5V; VIN=0V;

CSD

= -40°C...150°C

T

j

I

=0A; V

OUT

=0V; VIN=5V;

V

CSD

T

= -40°C...150°C

j

=2A; V

I

OUT

=5V; VIN=5V;

V

CSD

T

= -40°C...150°C

j

V

=5V; 8V<VCC<18V;

IN

I

=5µA

SENSE

SENSE

CSD

SENSE

SENSE

SENSE

SENSE

=4 V;

=0V;

=4 V;

=0V;

=0V;

=0V;

-9 9 %

1969

1990

2210

1950

1990

2153

-6 6 %

01

02

µA

01

420mA

V

SENSE

V

SENSEH

I

SENSEH

t

DSENSE1H

t

DSENSE1L

t

DSENSE2H

Max analog sense
output voltage

Analog sense output
voltage in fault
condition

(2)

Analog sense output
current in fault
condition

(2)

Delay response time
from falling edge of
CS_DIS pin

Delay response time
from rising edge of
CS_DIS pin

Delay response time
from rising edge of
INPUT pin

=4A; V

I

OUT

VCC=13V; R

VCC=13V; V

SENSE

SENSE

<4V; 0.5A<I

= 90% of I

V
I

(see Figure 4)

SENSE

SENSE

<4V; 0.5A<I

= 10% of I

V
I

(see Figure 4)

V
I

SENSE

SENSE

<4V; 0.5A<I

= 90% of I

(see Figure 4)

=0V 5 V

CSD

=3.9KΩ 8V

SENSE

=5V 9 mA

SENSE

<4A;

OUT

SENSEMAX

OUT

SENSEMAX

OUT

SENSEMAX

<4A;

<4A;

40 100 µs

520µs

80 250 µs

Doc ID 022473 Rev 4 11/37

Electrical specifications VND5E050ASO-E

T able 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Delay response time
between rising edge of

Δt

DSENSE2H

output current and
rising edge of current
sense

Delay response time

t

DSENSE2L

from falling edge of
INPUT pin

1. Parameter guaranteed by design; it is not tested.

2. Fault condition includes: power limitation, overtemperature and open-load off-state detection.

Table 10. Open load detection (8 V < VCC<18V)

V
I

I
I

V
I

(see Figure 4)

SENSE

SENSE

= 90% of I

OUT

OUTMAX

SENSE

SENSE

= 90% of I

=10% of I

<4V;

SENSEMAX,

OUTMAX

=2A (see Figure 7)

<4V; 0.5A<I

OUT

SENSEMAX

40 µs

<4A;

80 250 µs

Symbol Parameter Test conditions Min. Typ. Max. Unit

Open load off-state

V

OL

voltage detection

=0V 2

V

IN

threshold

See

Figure 5

4V

Output short circuit to

t

DSTKON

detection delay at

V

CC

See Figure 5 180 1200 µs

turn-off

I

L(off2)r

I

L(off2)f

Off-state output current

OUT

=4V

at V

Off-state output current
at V

OUT

=2V

V

=0V; V

V

V
V

IN

OUT

IN

OUT

SENSE

rising from 0 V to 4 V

=0V; V

SENSE=VSENSEH

falling from VCC to 2 V

=0V;

-120 0 µA

;

-50 90 µA

Delay response from

td_vol

output rising edge to
V

SENSE

rising edge in

=4 V; VIN=0V;

V

OUT

V

SENSE

= 90% of V

SENSEH

20 µs

open load

Figure 4. Current sense delay characteristics

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

t

DSENSE2H

12/37 Doc ID 022473 Rev 4

t

DSENSE1L

t

DSENSE1H

t

DSENSE2L