ST VND5E050AJ-E, VND5E050AK-E User Manual
Double channel high side driver with analog current sense
Features
Max transient supply voltage V
Operating voltage range V
Max On-state resistance (per ch.) R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected.
■ General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Very low current sense leakage
■ Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off-state open load detection
– Output short to V
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
■ Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Over temperature shutdown with auto
restart (thermal shutdown)
detection
CC
CC
CC
ON
LIMH
S
41 V
4.5 to 28 V
50 mΩ
27 A
(1)
2 µA
VND5E050AJ-E
VND5E050AK-E
for automotive applications
PowerSSO-12
– Reverse battery protected (see Figure 32)
– Electrostatic discharge protection
Applications
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VND5E050AJ-E and VND5E050AK-E are
double channel high-side drivers manufactured in
the ST proprietary VIPower M0-5 technology and
housed in the tiny PowerSSO-12 and PowerSSO24 packages. The VND5E050AJ-E and
VND5E050AK-E are designed to drive 12V
automotive grounded loads delivering protection,
diagnostics and easy 3V and 5V CMOS
compatible interface with any microcontroller.
The devices integrate advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with
auto-restart and over-voltage active clamp. A
dedicated analog current sense pin is associated
with every output channel in order to provide
Enhanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication, overtemperature indication, short-circuit to Vcc
diagnosis and on & off state open load detection.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.
PowerSSO-24
July 2009 Doc ID 14617 Rev 4 1/44
www.st.com
1
Contents VND5E050AJ-E / VND5E050AK-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 25
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 25
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 26
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to VCC and off-state open load detection . . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 29
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.2 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.2 PowerSSO-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.3 PowerSSO-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
5.4 PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.5 PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E List of tables
List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Current sense (8V<V
Table 10. Open load detection (8V<V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 17. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 18. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 19. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 20. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
CC
Doc ID 14617 Rev 4 3/44
List of figures VND5E050AJ-E / VND5E050AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Open load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. I
OUT/ISENSE
Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 14. Off-state open load with external circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 15. Short to V
Figure 16. T
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
J
Figure 17. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 24. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 27. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 29
Figure 35. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 30
Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse (one channel ON). . . . . 31
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-12
Figure 39. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 33
Figure 41. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 34
Figure 42. Thermal fitting model of a double channel HSD in PowerSSO-24
Figure 43. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 44. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 45. PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 46. PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 47. PowerSS0-24
vs I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
OUT
. . . . . . . . . . . . . . . . . . . 31
. . . . . . . . . . . . . . . . . . . 34
tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E List of figures
Figure 48. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Doc ID 14617 Rev 4 5/44
Block diagram and pin description VND5E050AJ-E / VND5E050AK-E
1 Block diagram and pin description
Figure 1. Block diagram
V
CC
Signal Clamp
Undervoltage
IN1
IN2
CS_
DIS
CS1
CS2
LOGIC
Table 1. Pin function
Control & Diagnostic 1
DRIVER
Over
temp.
V
SENSEH
OVERLOAD PROTE CTION
(ACTIVE POWER LIMITATION)
Current
Limitation
Current
Sense
Power
Clamp
V
ON
Limitation
OFF State
Open load
Name Function
V
CC
OUTPUT
GND
Battery connection.
Power output.
1,2
Ground connection. Must be reverse battery protected by an external diode/resistor
network.
CH 1
GND
Channels 2
CH 2
CONTROL & DIAGNOSTIC
OUT2
OUT1
INPUT
CURRENT
SENSE
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
1,2
switch state.
Analog current sense pin, delivers a current proportional to the load current.
1,2
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
6/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Block diagram and pin description
Figure 2. Configuration diagram (top view)
TAB = V
GND
INPUT2
CURRENT SENSE1
INPUT1
CURRENT SENSE2
CS_DIS
cc
12
1
2
3
4
5
6
11
10
V
cc
OUTPUT2
OUTPUT2
9
OUTPUT1
8
OUTPUT1
7
V
cc
CURRENT SENSE1
CURRENT SENSE2
V
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
N.C.
CS_DIS.
V
CC
CC
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
TAB = V
CC
PowerSSO-12
Table 2. Suggested connections for unused and not connected pins
PowerSSO-24
Connection / pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground
Through 1 KΩ
resistor
X
Through 22 KΩ
resistor
Through 10 KΩ
resistor
Through 10 KΩ
resistor
Doc ID 14617 Rev 4 7/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
CC
V
V
SENSE1
Fn
V
OUT1
I
I
CSD
V
CSD
I
IN1
V
IN1
I
IN2
V
IN2
CS_DIS
INPUT1
INPUT2
GND
OUTPUT1
CURRENT
SENSE1
OUTPUT2
CURRENT
SENSE2
I
GND
OUT1
I
SENSE1
I
OUT2
I
SENSE2
V
SENSE2
V
OUT2
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
-V
-I
I
-I
GND
OUT
OUT
I
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
DC output current Internally limited A
Reverse DC output current 20 A
DC input current -1 to 10 mA
IN
I
CSD
-I
CSENSE
V
CSENSE
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
Current sense maximum voltage
8/44 Doc ID 14617 Rev 4
V
- 41 to
CC
+V
CC
V
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
E
MAX
Maximum switching energy (single pulse)
(L= 3mH; R
Electrostatic discharge
(human body model: R=1.5KΩ; C=100pF)
– Input
V
ESD
– Current sense
–CS_DIS
–Output
–V
CC
V
ESD
T
T
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature - 40 to 150 °C
j
Storage temperature - 55 to 150 °C
stg
2.2 Thermal data
Table 4. Thermal data
Symbol Parameter
R
thj-case
R
thj-amb
Thermal resistance junction-case
(with one channel ON)
Thermal resistance junction-ambient See Figure 36 See Figure 40 °C/W
=0Ω; V
L
=13.5V; T
bat
jstart
=150°C; I
OUT
= I
limL
(Typ.))
104 mJ
4000
2000
4000
5000
5000
Max value
PowerSSO-12 PowerSSO-24
2.7 2.7 °C/W
V
V
V
V
V
Unit
2.3 Electrical characteristics
Values specified in this section are for 8 V<VCC<28V; -40°C<Tj<150 °C, unless otherwise
stated.
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
USD
V
USDhyst
R
V
clamp
Operating supply voltage 4.5 13 28 V
CC
Undervoltage shutdown 3.5 4.5 V
Undervoltage shutdown
hysteresis
On-state resistance
ON
Clamp voltage IS= 20mA 41 46 52 V
0.5 V
I
= 2A; Tj= 25°C 50
OUT
(1)
= 2A; Tj= 150°C 100
OUT
= 2A; VCC= 5V; Tj= 25°C 65
I
OUT
mΩI
Doc ID 14617 Rev 4 9/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E
Table 5. Power section (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
L(off1)
V
Supply current
S
Off-state output current
Output - VCC diode voltage
F
Off-state; VCC= 13V; Tj= 25°C;
V
IN=VOUT=VSENSE=VCSD
= 13V; VIN= 5V;
CC
= 0V; VCC= 13V;
= 0V; VCC= 13V;
(1)
On-state; V
=0A
I
OUT
VIN=V
OUT
Tj=25°C
V
IN=VOUT
Tj=125°C
(1)
-I
= 4A; Tj= 150°C 0.7 V
OUT
=0V
(2)5(2)
2
36mA
00.013
05
1. For each channel.
2. PowerMOS leakage included.
Table 6. Switching (VCC=13V; Tj= 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Turn-on delay time RL= 6.5Ω (see Figure 6)20 µs
Turn-off delay time RL= 6.5Ω (see Figure 6)45 µs
Turn-on voltage slope RL= 6.5Ω
(on)
Turn-off voltage slope RL= 6.5Ω
(off)
Switching energy
losses during t
won
Switching energy
losses during t
woff
RL= 6.5Ω (see Figure 6)0.15 mJ
RL= 6.5Ω (see Figure 6)0.3 mJ
See
Figure 26
See
Figure 28
dV
dV
t
d(on)
t
d(off)
OUT
OUT
W
W
/dt
/dt
ON
OFF
µA
µA
V/µs
V/µs
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
V
I(hyst)
V
V
CSDL
I
CSDL
Input low level voltage 0.9 V
IL
Low level input current VIN=0.9V 1 µA
IL
Input high level voltage 2.1 V
IH
High level input current VIN=2.1V 10 µA
IH
Input hysteresis voltage 0.25 V
Input clamp voltage
ICL
CS_DIS low level voltage 0.9 V
Low level CS_DIS
current
10/44 Doc ID 14617 Rev 4
I
=1mA 5.5 7
IN
=-1mA -0.7
I
IN
V
=0.9V 1 µA
CSD
V
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Table 7. Logic inputs (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL
Table 8. Protections and diagnostics
CS_DIS high level
voltage
High level CS_DIS
current
CS_DIS hysteresis
voltage
CS_DIS clamp voltage
V
=2.1V 10 µA
CSD
I
=1mA 5.5 7
CSD
=-1mA -0.7
I
CSD
(1)
2.1 V
0.25 V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
I
limL
T
T
T
T
HYST
V
DEMAG
TSD
R
RS
V
=13V
DC short circuit current
Short circuit current
during thermal cycling
V
CC
5V<V
CC
= 13V TR<Tj<T
CC
< 28V
TSD
Shutdown temperature 150 175 200 °C
Reset temperature TRS+1 TRS+5 °C
Thermal reset of status 135 °C
Thermal hysteresis
TSD -TR
)
I
= 2A; VIN=0; L=6mH VCC-41 VCC-46 VCC-52 V
OUT
(T
Turn-off output voltage
clamp
19 27 38
38
7A
7°C
V
A
A
I
= 0.1A;
V
ON
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Table 9. Current sense (8V<VCC<18V)
Output voltage drop
limitation
OUT
Tj= -40°C...+150°C
(see Figure 8)
25 mV
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 0.05A; V
K
K
dK
1/K1
I
0
OUT/ISENSE
I
1
OUT/ISENSE
Current sense ratio
(1)
drift
OUT
Tj= -40°C...150°C 1440 2250 3630
I
= 1A; V
OUT
SENSE
Tj= -40°C...150°C
= 25°C...150°C
T
j
=1A; V
I
OUT
V
CSD
= -40 °C to 150 °C
T
J
SENSE
=0V;
SENSE
=4V;V
= 4V;
=0.5V;V
CSD
CSD
=0V;
=0V;
1740
2070
2820
1750
2070
2562
-15 15 %
Doc ID 14617 Rev 4 11/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E
Table 9. Current sense (8V<VCC<18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
K
2
dK
2/K2
K
3
dK
3/K3
I
SENSE0
I
OL
V
SENSE
V
SENSEH
I
SENSEH
t
DSENSE1H
t
DSENSE1L
I
OUT/ISENSE
Current sense ratio
(1)
drift
I
OUT/ISENSE
Current sense ratio
(1)
drift
Analog sense
leakage current
Open load on-state
current detection
threshold
Max analog sense
output voltage
Analog sense
output voltage in
fault condition
Analog sense
output current in
fault condition
Delay response
time from falling
edge of CS_DIS
pin
Delay response
time from rising
edge of CS_DIS
pin
= 2A; V
OUT
= -40°C...150°C
T
j
= 25°C...150°C
T
j
= 2 A; V
I
OUT
=0V;
V
CSD
TJ= -40 °C to 150 °C
I
= 4A; V
OUT
Tj= -40°C...150°C
= 25°C...150°C
T
j
= 4 A; V
I
OUT
= 0V;
V
CSD
= -40 °C to 150 °C
T
J
I
= 0A; V
OUT
=5V; VIN=0V; Tj= -40°C...150°C
V
CSD
= 0V; VIN=5V; Tj= -40°C...150°C00
V
CSD
= 2A; V
I
OUT
= 5V; VIN= 5V; Tj= -40°C...150°C
V
CSD
VIN = 5V, 8V<VCC<18V
I
SENSE
I
= 4A; V
OUT
VCC= 13V; R
(2)
VCC= 13V; V
(2)
V
SENSE
I
SENSE
(see Figure 4)
V
SENSE
I
SENSE
(see Figure 4)
= 5 µA
<4V, 0.5A<Iout<4A
= 90% of I
<4V, 0.5A<Iout<4A
=10% of I
SENSE
SENSE
= 4V;V
= 4 V;
CSD
= 0V;
1900
1899
2000
2000
2395
2282
-9 9 %
SENSE
SENSE
= 4V;V
= 4 V;
CSD
= 0V;
1969
1950
1990
1990
2210
2153
-6 6 %
=0V;
SENSE
1
2
= 0V;
SENSE
01
420mA
= 0V 5 V
CSD
= 3.9 KΩ 8V
SENSE
= 5V 9 mA
SENSE
SENSEMAX
SENSEMAX
40 100 µs
520µs
µA
Delay response
t
DSENSE2H
time from rising
edge of INPUT pin
V
SENSE
I
SENSE
(see Figure 4)
12/44 Doc ID 14617 Rev 4
<4V, 0.5A<Iout<4A
=90% of I
SENSEMAX
80 250 µs
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Table 9. Current sense (8V<VCC<18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Delay response
V
I
I
I
V
I
(see Figure 4)
Δt
DSENSE2H
t
DSENSE2L
time between rising
edge of output
current and rising
edge of current
sense
Delay response
time from falling
edge of INPUT pin
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, over temperature and open load off-state detection.
Table 10. Open load detection (8V<VCC<18V)
<4V,
SENSE
= 90% of I
SENSE
= 90% of I
OUT
OUTMAX
= 2A (see Figure 7)
<4V, 0.5A<Iout<4A
SENSE
=10% of I
SENSE
SENSEMAX,
OUTMAX
SENSEMAX
40 µs
80 250 µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
Open load off-state
V
OL
voltage detection
VIN = 0 V 2
threshold
See
Figure 5
4V
Output short circuit to
t
DSTKON
VCC detection delay at
See Figure 5 180 1200 µs
turn-off
I
L(off2)r
I
L(off2)f
Off-state output current
at V
OUT
= 4V
Off-state output current
at V
OUT
= 2V
=0V; V
V
IN
rising from 0V to 4V
V
OUT
=0V; V
V
IN
V
falling from VCC to 2V
OUT
=0V
SENSE
SENSE=VSENSEH
-120 0 µA
-50 90 µA
Delay response from
= 4 V; VIN= 0V
td_vol
output rising edge to
SENSE
rising edge in
V
open load
V
OUT
V
SENSE
= 90% of V
SENSEH
20 µs
Figure 4. Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
t
DSENSE2H
Doc ID 14617 Rev 4 13/44
t
DSENSE1L
t
DSENSE1H
t
DSENSE2L
Electrical specifications VND5E050AJ-E / VND5E050AK-E
Figure 5. Open load off-state delay timing
OUTPUT STUCK TO V
V
IN
V
CS
Figure 6. Switching characteristics
V
OUT
dV
OUT
INPUT
/dt
(on)
t
d(on)
t
Won
80%
t
r
10%
t
d(off)
CC
V
t
DSTKON
t
Woff
90%
t
f
OUT
V
SENSEH
> V
dV
OL
OUT
/dt
(off)
t
14/44 Doc ID 14617 Rev 4
t
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