ST VND5E025LK-E User Manual

Features

VND5E025LK-E

Double channel high side driver with analog current sense

for automotive applications

Max transient supply voltage V

Operating voltage range V

Max On-state resistance (per ch.) R

Current limitation (typ) I

Off state supply current I

1. Typical value with all loads connected.

■ General

CC

CC

ON

LIMH

S

4.5 to 28 V

– Inrush current active management by

power limitation
– Very low stand-by current
– 3.0V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

european directive
– Very low current sense leakage

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off state open load detection
– Output short to V

detection

CC

– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

– Over-temperature shutdown with

autorestart (thermal shutdown)

41 V

25 mΩ

42 A

(1)

2 µA

Powe rSSO- 24

– Reverse battery protected (see Figure 32)
– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VND5E025LK-E is a double channel high­side drivers manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-24 package. The VND5E025LK-E is
designed to drive 12V automotive grounded loads
delivering protection, diagnostics and easy 3V
and 5V CMOS compatible interface with any
microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with
auto-restart and over-voltage active clamp. A
dedicated analog current sense pin is associated
with every output channel in order to provide
Ehnanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication, over­temperature indication, short-circuit to Vcc
diagnosis and ON & OFF state open load
detection. The current sensing and diagnostic
feedback of the whole device can be disabled by
pulling the CS_DIS pin high to allow sharing of
the external sense resistor with other similar
devices.

March 2009 Rev 1 1/37

www.st.com

1

Contents VND5E025LK-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 24

3.1.2 Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.1 Short to VCC and off state open load detection . . . . . . . . . . . . . . . . . . 27

3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28

4 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37

VND5E025LK-E List of tables

List of tables

Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 6. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8V < VCC < 18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 10. Openload detection (8V < VCC < 18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 16. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

3/37

List of figures VND5E025LK-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5. Openload off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of ouput current and rising edge of current sense

(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. I

OUT/ISENSE

Figure 10. Maximum current sense ratio drift vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. OFF-state open load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

J

Figure 17. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 24. On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. Turn- on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28

Figure 35. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs PCB copper area in open box free air condition ( one channel ON). . . . . . . . 29

Figure 37. PowerSSO-24 thermal impedance junction to ambient single pulse (one channel ON). . . 30

Figure 38. Thermal fitting model of a double channel hsd in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30

Figure 39. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

vs. I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

OUT

4/37

VND5E025LK-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

Signal Clamp

IN1

IN2

CS_
DIS

CS1

CS2

Undervol tage

Control & Diagnostic 1

DRIVER

Ove r

temp.

V

SENSEH

LOGIC

Table 1. Pin functions

Limitation

Curr ent

Limitation

OFF Stat e
Open l oad

Curr ent

Sense

OVERLOAD PROTECTION

(ACTI VE POWER LIMITATION)

Power
Clamp

V

ON

CH 1

GND

Channels 2

CONTROL & DIAGNOSTIC

CH 2

OUT2

OUT1

Name Function

V

CC

OUTPUT

1,2

GND

INPUT

1,2

CURRENT SENSE

Battery connection.

Power output.

Ground connection. Must be reverse battery protected by an external
diode / resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.

Analog current sense pin; delivers a current proportional to the load

1,2

current.

CS_DIS Active high CMOS compatible pin to disable the current sense pin.

5/37

Block diagram and pin description VND5E025LK-E

Figure 2. Configuration diagram (top view)

V

CC

GND

N.C.

INPUT2

N.C.

INPUT1

N.C.

CURRENT SENSE1

N.C.

CURRENT SENSE2

CS_DIS.

V

CC

1
2
3
4
5
6
7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1

TAB = V

CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1kΩ

resistor

X

Through 22kΩ

resistor

Through 10kΩ

resistor

Through 10kΩ

resistor

6/37

VND5E025LK-E Electrical specification

2 Electrical specification

Figure 3. Current and voltage conventions

I

S

V

CC

I

I

CSD

V

CSD

V

IN1

V

IN2

I

IN1

I

IN2

CS_DIS

INPUT1

INPUT2

GND

OUTPUT1

CURRENT
SENSE1

OUTPUT2

CURRENT
SENSE2

I

GND

OUT1

I

SENSE1

I

OUT2

I

SENSE2

V

V

SENSE2

OUT2

V

SENSE1

V

Fn

V

OUT1

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

-I

GND

I

OUT

- I

OUT

I

CSD

-I

CSENSE

V

CSENSE

DC supply voltage 41

CC

Reverse DC supply voltage 0.3

CC

DC reverse ground pin current 200 mA

DC output current Internally limited

Reverse DC output current 24

DC input current

IN

DC current sense disable input current

DC reverse CS pin current 200

Current sense maximum voltage VCC- 41 to +V

-1 to 10

CC

V

A

mAI

V

7/37

Electrical specification VND5E025LK-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Maximum switching energy (single pulse)

E

MAX

(L = TBD; R

= I

I

OUT

limL

=0Ω; V

L

(Typ.) )

= 13.5V; T

bat

jstart

= 150°C;

70 mJ

Electrostatic discharge
(human body model: R = 1.5 kΩ; C = 100 pF)

4000
2000
4000
5000
5000

V
V
V
V
V

°C

V

V

ESD

ESD

T

T

- INPUT

- CURRENT SENSE

- CS_DIS

- OUTPUT

- V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature - 40 to 150

j

Storage temperature - 55 to 150

stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case (with one channel ON) 1.35

°C/W

Thermal resistance junction-ambient See Figure 36

8/37

VND5E025LK-E Electrical specification

2.3 Electrical characteristics

Values specified in this section are for 8V<VCC<28V; -40°C<Tj<150°C, unless otherwise
stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

USDhyst

R

V

clamp

I

L(off1)

1. For each channel.

2. PowerMOS leakage included.

Operating supply

CC

voltage

Undervoltage shutdown 3.5 4.5

USD

Undervoltage shutdown
hysteresis

On state resistance

ON

Clamp voltage IS= 20 mA 41 46 52 V

I

Supply current

S

Off state output
current

Output - VCC diode

V

F

voltage

(1)

(1)

I

=3A; Tj= 25°C 25

OUT

(1)

=3A; Tj= 150°C 50

OUT

=3A; VCC=5V; Tj= 25°C 35

I

OUT

Off State; V
VIN=V

OUT=VSENSE=VCSD

=13V; Tj= 25°C;

CC

On State; VCC=13V; VIN=5V;
I

=0A

OUT

VIN=V

= 25°C

T

j

V

IN=VOUT

=0V; VCC=13V;

OUT

=0V; VCC=13V;

Tj= 125°C

-I

=4 A; Tj=150°C 0.7 V

OUT

=0V

4.5 13 28

VV

0.5

mΩI

(2)

2

(2)

5

µA

36mA

00.013

µA

05

Table 6. Switching (VCC=13V; Tj= 25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Turn-on delay time

Turn-off delay time 40

/dt)onTurn-on voltage slope

/dt)

Turn-off voltage slope See Figure 28

off

Switching energy losses
during t

Switching energy losses
during t

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

WON

WOFF

=4.3 Ω

R

L

(see Figure 6)

=4.3 Ω

R

L

RL=4.3 Ω
(see Figure 6)

9/37

20

See Figure 27

0.6

0.35

µs

V/µs

mJ

Electrical specification VND5E025LK-E

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

IL

I

IL

V

IH

I

IH

V

I(hyst)

ICL

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Table 8. Protections and diagnostics

Input low level voltage 0.9 V

Low level input current VIN=0.9V 1 µA

Input high level voltage 2.1 V

High level input current VIN=2.1V 10 µA

Input hysteresis voltage 0.25

I

=1mA 5.5 7

Input clamp voltage

IN

I

= -1mA -0.7

IN

CS_DIS low level voltage 0.9

Low level CS_DIS current V

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25

I

=1mA 5.5 7

(1)

CSD

=-1mA -0.7

I

CSD

CS_DIS clamp voltage

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

= 13V 30 42

I

LIMH

I

LIML

T

TSD

T

T

RS

T

HYST

V

DEMAG

V

ON

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

DC short circuit current

Short circuit current
during thermal cycling

Shutdown temperature 150 175 200

Reset temperature TRS+1 TRS+5

R

Thermal reset of status 135

Thermal hysteresis

TSD-TR

)

(T

Turn-off output voltage
clamp

Output voltage drop
limitation

CC

CC

< 28V

5V < V

VCC= 13V;

TR<Tj<T

I

=2A; VIN=0;

OUT

TSD

L=6 mH

=0.1A;

I

OUT

Tj= -40°C to +150°C

(see Figure 8)

11

7

-41 VCC-46 VCC-52 V

V

CC

25 mV

60

VV

V

A

°C

10/37

VND5E025LK-E Electrical specification

Table 9. Current sense (8V < VCC< 18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

dK

K

LED

K

K

1/K1

K

= 0.05A; V

I

OUT/ISENSE

0

1

I

OUT/ISENSE

I

OUT/ISENSE

Current sense

(1)

ratio drift

2

I

OUT/ISENSE

OUT

Tj= -40°C to 150°C

I

=0.5A; V

OUT

= -40°C to 150°C

T

j

I

=2 A; V

OUT

=0V;

V

CSD

SENSE

SENSE

Tj= -40°C to 150°C

= 25°C to 150°C

T

j

=2 A; V

I

OUT

V

CSD

= -40°C to 150°C

T

j

I

=3 A; V

OUT

V

CSD

= -40°C to 150°C

T

j

SENSE

=0V;

SENSE

=0V;

Tj= 25°C to150°C

SENSE

=0.5V; V

=0.5V; V

=4 V;

=4 V;

=4V;

CSD

CSD

=0V;

=0V;

1240 3350 4960

1860 3150 4600

2100

3100

4400

2250

3100

3850

-13 13 %

2200

3000

4100

2450

3000

3550

dK

2/K2

K

dK

3/K3

I

SENSE

I

OL

V

SENSE

V

SENSEH

I

SENSEH

=3 A; V

Current sense

(1)

ratio drift

3

I

OUT/ISENSE

Current sense

(1)

ratio drift

Analog sense

0

leakage current

I

OUT

Tj= -40°C to 150°C

I

=10 A; V

OUT

V

=0V;

CSD

= -40°C to 150°C

T

j

= 25°C to 150°C

T

j

=10 A; V

I

OUT

= -40°C to 150°C

T

j

I

=0A; V

OUT

=5V; VIN=0V; Tj= -40°C to 150°C

V

CSD

I

=0A; V

OUT

=0V; VIN=5V; Tj= -40°C to 150°C

V

CSD

I

=2A; V

OUT

=5V; VIN=5V; Tj= -40°C to 150°C

V

CSD

SENSE

SENSE

SENSE

SENSE

SENSE

SENSE

=4V; V

=4V;

=4V; V

=0V;

=0V;

=0V;

CSD

CSD

=0V;

=0V;

-12 12 %

2550

2850

3280

2650

2850

3180

-6 +6 %

01

02

µA

01

Openload on

= 5V, 8V<VCC<18V

state current
detection
threshold

V

IN

I

SENSE

= 5 µA

530mA

Max analog
sense output

I

OUT

=3 A; V

=0V 5

CSD

voltage

V

Analog sense
output voltage in
fault condition

(1)

VCC= 13V; R

=3.9kΩ 8

SENSE

Analog sense
output current in
fault condition

(2)

VCC= 13V; V

=5V 9 mA

SENSE

11/37

Electrical specification VND5E025LK-E

Table 9. Current sense (8V < VCC< 18V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

DSENSE1H

t

DSENSE1L

t

DSENSE2H

Delay response
time from falling
edge of CS_DIS
pin

Delay response
time from rising
edge of CS_DIS
pin

Delay response
time from rising
edge of INPUT
pin

V
I

SENSE

SENSE

<4V, 0.5<I

= 90% of I

(see Figure 4)

V
I

SENSE

SENSE

<4V, 0.5<I

= 10% of I

(see Figure 4)

V
I

SENSE

SENSE

<4V, 0.5<I

= 90% of I

(see Figure 4)

<10A

OUT

SENSEMAX

<10A

OUT

SENSEMAX

<10A

OUT

SENSEMAX

30 100 µs

520µs

80 300 µs

Delay response

SENSE

= 90% of I

<4V,

= 90% of I

OUTMAX

SENSEMAX,

, I

OUTMAX

=3A

Δt

DSENSE2H

time between
rising edge of
output current
and rising edge

V
I

SENSE

I

OUT

(see Figure 7)

of current sense

Delay response

t

DSENSE2L

time from falling
edge of INPUT
pin

1. Fault condition includes: power limitation, overtemperature and open load OFF state detection.

V
I

SENSE

SENSE

<4V, 0.5<I

= 10% of I

(see Figure 4)

<10A

OUT

SENSEMAX

70 250 µs

110 µs

Table 10. Openload detection (8V < VCC<18V)

Symbol Parameter Test condition Min. Typ. Max. Unit

t

DSTKON

I

L(off2)r

I

L(off2)f

td_vol

V

Openload off state voltage

OL

detection threshold

Output short circuit to V
detection delay at turn off

Off state output current at

= 4V

V

OUT

Off state output current at

= 2V

V

OUT

=0V 2

V

IN

CC

See Figure 5 180 1200 µs

=0V; V

V

IN

V

rising from 0V to 4V

OUT

=0V; V

V

IN

V

falling from VCC to 2V

OUT

=0V

SENSE

SENSE=VSENSEH

-120 0 µA

-50 90 µA

Delay response from

= 4 V; VIN= 0V

output rising edge to

SENSE

rising edge in

V
openload

V

OUT

V

SENSE

= 90% of V

SENSEH

See

Figure 5

4V

20 µs

12/37