ST VND5160J-E User Manual
Double channel high side driver for automotive applications
Features
Max supply voltage V
Operating voltage range V
Max on-state resistance
Current limitation (typ) I
Off state supply current (typ) I
1. Typical value with all loads connected.
CC
CC
R
ON
LIMH
S
41V
4.5 to 36V
160 mΩ
5A
(1)
2 µA
VND5160J-E
PowerSSO-12
– Electrostatic discharge protection
Application
■ General
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
■ Diagnostic functions
– Open drain status output
– On state open load detection
– Off state open load detection
– Thermal shutdown indication
■ Protection
– Undervoltage shut-down
– Overvoltage clamp
– Output stuck to Vcc detection
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Thermal shut down
– Reverse battery protection (see Figure 28)
Table 1. Device summary
■ All types of resistive, inductive and capacitive
loads
Description
The VND5160J-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground. Active V
device against low energy spikes (see ISO7637
transient compatibility table).
The device detects open load condition in both
ON and OFF states, when STAT_DIS is left open
or driven low. Output shorted to V
the OFF state.
When STAT_DIS is driven high, the STATUS pin is
in a high impedance condition.
Output current limitation protects the device in
overload condition. In case of long duration
overload, the device limits the dissipated power to
safe level up to thermal shut-down intervention.
Thermal shut-down with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears.
pin voltage clamp protects the
CC
is detected in
CC
Order codes
Package
Part number (Tube) Part number (Tape & Reel)
PowerSSO-12 VND5160J-E VND5160JTR-E
December 2007 Rev 5 1/31
www.st.com
31
Contents VND5160J-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20
3.1.1 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 20
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 PowerSSO-12™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31
VND5160J-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Status pin (V
Table 9. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 15. PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SD
3/31
List of figures VND5160J-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 15. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 17. On state resistance vs T
Figure 18. On state resistance vs V
Figure 19. Openload On state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. Openload Off state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. Turn - On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 22. Turn - Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23. I
LIM
vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 28. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 29. Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Maximum turn Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
Figure 31. PowerSSO-12™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 24
Figure 33. PowerSSO-12™ Thermal impedance junction ambient single pulse (one channel ON) . . 25
Figure 34. Thermal fitting model of a double channel HSD in PowerSSO-12™ . . . . . . . . . . . . . . . . . 25
Figure 35. PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 36. PowerSSO-12™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4/31
VND5160J-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
CC
V
GND
INPUT1
STATUS1
STAT_DIS
INPUT2
STATUS2
CC
CLAMP
OVERTE MP. 1
OVERTEMP. 2
LOGIC
UNDERVOLTAGE
DRIVER 1
PWR
1
LIM
OPENLOAD ON 1
OPENLOAD OFF 1
PWR
2
LIM
CLAMP 1
V
DSLIM
I
LIM
Table 2. Pin functions
Name Function
V
CC
OUTPUTn Power output.
GND
INPUTn
Battery connection.
Ground connection. Must be reverse battery protected by an external diode/
resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
OUTPUT1
CLAMP 2
1
1
DRIVER 2
OPENLOAD ON 2
OPENLOAD OFF 2
V
I
LIM
DSLIM
2
2
OUTPUT2
STATUSn Open Drain digital diagnostic pin.
STAT_DIS Active high CMOS compatible pin, to disable the STATUS pin.
5/31
Block diagram and pin description VND5160J-E
Figure 2. Configuration diagram (top view)
TAB = V
GND
STAT_DIS
INPUT 1
STATUS 1
STATUS 2
INPUT 2
1
2
3
4
5
6
12
11
10
9
8
7
cc
V
cc
OUTPUT 1
OUTPUT 1
OUTPUT 2
OUTPUT 2
V
cc
Table 3. Suggested connections for unused and N.C. pins
Connection / Pin STATUS N.C. OUTPUT INPUT STAT_DIS
Floating X X X X X
To ground N.R.
1. Not recommended.
(1)
XN.R.
Through 10kΩ
resistor
Through 10kΩ
resistor
6/31
VND5160J-E Electrical specifications
2 Electrical specifications
Figure 3. Current and voltage conventions
I
V
V
Fn
OUTn
S
V
CC
V
CC
I
I
SD
STAT_DIS
V
SD
I
INn
INPUTn
V
INn
OUTPUTn
STATUSn
OUTn
I
STATn
V
STATn
GND
I
GND
Note: V
Fn
= V
OUTn
- V
during reverse battery condition.
CCn
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.
Table 4. Absolute maximum ratings
Symbol Parameter Value Unit
V
-V
-I
GND
I
OUT
-I
I
STAT
I
STAT_DIS
E
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
DC output current Internally limited A
Reverse DC output current 6 A
OUT
DC input current +10 / -1 mA
I
IN
DC status current +10 / -1 mA
DC status disable current +10 / -1 mA
Maximum switching energy
MAX
(L=12mH; R
= I
I
OUT
limL
=0Ω; V
L
(Typ.) )
=13.5V; T
bat
jstart
=150°C;
33 mJ
7/31
Electrical specifications VND5160J-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (Human Body Model: R=1.5KΩ;
C=100pF)
V
V
ESD
ESD
T
– INPUT
–STATUS
–STAT_DIS
–OUTPUT
–V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
T
j
Storage temperature -55 to 150 °C
stg
4000
4000
4000
5000
5000
V
V
V
V
V
2.2 Thermal data
Table 5. Thermal data
Symbol Parameter Max value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (max.) (with one channel ON) 8 °C/W
Thermal resistance junction-ambient See Figure 32 °C/W
8/31
VND5160J-E Electrical specifications
2.3 Electrical characteristics
Values specified in this section are for 8V<VCC<36V; -40°C<Tj<150°C, unless otherwise
stated.
.
Table 6. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
Operating supply voltage 4.5 13 36 V
CC
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage Shut-down
hysteresis
I
= 1A; Tj= 25°C
On state resistance
ON
Clamp voltage IS= 20mA 41 46 52 V
clamp
(2)
OUT
= 1A; Tj= 150°C
I
OUT
= 1A; VCC= 5V; Tj= 25°C
I
OUT
Off State; VCC=13V; VIN=V
I
Supply current
S
I
L(off1)
I
L(off2)
Off state output current
Output - VCC diode
V
F
voltage
(2)
1. PowerMOS leakage included.
2. For each channel.
Table 7. Switching (VCC=13V; Tj=25°C)
Tj= 25°C;
On State; V
I
OUT
VIN=V
(2)
V
IN=VOUT
VIN=0V; V
-I
OUT
CC
=0A
=0V; VCC=13V; Tj=25°C
OUT
=0V; VCC=13V; Tj=125°C
OUT
=0.6A; Tj=150°C 0.7 V
0.5 V
160
320
210
=0
OUT
(1)
2
=13V; VIN=5V;
5
3
000.01 3
=4V -75 0
mΩ
mΩ
mΩ
(1)
6µAmA
5
µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
dV
dV
t
d(on)
t
d(off)
OUT
OUT
W
W
ON
OFF
Turn-On delay time RL=13Ω (see Figure 6)10 µs
Turn-Off delay time RL=13Ω (see Figure 6)15 µs
/dt
Turn-On voltage slope RL=13Ω See Figure 21 V/ µs
(on)
/dt
Turn-Off voltage slope RL=13Ω See Figure 22 V/ µs
(off)
Switching energy losses during t
Switching energy losses during t
=13Ω (see Figure 6)0.07 mJ
wonRL
=13Ω (see Figure 6)0.04 mJ
woffRL
9/31
Electrical specifications VND5160J-E
Table 8. Status pin (VSD=0)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
STAT
I
LSTAT
C
STAT
V
Table 9. Protection
Status low output voltage I
Status leakage current
Status pin input capacitance
Status clamp voltage
SCL
(1)
= 1.6 mA, VSD=0V 0.5 V
STAT
Normal operation or V
V
= 5V
STAT
Normal operation or V
V
= 5V
STAT
I
= 1mA
STAT
= - 1mA
I
STAT
SD
SD
=5V,
=5V,
5.5
10 µA
100 pF
7V
-0.7
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
T
T
T
t
limH
limL
TSD
T
R
RS
HYST
SDL
DC short circuit current
Short circuit current during
thermal cycling
VCC= 13V
5V<VCC<36V
V
= 13V TR<Tj<T
CC
TSD
Shutdown temperature 150 175 200 °C
Reset temperature
Thermal reset of STATUS 135 °C
Thermal hysteresis (T
Status delay in overload
conditions
TSD-TR
)
T
j>TTSD
3.5 5 7.5
7.5
2A
TRS + 1 TRS + 5
7°C
20 µs
V
A
A
°C
V
DEMAG
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Turn-Off output voltage
clamp
Output voltage drop
ON
limitation
=1A; VIN=0; L=20mH
I
OUT
I
= 0.03A;
OUT
= -40°C...+150°C
T
j
(see Figure 5)
VCC-41 VCC-46 VCC-52
25 mV
V
10/31
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