ST VND5160AJ-E User Manual

Double channel high side driver with analog current sense

Features

Max supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off state supply current I

1. Typical value with all loads connected.

■ General features

– Inrush current active management by

power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

European directive

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide range

currents
– Current sense disable
– Thermal shutdown indication
– Very low current sense leakage

■ Protection

– Undervoltage shut-down
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

cc

– Thermal shut down

Table 1. Device summary

Package

CC

CC

ON

LIMH

S

4.5 to 36V

160 mΩ

2 µA

41 V

5 A

VND5160AJ-E

for automotive applications

PowerSSO-12

– Reverse battery protection (see Application

(1)

Tube Tape and Reel

schematic)

– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VND5160AJ-E is a monolithic device made
using STMicroelectronics VIPower technology. It
is intended for driving resistive or inductive loads
with one side connected to ground. Active V
voltage clamp protects the device against low
energy spikes (see ISO7637 transient
compatibility table). This device integrates an
analog current sense which delivers a current
proportional to the load current (according to a
known ratio) when CS_DIS is driven low or left
open. When CS_DIS is driven high, the
CURRENT SENSE pin is in a high impedance
condition. Output current limitation protects the
device in overload condition. In case of long
overload duration, the device limits the dissipated
power to safe level up to thermal shut-down
intervention. Thermal shut-down with automatic
restart allows the device to recover normal
operation as soon as fault condition disappears.

Order codes

CC

pin

PowerSSO-12 VND5160AJ-E VND5160AJTR-E

February 2008 Rev 5 1/31

www.st.com

31

Contents VND5160AJ-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21

3.1.1 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 21

3.1.2 Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 22

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23

4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1 PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

2/31

VND5160AJ-E List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Switching (VCC=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 10. Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 13. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 14. PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 15. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

3/31

List of figures VND5160AJ-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Delay response time between rising edge of ouput current and rising edge of current sense

(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Iout/isense vs. Iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 7. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 11. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 14. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 17. On state resistance vs. T
Figure 18. On state resistance vs. V

Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 20. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 21. I

LIMH

vs. T

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 22. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 24. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 25. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 27. Maximum turn-Off current versus inductance (for each channel). . . . . . . . . . . . . . . . . . . . 23

Figure 28. PowerSSO-12™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 29. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 24

Figure 30. PowerSSO-12™ thermal impedance junction ambient single pulse (one channel ON) . . . 25

Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-12™ . . . . . . . . . . . . . . . . . 25

Figure 32. PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 33. PowerSSO-12™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 34. PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4/31

VND5160AJ-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

V

CC

CLAMP

GND

INPUT1

INPUT2

CS_DIS

Table 2. Pin function

LOGIC

Name Function

V

CC

OUTPUT

GND

INPUT

n

n

Battery connection.

Power output.

Ground connection. Must be reverse battery protected by an external
diode/resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.

Pwr

LIM

UNDERVOLTAGE

DRIVER 1

Pwr

1

LIM

OVERTEMP. 1

I

OUT1

2

PwCLAMP 1

V

K 1

I

LIM

DSLIM

OUTPUT1

CURRENT
SENSE1

1

1

DRIVER 2

I

OUT2

PwCLAMP 2

I

LIM

V

DSLIM

OVERTEMP. 2

K 2

OUTPUT2

2

2

CURRENT
SENSE2

CURRENT SENSE

Analog current sense pin, delivers a current proportional to the load current.

n

CS_DIS Active high CMOS compatible pin, to disable the current sense pin.

5/31

Block diagram and pin description VND5160AJ-E

Figure 2. Configuration diagram (top view)

GND

INPUT2

INPUT1

CURRENT SENSE1
CURRENT SENSE2

CS_DIS

TAB = V

1
2

3
4

5
6

12
11
10

9
8
7

N.C.
OUTPUT2

OUTPUT2
OUTPUT1

OUTPUT1
N.C.

cc

PowerSSO-12

Note: The above pin configuration reflects the changes notified with PCN-APG-BOD/07/2886. The

new pinout is backaward compatible with existing PCB layouts where pins #7 and 12 are
connected to Vcc. For new PCB designs, these pins should be left unconnected.

Table 3. Suggested connections for unused and N.C. pins

Connection / Pin Current Sense N.C. Output Input CS_DIS

Floating N.R.

To ground Through 1kΩ resistor X N.R.

1. Not recommended.

(1)

XX X X

(1)

Through 10kΩ

resistor

Through 10kΩ

resistor

6/31

VND5160AJ-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

I

SENSEn

V

SENSEn

(1)

V

Fn

I

OUTn

V

OUTn

V

CC

V

CC

I

CSD

V

CSD

I

INn

V

INn

CS_DIS

INPUTn

GND

OUTPUTn

CURRENT
S

ENSEn

I

GND

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

- I

I

OUT

- I

I

CSD

-I

CSENSE

V

CSENSE

E

DC supply voltage 41 V

CC

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

GND

DC output current Internally limited A

Reverse DC output current 6 A

OUT

I

DC input current -1 to 10 mA

IN

DC current sense disable input current -1 to 10 mA

DC reverse CS pin current 200 mA

Current sense maximum voltage

Maximum switching energy (single pulse)

MAX

(L=12mH; R

=0Ω; V

L

=13.5V; T

bat

jstart

=150ºC; I

OUT

= I

limL

(Typ.) )

VCC-41

+V

CC

34 mJ

V
V

7/31

Electrical specifications VND5160AJ-E

Table 4. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge (Human Body Model: R=1.5KΩ;
C=100pF)

V

V

ESD

ESD

T

- INPUT

- CURRENT SENSE

- CS_DIS

- OUTPUT

- V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature -40 to 150 °C

T

j

Storage temperature -55 to 150 °C

stg

4000
2000
4000
5000
5000

V
V
V
V
V

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Max value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case (MAX) (With one channel ON) 8 °C/W

Thermal resistance junction-ambient (MAX) See Figure 29 °C/W

8/31

VND5160AJ-E Electrical specifications

2.3 Electrical characteristics

The values specified in this section are for 8V<VCC<36V; -40°C<Tj<150°C, unless otherwise
stated.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

I

L(off)

1. For each channel.

2. PowerMOS leakage included.

Operating supply voltage 4.5 13 36 V

CC

Undervoltage shutdown 3.5 4.5 V

USD

Undervoltage shut-down
hysteresis

I

= 0.5A; Tj= 25°C

OUT

On state resistance

ON

Clamp voltage IS= 20 mA 41 46 52 V

clamp

I

Supply current

S

Off state output
current

Output - VCC diode

V

F

voltage

(1)

(1)

(1)

= 0.5A; Tj= 150°C

I

OUT

I

= 0.5A; VCC= 5V; Tj= 25°C

OUT

Off State; V
VIN=V

OUT=VSENSE=VCSD

On State; V

VIN=V

OUT

V

IN=VOUT

-I

= 0.6A; Tj=150°C 0.7 V

OUT

= 13V; Tj= 25°C;

CC

=0V

=13V; VIN=5V; I

CC

OUT

=0V; VCC=13V; Tj=25°C
=0V; VCC=13V; Tj=125°C

=0A

000.01 3

0.5 V

160
320
210

(2)

(2)

5

2

3

6µAmA

5

Table 7. Switching (VCC=13V, Tj=25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

mΩ
mΩ
mΩ

µA

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

Turn- On delay time RL= 26Ω (see Figure 8.)10 µs

Turn- Off delay time RL= 26Ω (see Figure 8.)15 µs

Turn- On voltage

/dt)

on

slope

Turn- Off voltage

/dt)

off

slope

Switching energy
losses during twon

Switching energy
losses during t

woff

= 26Ω

R

L

R

= 26Ω

L

RL= 26Ω (see Figure 8.)0.03 mJ

RL= 26Ω (see Figure 8.)0.02 mJ

See

Figure 20.

See

Figure 22.

V/µs

V/µs

9/31

Electrical specifications VND5160AJ-E

Table 8. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

I

V

I

V

I(hyst)

V

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Table 9. Protection and diagnostics

Input low level voltage 0.9 V

IL

Low level input current VIN= 0.9V 1 µA

IL

Input high level voltage 2.1 V

IH

High level input current VIN= 2.1V 10 µA

IH

Input hysteresis voltage 0.25 V

Input clamp voltage

ICL

I

IN

= -1mA

I

IN

= 1mA

5.5

-0.7

CS_DIS low level voltage 0.9 V

Low level CS_DIS current V

= 0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

High level CS_DIS current V

= 2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25 V

CS_DIS clamp voltage

(1)

I

I

CSD

CSD

= 1mA

= -1mA

5.5

-0.7

7V

7V

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

limH

DC short circuit current

VCC= 13V
5V<VCC<36V

3.8 5 7.5

7.5

V

V

A
A

I

T

T

T

V

DEMAG

V

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

Short circuit current during

limL

thermal cycling

Shutdown temperature 150 175 200 °C

TSD

T

Reset temperature TRS + 1 TRS + 5 °C

R

Thermal reset of STATUS 135 °C

RS

Thermal hysteresis (T

HYST

TSD-TR

Turn-Off output voltage clamp

Output voltage drop

ON

limitation

diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

= 13V; TR<Tj<T

V

CC

TSD

2A

)7°C

I

= 1A; VIN= 0;

OUT

L= 20mH

I

= 0.03A;

OUT

Tj= -40°C...150°C

VCC-41 VCC-46 VCC-52 V

25 mV

(see Figure 9.)

10/31