ST VND5050AJ-E, VND5050AK-E User Manual
Double channel high side driver with analog current sense
Features
Max transient supply voltage V
Operating voltage range V
Max on-state resistance (per ch.) R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected
■ Main
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/ec
european directive
■ Diagnostic functions
– Proportional load current sense
– High current sense precision for wide range
currents
– Current sense disable
– Thermal shutdown indication
– Very low current sense leakage
■ Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Thermal shutdown
– Reverse battery protection (see Application
schematic on page 21)
– Electrostatic discharge protection
CC
CC
ON
LIMH
S
41 V
4.5 to 36 V
50 mΩ
18 A
(1)
2µA
VND5050AJ-E
VND5050AK-E
for automotive applications
PowerSSO-24PowerSSO-12
Applications
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VND5050AJ-E, VND5050AK-E is a
monolithic device made using STMicroelectronics
VIPower M0-5 technology. It is intended for driving
resistive or inductive loads with one side
connected to ground. Active V
clamp protects the device against low energy
spikes (see ISO7637 transient compatibility
table).
This device integrates an analog current sense
which delivers a current proportional to the load
current (according to a known ratio) when
CS_DIS is driven low or left open. When CS_DIS
is driven high, the current sense pin is in a high
impedance condition.
Output current limitation protects the device in
overload condition. In case of long overload
duration, the device limits the dissipated power to
safe level up to thermal shutdown intervention.
Thermal shutdown with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears.
Table 1. Device summary
Package
Tube Tape and reel
pin voltage
CC
Order codes
PowerSSO-12
VND5050AJ-E VND5050AJTR-E
PowerSSO-24 VND5050AK-E VND5050AKTR-E
July 2009 Doc ID 12272 Rev 9 1/37
www.st.com
1
Contents VND5050AJ-E / VND5050AK-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 22
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2 PowerSSO-24™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.2 PowerSSO-12™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.3 PowerSSO-24™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.4 PowerSSO-12™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.5 PowerSSO-24™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37 Doc ID 12272 Rev 9
VND5050AJ-E / VND5050AK-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8V<V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 15. PowerSSO-12™ thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 16. PowerSSO-24™ thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 17. PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 18. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 19. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CC
Doc ID 12272 Rev 9 3/37
List of figures VND5050AJ-E / VND5050AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. I
OUT/ISENSE
Figure 7. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17. On-state resistance vs T
Figure 18. On-state resistance vs V
Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. I
LIMH
vs T
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
Figure 28. PowerSSO-12™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 24
Figure 30. PowerSSO-12™ thermal impedance junction ambient single pulse (one channel on). . . . 25
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-12™ . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-24™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 33. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 27
Figure 34. PowerSSO-24™ Thermal impedance junction ambient single pulse (one channel on) . . . 28
Figure 35. Thermal fitting model of a double channel HSD in PowerSSO-24™ . . . . . . . . . . . . . . . . . 28
Figure 36. PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 37. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 38. PowerSSO-12™ tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 39. PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 40. PowerSS0-24
Figure 41. PowerSSO-24
vs I
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
TM
tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
TM
tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4/37 Doc ID 12272 Rev 9
VND5050AJ-E / VND5050AK-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
CC
Pwr
LIM
UNDERVOLTAGE
DRIVER 1
Pwr
1
LIM
OVERTE MP. 1
I
OUT1
2
PwCLAMP 1
K 1
V
DSLIM
I
1
LIM
1
V
CC
CLAMP
GND
INPUT1
INPUT2
CS_DIS
Table 2. Pin function
LOGIC
Name Function
V
CC
OUTPUT
GND
Battery connection.
Power output.
1,2
Ground connection. Must be reverse battery protected by an external diode/resistor
network.
DRIVER 2
I
OUT2
PwCLAMP 2
I
LIM
V
DSLIM
OVERTEMP. 2
K 2
OUTPUT1
CURRENT
SENSE1
OUTPUT2
2
2
CURRENT
SENSE2
INPUT
CURRENT
SENSE
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
1,2
switch state.
Analog current sense pin, delivers a current proportional to the load current
1,2
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
Doc ID 12272 Rev 9 5/37
Block diagram and pin description VND5050AJ-E / VND5050AK-E
Figure 2. Configuration diagram (top view)
TAB = V
GND
INPUT2
CURRENT SENSE1
INPUT1
CURRENT SENSE2
CS_DIS
cc
12
1
2
3
4
5
6
11
10
V
cc
OUTPUT2
OUTPUT2
9
OUTPUT1
8
OUTPUT1
7
V
cc
CURRENT SENSE1
CURRENT SENSE2
V
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
N.C.
CS_DIS.
V
CC
CC
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
TAB = V
CC
PowerSSO-12
Table 3. Suggested connections for unused and not connected pins
PowerSSO-24
Connection/pin Current sense N.C. Output Input CS_DIS
Floating N.R.
To ground
1. Not recommended.
Through 1 KΩ
(1)
resistor
XX X X
XN.R.
(1)
Through 10 KΩ
resistor
Through
10 KΩ resistor
6/37 Doc ID 12272 Rev 9
VND5050AJ-E / VND5050AK-E Electrical specifications
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
V
CSD
CC
I
I
CSD
CS_DIS
I
IN1
V
IN1
I
IN2
V
IN2
INPUT1
INPUT2
GND
OUTPUT1
CURRENT
SENSE1
OUTPUT2
CURRENT
SENSE2
I
GND
OUT1
I
SENSE1
I
OUT2
I
SENSE2
V
SENSE2
V
OUT2
V
SENSE1
V
Fn
V
OUT1
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 4. Absolute maximum ratings
Symbol Parameter Value Unit
V
-V
-I
I
OUT
-I
I
CSD
-I
CSENSE
V
CSENSE
E
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
Reverse DC output current 12 A
OUT
DC input current -1 to 10 mA
I
IN
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
Current sense maximum voltage
Maximum switching energy
MAX
(L= 3mH; R
=0Ω; V
L
=13.5V; T
bat
jstart
=150°C; I
OUT
= I
limL
(Typ.))
V
-41
CC
+V
CC
104 mJ
V
V
Doc ID 12272 Rev 9 7/37
Electrical specifications VND5050AJ-E / VND5050AK-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (Human Body Model: R=1.5KΩ;
V
V
ESD
ESD
T
C=100pF)
– Input
– Current sense
–CS_DIS
– Output
–V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
T
j
Storage temperature -55 to 150 °C
stg
4000
2000
4000
5000
5000
V
V
V
V
V
2.2 Thermal data
Table 5. Thermal data
Value
Symbol Parameter
PowerSSO-12 PowerSSO-24
Unit
R
thj-case
R
thj-amb
Thermal resistance junction case (max)
(with one channel on)
Thermal resistance junction ambient
(max)
2.3 Electrical characteristics
8V<VCC<36 V; -40 °C<Tj<150 °C, unless otherwise specified.
Table 6 . Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
Operating supply voltage 4.5 13 36 V
CC
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shutdown
hysteresis
On-state resistance
ON
Clamp voltage IS= 20mA 41 46 52 V
I
Supply current
S
(1)
See Figure 29 See Figure 33 °C/W
I
= 2A; Tj= 25°C
OUT
= 2A; Tj= 150°C
I
OUT
= 2A; VCC= 5V; Tj= 25°C
I
OUT
Off-state; V
V
IN=VOUT=VSENSE=VCSD
On-state; V
I
= 0A
OUT
=13V; Tj=25°C;
CC
=13V; VIN=5V;
CC
2.7 2.7 °C/W
0.5 V
50
mΩ
100
mΩ
65
mΩ
(2)
3
(2)
5
6µAmA
=0V
2
8/37 Doc ID 12272 Rev 9
VND5050AJ-E / VND5050AK-E Electrical specifications
Table 6 . Power section (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
L(off)
V
Off-state output
current
Output - VCC diode
F
voltage
(1)
(1)
VIN=V
= 25°C
T
j
V
IN=VOUT
Tj= 125°C
-I
OUT
=0V; VCC=13V;
OUT
000.01 3
=0V; VCC=13V;
5
=4A; Tj=150°C 0.7 V
1. For each channel.
2. PowerMOS leakage included.
Table 7. Switching (VCC=13V; Tj= 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
dV
dV
t
d(on)
t
d(off)
OUT
OUT
W
W
OFF
Turn-on delay time RL= 6.5Ω (see Figure 8)25µs
Turn-off delay time RL= 6.5Ω (see Figure 8)35µs
/dt
Turn-on voltage slope RL= 6.5Ω See Figure 21 V/µs
(on)
/dt
Turn-off voltage slope RL= 6.5Ω See Figure 22 V/µs
(off)
Switching energy losses
ON
during t
won
Switching energy losses
during t
woff
RL= 6.5Ω (see Figure 8)0.24mJ
RL= 6.5Ω (see Figure 8)0.2mJ
µA
Table 8. Logic input
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
IH
V
I(hyst)
V
ICL
V
CSDL
I
CSDL
V
CSDH
I
CSDH
Input low level voltage 0.9 V
IL
Low level input current VIN= 0.9V 1 µA
IL
Input high level voltage 2.1 V
IH
High level input current VIN= 2.1V 10 µA
Input hysteresis voltage 0.25 V
Input clamp voltage
I
= 1mA
IN
= -1mA
I
IN
5.5
-0.7
CS_DIS low level voltage 0.9 V
Low level CS_DIS
current
CS_DIS high level
voltage
High level CS_DIS
current
= 0.9V 1 µA
V
CSD
2.1 V
V
= 2.1V 10 µA
CSD
7V
V
Doc ID 12272 Rev 9 9/37
Electrical specifications VND5050AJ-E / VND5050AK-E
Table 8. Logic input (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CSD(hyst)
V
CSCL
Table 9 . Protections and diagnostics
CS_DIS hysteresis
voltage
CS_DIS clamp voltage
I
CSD
I
CSD
= 1mA
= -1mA
(1)
0.25 V
5.5
7V
-0.7
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
I
limL
T
TSD
T
T
T
HYST
V
DEMAG
V
RS
ON
DC short circuit current
Short circuit current
during thermal cycling
VCC= 13V
5V<V
V
<36V
CC
=13V; TR<Tj<T
CC
TSD
Shutdown temperature 150 175 200 °C
Reset temperature
R
Thermal reset of
STATUS
Thermal hysteresis
TSD-TR
)
=2A; VIN=0; L=6mH VCC-41 VCC-46 VCC-52 V
I
OUT
I
=0.1A;
OUT
= -40°C...+150°C
T
j
(see Figure 9)
(T
Turn-off output voltage
clamp
Output voltage drop
limitation
12 18 24
24
7A
TRS + 1
TRS + 5 °C
135 °C
7°C
25 mV
V
A
A
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Table 10. Current sense (8V<VCC<16V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
=0.05A;
OUT
K
K
dK
1/K1
K
I
0
1
OUT/ISENSE
I
OUT/ISENSE
Current sense ratio
(1)
drift
I
2
OUT/ISENSE
V
SENSE
= -40°C...150°C
T
j
I
=1A; V
OUT
= -40°C
T
j
= 25°C...150°C
T
j
=1A; V
I
OUT
V
CSD
TJ=-40 °C to 150 °C
I
=2A; V
OUT
Tj= -40°C
= 25°C...150°C
T
j
10/37 Doc ID 12272 Rev 9
=0.5V;V
=0V;
SENSE
SENSE
SENSE
=0V;
CSD
=0.5V;V
= 0.5V;
=4V;V
CSD
CSD
=0V;
=0V;
1270 2360 3450
1470
2020
2610
1570
2020
2470
-7 +7 %
1740
2020
2320
1790
2020
2250
VND5050AJ-E / VND5050AK-E Electrical specifications
Table 10. Current sense (8V<VCC<16V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
dK2/K
K
dK
3/K3
I
SENSE0
I
OL
V
SENSE
Current sense ratio
(1)
2
drift
I
3
OUT/ISENSE
Current sense ratio
(1)
drift
Analog sense
leakage current
Openload on-state
current detection
threshold
Max analog sense
output voltage
=2 A; V
I
OUT
V
CSD
=-40 °C to 150 °C
T
J
I
=4A; V
OUT
=-40°C
T
j
SENSE
=0V;
SENSE
Tj=25°C...150°C
=4 A; V
I
OUT
V
CSD
=-40 °C to 150 °C
T
J
=0A; V
I
OUT
V
CSD
=-40°C...150°C
T
j
V
CSD
=-40°C...150°C
T
j
=2A; V
I
OUT
V
CSD
=-40°C...150°C
T
j
VIN = 5V, I
I
=4A; V
OUT
SENSE
=0V;
SENSE
=5V; VIN=0V;
=0V; VIN=5V;
SENSE
=5V; VIN=5V;
SENSE
CSD
= 4 V;
-4 +4 %
=4V;V
CSD
=0V;
1880
1900
2010
2010
2160
2120
= 4 V;
-2 +2 %
=0V;
0
0
1
2
=0V;
0
1
= 5 µA 4 20 mA
=0V 5 V
µA
µA
µA
Analog sense
V
SENSEH
output voltage in
over temperature
V
CC
=13V; R
=10KΩ 9V
SENSE
condition
Analog sense
I
SENSEH
output current in
over temperature
V
CC
=13V; V
=5V 8 mA
SENSE
condition
Delay response
t
DSENSE1H
time from falling
edge of CS_DIS
pin
Delay response
t
DSENSE1L
time from rising
edge of CS_DIS
pin
t
DSENSE2H
Delay response
time from rising
edge of INPUT pin
V
I
(see Figure 4)
V
I
(see Figure 4)
V
I
(see Figure 4)
<4V, 0.5A<Iout<4A
SENSE
=90% of I
SENSE
<4V, 0.5A<Iout<4A
SENSE
=10% of I
SENSE
<4V, 0.5A<Iout<4A
SENSE
=90% of I
SENSE
SENSE max
SENSE max
SENSE max
50 100 µs
520µs
80 250 µs
Doc ID 12272 Rev 9 11/37
Electrical specifications VND5050AJ-E / VND5050AK-E
Table 10. Current sense (8V<VCC<16V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Delay response
V
I
SENSE
I
OUT
I
OUTMAX
V
I
SENSE
(see Figure 4)
Δt
DSENSE2H
t
DSENSE2L
time between rising
edge of output
current and rising
edge of current
sense
Delay response
time from falling
edge of INPUT pin
1. Parameter guaranteed by design; it is not tested.
<4V,
SENSE
= 90% of I
= 90% of I
=2A (see Figure 5)
<4V, 0.5A<Iout<4A
SENSE
=10% of I
SENSEMAX,
OUTMAX
SENSE max
Figure 4. Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
t
DSENSE2H
t
DSENSE1L
t
DSENSE1H
65 µs
100 250 µs
t
DSENSE2L
12/37 Doc ID 12272 Rev 9
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