ST VND5025AK-E User Manual
Features
Max transient supply voltage V
Operating voltage range V
Max on-state resistance (per ch.) R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected.
■ Main
– In-rush current active management by
power limitation
– Very low standby current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
– Package: ECOPACK
■ Diagnostic functionsDoc ID 12581
– Proportional load current sense
– High current sense precision for wide range
currents
– Current sense disable
– Thermal shutdown indication
– Very low current sense leakage
■ Protection
– Undervoltage shut-down
– Overvoltage clamp
– Load current limitation
– Self-limiting of fast thermal transients
– Protection against loss of ground and loss
of V
– Thermal shutdown
– Reverse battery protection (see Application
Table 1. Device summary
CC
schematic on page 21)
Package
PowerSSO-24™ VND5025AK-E VND5025AKTR-E
VND5025AK-E
Double channel high side driver with analog
current sense for automotive applications
CC
CC
ON
LIMH
S
®
41V
4.5 to 36V
25 mΩ
41 A
(1)
2 µA
PowerSSO-24™
– Electrostatic discharge protection
Application
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VND5025AK-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology, intended for driving resistive or
inductive loads with one side connected to
ground, and suitable for driving LEDs. Active V
pin voltage clamp protects the device against low
energy spikes (see ISO7637 transient
compatibility table). This device integrates an
analog current sense which delivers a current
proportional to the load current (according to a
known ratio) when CS_DIS is driven low or left
open. When CS_DIS is driven high, the
CURRENT SENSE pin is in a high impedance
condition. Output current limitation protects the
device in overload condition. In case of long
overload duration, the device limits the dissipated
power to safe level up to thermal shut-down
intervention. Thermal shut-down with automatic
restart allows the device to recover normal
operation as soon as fault condition disappears.
Order codes
Tube Tape and reel
CC
July 2009 Doc ID 12581 Rev 10 1/32
www.st.com
1
Contents VND5025AK-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 22
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-24™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/32 Doc ID 12581 Rev 10
VND5025AK-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8V < VCC < 16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Doc ID 12581 Rev 10 3/32
List of figures VND5025AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Delay response time between rising edge of output current and rising edge of Current Sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. IOUT/ISENSE vs IOUT
Figure 8. Maximum current sense ratio drift vs load current
Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
Figure 28. PowerSSO-24™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 24
Figure 30. PowerSSO-24™ thermal impedance junction to ambient single pulse (one channel ON) . 25
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24™
Figure 32. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 33. PowerSSO-24™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 34. PowerSSO-24™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
(1)
. . . . . . . . . . . . . . . 25
4/32 Doc ID 12581 Rev 10
VND5025AK-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
Vcc
V
CC
CLAMP
GND
INPUT1
LOGIC
INPUT2
CS_DIS
Table 2. Pin functions
Name Function
V
CC
OUTPUT
GND
INPUT
1,2
1,2
Battery connection.
Power output.
Ground connection; must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible; controls
output switch state.
DRIVER 1
Pwr
LIM
Pwr
I
OUT1
UNDERVOLTAGE
PwCLAMP 1
I
V
DSLIM
1
LIM
OVERTEMP. 1
K 1
2
LIM
OUTPUT1
CURRENT
SENSE1
1
1
DRIVER 2
PwCLAMP 2
I
2
LIM
V
2
DSLIM
OUTPUT2
CURRENT
SENSE2
OVERTEMP. 2
I
OUT2
K 2
CURRENT SENSE
Analog current sense pin; delivers a current proportional to the load
1,2
current.
CS_DIS Active high CMOS compatible pin to disable the current sense pin.
Doc ID 12581 Rev 10 5/32
Block diagram and pin description VND5025AK-E
Figure 2. Configuration diagram (top view)
V
CC
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
CURRENT SENSE1
N.C.
CURRENT SENSE2
CS_DIS.
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
TAB = V
Table 3. Suggested connections for unused and not connected pins
CC
Connection / pin Current sense N.C. Output Input CS_DIS
Floating N.R.
To Ground Through 1kΩ resistor X N.R.
(1)
XX X X
Through 10kΩ
resistor
Through 10kΩ
resistor
1. Not recommended.
6/32 Doc ID 12581 Rev 10
VND5025AK-E Electrical specification
2 Electrical specification
Figure 3. Current and voltage conventions
I
S
V
V
CSD
CC
I
I
CSD
CS_DIS
I
IN1
V
IN1
I
IN2
INPUT1
INPUT2
V
IN2
GND
OUTPUT1
CURRENT
SENSE1
OUTPUT2
CURRENT
SENSE2
I
GND
OUT1
I
SENSE1
I
OUT2
I
SENSE2
V
SENSE2
V
OUT2
V
SENSE1
V
F
V
OUT1
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 4. Absolute maximum ratings
Symbol Parameter Value Unit
V
-V
-I
GND
I
OUT
- I
OUT
I
CSD
-I
CSENSE
V
CSENSE
DC supply voltage 41
CC
Reverse DC supply voltage 0.3
CC
DC reverse ground pin current 200 mA
DC output current Internally limited
Reverse DC output current 24
DC input current
IN
DC current sense disable input current
DC reverse CS pin current 200
Current sense maximum voltage VCC- 41 to +V
-1 to 10
CC
V
A
mAI
V
Doc ID 12581 Rev 10 7/32
Electrical specification VND5025AK-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Maximum switching energy (single pulse)
E
MAX
(L = 0.8mH; R
I
OUT
= I
limL
L
(Typ.))
=0Ω; V
= 13.5V; T
bat
jstart
= 150°C;
140 mJ
Electrostatic discharge
(Human Body Model: R = 1.5kΩ; C = 100pF)
4000
2000
4000
5000
5000
V
V
V
V
V
°C
V
V
ESD
ESD
T
T
- Input
- Current sense
- CS_DIS
- Output
- V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150
j
Storage temperature -55 to 150
stg
2.2 Thermal data
Table 5. Thermal data
Symbol Parameter Max Value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (MAX) (with one channel ON) 1.35
°C/W
Thermal resistance junction-ambient (MAX) See Figure 29
8/32 Doc ID 12581 Rev 10
VND5025AK-E Electrical specification
2.3 Electrical characteristics
8V<VCC<36V; -40°C<Tj<150°C, unless otherwise specified.
Table 6. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
I
L(off)
V
Operating supply voltage 4.5 13 36
CC
Undervoltage shutdown 3.5 4.5
USD
Undervoltage shut-down
hysteresis
On-state resistance
ON
Clamp voltage IS= 20 mA 41 46 52 V
Supply current
I
S
Off-state output current
Output - VCC diode
voltage
(1)
F
1. For each channel.
2. PowerMOS leakage included.
(1)
I
=3A; Tj=25°C 25
OUT
=3A; Tj=150°C 50
OUT
I
=3A; VCC=5V; Tj=25°C 35
OUT
Off-state; V
VIN=V
CC
OUT=VSENSE=VCSD
On-state; VCC= 13V;
=5V; I
V
(1)
IN
VIN=V
V
CC
V
IN=VOUT
V
CC
-I
OUT
OUT
OUT
=13V; Tj= 25°C
=13V; Tj= 125°C
=4A; Tj= 150°C 0.7 V
= 13V; Tj=25°C;
=0A
=0V;
=0V;
=0V
V
0.5
mΩI
(2)
(2)
5
2
µA
36mA
00.01 3
µA
05
Table 7. Switching (VCC=13V; Tj= 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
(dV
OUT
(dV
OUT
W
ON
W
OFF
Turn-on delay time
Turn-off delay time 50
=4.3Ω
R
L
(see Figure 6)
/dt)onTurn-on voltage slope
=4.3Ω
R
/dt)
Turn-off voltage slope See Figure 22
off
L
Switching energy losses
during t
Switching energy losses
during t
ON
W
RL=4.3Ω
(see Figure 6)
OFF
W
35
µs
See Figure 21
V/µs
0.45
mJ
0.35
Doc ID 12581 Rev 10 9/32
Electrical specification VND5025AK-E
Table 8. Logic input
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
ICL
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL
Table 9. Protection and diagnostics
Input low level voltage 0.9 V
Low level input current VIN=0.9V 1 µA
Input high level voltage 2.1 V
High level input current VIN=2.1V 10 µA
Input hysteresis voltage 0.25
Input clamp voltage
IN
I
= -1mA -0.7
IN
VV
I
=1mA 5.5 7
CS_DIS low level voltage 0.9
Low level CS_DIS current V
=0.9V 1 µA
CSD
CS_DIS high level voltage 2.1 V
High level CS_DIS current V
=2.1V 10 µA
CSD
CS_DIS hysteresis voltage 0.25
I
CS_DIS clamp voltage
(1)
=1mA 5.5 7
CSD
= -1mA -0.7
I
CSD
V
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
= 13V 29 41
I
LIMH
I
LIML
T
T
T
T
HYST
V
DEMAG
V
TSD
RS
ON
DC short circuit current
Short circuit current
during thermal cycling
Shutdown temperature 150 175 200
Reset temperature TRS+1 TRS+5
R
Thermal reset of STATUS 135
Thermal hysteresis
(T
TSD-TR
)
Turn-off output voltage
clamp
Output voltage drop
limitation
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
CC
5V < V
CC
< 36V
VCC= 13V;
TR<Tj<T
I
OUT
V
IN
TSD
=2A;
=0;
L=6mH
= 0.20.1A;
I
OUT
= -40°C to +150°C
T
j
(see Figure 9)
57
A
16
°C
7
VCC-41 VCC-46 VCC-52 V
25 mV
10/32 Doc ID 12581 Rev 10
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