ST VND5012AK-E User Manual

Features
VND5012AK-E
Double channel high side driver with analog current sense
for automotive applications
Max supply voltage V
Operating voltage range V
Max on-state resistance (per ch.)
Current limitation (typ) I
Off-state supply current (typ.) I
1. Typical value with all loads connected.
General features
power limitation – Very low standby current – 3.0 V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC
european directive
Diagnostic functions
– Proportional load current sense – High current sense precision for wide range
currents – Current sense disable – Thermal shutdown indication – Very low current sense leakage
Protections
– Undervoltage shutdown – Overvoltage clamp – Output stuck to Vcc detection – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss
of V
CC
– Thermal shutdown
Table 1. Device summary
Package
PowerSSO-24 VND5012AK-E VND5012AKTR-E
CC
CC
R
ON
LIMH
S
41 V
4.5 to 36 V
12 mΩ
60 A
(1)
2µA
PowerSSO-24
– Reverse battery protection (see Application
schematic)
– Electrostatic discharge protection
Application
All types of resistive, inductive and capacitive
loads
Description
The VND5012AK-E a monolithic device made using STMicroelectronics VIPower M0-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V device against low energy spikes (see ISO7637 transient compatibility table). This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as fault condition disappears.
Order codes
Tub e Tap e a nd reel
pin voltage clamp protects the
CC
December 2009 Doc ID 12285 Rev 7 1/31
www.st.com
1
Contents VND5012AK-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 GND Protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 22
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 PowerSSO-24 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31 Doc ID 12285 Rev 7
VND5012AK-E List of tables
List of tables
Table 2. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC=13V; Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8V<V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 15. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 16. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
Doc ID 12285 Rev 7 3/31
List of figures VND5012AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. I
OUT/ISENSE
Figure 7. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17. On-state resistance vs T Figure 18. On-state resistance vs V
Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. I
LIMH
vs T
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
Figure 28. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 24
Figure 30. PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) . . . . . 25
Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 33. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 34. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
vs I
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4/31 Doc ID 12285 Rev 7
VND5012AK-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V
CC
Pwr
LIM
UNDERVOLTAGE
DRIVER 1
Pwr
1
LIM
OVERTEMP. 1
I
OUT1
2
PwCLAMP 1
K 1
I
V
DSLIM
LIM
1
1
DRIVER 2
I
OUT2
PwCLAMP 2
OVERTEMP. 2
K 2
V
CC
CLAMP
GND
INPUT1
INPUT2
CS_DIS

Table 2. Pin function

LOGIC
Name Function
V
CC
OUTPUT
GND
INPUT
CURRENT
SENSE
Battery connection.
Power output.
1,2
Ground connection. Must be reverse battery protected by an external diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
1,2
switch state.
Analog current sense pin, delivers a current proportional to the load current.
1,2
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
V
I
LIM
DSLIM
OUTPUT1
CURRENT SENSE1
OUTPUT2
2
2
CURRENT SENSE2
Doc ID 12285 Rev 7 5/31
Block diagram and pin description VND5012AK-E

Figure 2. Configuration diagram (top view)

V
CC
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
CURRENT SENSE1
N.C.
CURRENT SENSE2
CS_DIS
V
CC
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1
TAB = V

Table 3. Suggested connections for unused and not connected pins

Connection / pin Current Sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground
Through 1 KΩ
resistor
X Not allowed
Through 10 KΩ
CC
resistor
Through 10 KΩ
resistor
6/31 Doc ID 12285 Rev 7
VND5012AK-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
CC
I
I
CSD
V
CSD
I
IN1
V
IN1
I
IN2
V
IN2
CS_DIS
INPUT1
INPUT2
GND
OUTPUT1
CURRENT SENSE1
OUTPUT2
CURRENT SENSE2
I
GND
OUT1
I
SENSE1
I
OUT2
I
SENSE2
V
SENSE2
V
OUT2
V
SENSE1
VF (*)
V
OUT1
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
Reverse DC output current -30 A
OUT
DC Input current -1 to 10 mA
I
IN
-V
-I
I
-I
V
OUT
I
CSD
-I
CSENSE
V
CSENSE
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
V
Current sense maximum voltage
CC
+V
-41
CC
V V
Doc ID 12285 Rev 7 7/31
Electrical specifications VND5012AK-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Maximum switching energy
E
V
V
MAX
(L=1.25 mH; R
= I
I
OUT
limL
(Typ.))
=0 Ω; V
L
=13.5 V; T
bat
jstart
=150 °C;
Electrostatic discharge (Human body model: R= 1.5 KΩ; C= 100 pF) – INPUT – CURRENT SENSE
ESD
–CS_DIS –OUTPUT –V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
ESD
Junction operating temperature -40 to 150 °C
T
j
508 mJ
4000 2000 4000 5000 5000
V V V V V
T
stg

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Max value Unit
R
thj-case
R
thj-amb
Storage temperature -55 to 150 °C
Thermal resistance junction-case (max) (With one channel on)
0.4 °C/W
Thermal resistance junction-ambient (max) See Figure 29 °C/W
8/31 Doc ID 12285 Rev 7
VND5012AK-E Electrical specifications

2.3 Electrical characteristics

8V<VCC<36V; -40°C<Tj<150°C, unless otherwise specified.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
USD
V
USDhyst
R
V
clamp
I
L(off)
V
Operating supply voltage 4.5 13 36 V
CC
Undervoltage shutdown 3.5 4.5 V
Undervoltage shutdown hysteresis
On-state resistance
ON
Clamp voltage IS=20mA 41 46 52 V
I
Supply current
S
Off-state output
(2)
current
Output VCC diode voltage
(2)
F
1. PowerMOS leakage included.
2. For each channel.
I
=5A; Tj=25°C
OUT
(2)
=5A; Tj=150°C
I
OUT
I
=5A; VCC=5V; Tj=25°C
OUT
Off-state; V V
IN=VOUT=VSENSE=VCSD
CC
On-state; VCC=13V; VIN=5V;
=0A
I
OUT
VIN=V V
IN=VOUT
=0V; VCC=13V; Tj=25°C
OUT
=0V; VCC=13V;
Tj=125°C
-I
= 8A; Tj=150°C 0.7 V
OUT
=13V; Tj=25°C;
=0V
0.5 V
(1)
2
5
3
000.01 3
12
mΩ
24
mΩ
16
mΩ
(1)
6µAmA
A
Table 7. Switching (VCC=13V; Tj=25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
dV
OUT
dV
OUT
W
W
OFF
Turn-on delay time RL= 2.6 Ω (see Figure 8)20µs
Turn-off delay time RL= 2.6 Ω (see Figure 8)35µs
/dt
Turn-on voltage slope RL= 2.6 Ω See Figure 21 V/µs
(on)
/dt
Turn-off voltage slope RL= 2.6 Ω See Figure 22 V/µs
(off)
Switching energy losses
ON
during t
won
Switching energy losses during t
woff
RL= 2.6 Ω (see Figure 8)1.1mJ
RL= 2.6 Ω (see Figure 8)0.7mJ
Doc ID 12285 Rev 7 9/31
Electrical specifications VND5012AK-E

Table 8. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
V
I(hyst)
V
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL

Table 9. Protections and diagnostics

Input low level voltage 0.9 V
IL
Low level input current VIN=0.9 V 1 µA
IL
Input high level voltage 2.1 V
IH
High level input current VIN=2.1 V 10 µA
IH
Input hysteresis voltage 0.25 V
Input clamp voltage
ICL
I
=1 mA
IN
=-1 mA
I
IN
5.5
-0.7
CS_DIS low level voltage 0.9 V
Low level CS_DIS current V
=0.9 V 1 µA
CSD
CS_DIS high level voltage 2.1 V
High level CS_DIS current V
CS_DIS hysteresis voltage
CS_DIS clamp voltage
=2.1 V 10 µA
CSD
0.25 V
I
CSD
I
CSD
=1 mA =-1 mA
(1)
5.5
-0.7
7V
7V
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
=13 V
I
limH
I
limL
T
TSD
T
T
RS
T
HYST
V
DEMAG
V
ON
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
DC short circuit current
Short circuit current during thermal cycling
Shutdown temperature 150 175 200 °C
Reset temperature
R
Thermal reset of STATUS
Thermal hysteresis
TSD -TR
)
(T
Turn-off output voltage clamp
Output voltage drop limitation
CC
5V<V
V
CC
I
OUT
<36 V
CC
=13 V TR<Tj<T
=2 A; VIN=0;
L=6 mH
I
= 0.4 A;
OUT
= -40 °C...+150 °C
T
j
(see Figure 26)
TSD
42 60 84
84
24 A
TRS + 1 TRS + 5
135 °C
C
VCC-41 VCC-46 VCC-52
25 mV
A A
°C
V
10/31 Doc ID 12285 Rev 7
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