ST VN920DSP User Manual

VN920DSP
HIGH SIDE DRIVER
Table 1. General Features
Type R
VN920DSP 16 m
CMOS COMPATIBLE INPUT
ON STATE OPEN LO AD DETECTION
OFF STATE OPEN LOAD DETECTION
UNDERVOLTAGE AND OVERVOLTAGE
DS(on)
25 A 36 V
I
out
V
CC
SHUTDOWN
PROTECTIO N AGAINST LOSS OF GROUND
VERY LOW STAND-BY CURRENT
REVERSE BATTERY PROTECTION (*)
DESCRIPTION
The VN920DSP is a monolithic device made by using STMicroelectronics VIPower M0-3 Technology, intended f or driving any kind of l oad with one side connected to ground.
Activ e V
pin voltage clamp pro tects the device
CC
against low energy spikes (see ISO7637 transient compatibility table).
Figure 1. Package
10
1
PowerSO-10
Active current limitation combined with thermal shutdown and automatic restart protect the device against overload.
The device detects open load condition both is on and off state. Output shorted to V
is detected in
CC
the off state. Device automatically turns off in case of ground pin disconnection.
Table 2. Order Codes
Package Tube Tape and Reel
PowerSO-10
Note: (*) See appl i cation sch em atic at page 9
VN920DSP VN920DSP13TR
Rev. 2
1/19October 2004
VN920DSP
Figure 2. Block Diagram
V
CC
OVERVOLTAGE
DETECTION
UNDERVOLTAGE
DETECTION
Power CLAMP
DRIVER
CURRENT LIMITER
ON STATE OPENLOAD
DETECTION
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO V
DETECTION
OUTPUT
CC
GND
INPUT
STATUS
OVERTEMPERATURE
DETECTION
V
CC
CLAMP
LOGIC
Table 3. Absolute Maximum Ratings
Symbol Parameter Value Unit
V
DC Supply Voltage 41 V
CC
- V
- I
- I
I
V
E
Reverse DC Supply Voltage - 0.3 V
CC
DC Reverse Ground Pin Current - 200 mA
GND
I
DC Output Current Internally Limited A
OUT
Reverse DC Output Current - 25 A
OUT
I
DC Input Current +/- 10 mA
IN
DC Status Current +/- 10 mA
STAT
Electrostatic Disch arge (Huma n Body Model: R=1.5 KΩ; C=100pF)
- INPUT
- CURRENT SENSE
ESD
- OUTPUT
- V
CC
Maximum Switching Energy
MAX
(L=0.25mH; R
P
Power Dissipation TC=25°C 96.1 W
tot
T
Junction Operating Temperature Internally Limited °C
j
T
Case Operating Temperature - 40 to 150 °C
c
T
Storage Temperature - 55 to 150 °C
stg
=0; V
L
=13.5V; T
bat
=150ºC; IL=45A)
jstart
4000 4000 5000 5000
362 mJ
V V V V
2/19
VN920DSP
Figure 3. Con fig urat i on Dia g ra m (Top View) & Sugg est ed C o nnections for Unused and N.C. Pins
GROUND INPUT STA T US N.C. N.C.
V
CC
Connection / Pin Status N.C. Output Input
Floating X X X X To Ground X Th rough 10Kresistor
Figure 4. Current and Voltage Conventions
I
IN
V
IN
INPUT
CURRENT SENSE
GND
6 7 8 9
10
11
V
OUTPUT
CC
5 4 3 2 1
I
OUT
I
SENSE
V
SENSE
OUTPUT OUTPUT N.C. OUTPUT OUTPUT
I
S
V
F
V
OUT
V
CC
I
GND
Table 4. Thermal Data
Symbol Parameter Value Unit
R
R
Note:
Note:
thj-case
thj-amb
(1) (2)
Thermal Resistance Junction-case Max 1.3 °C/W
Thermal Resistance Junction-ambient Max 51.3
When mount ed on a standar d si ngle-sid ed F R-4 board with 0.5cm2 of Cu (at least 35µm thick).
When mounte d on a standar d si ngle-side d F R-4 board with 6 cm2 of Cu (at le ast 35µm thick).
(1)
37
(2)
°C/W
3/19
VN920DSP
ELECTRICAL CHARACTERISTICS
(8V<V
Table 5. Power
V
<36V; -40°C<Tj<150°C unless otherwise specified)
CC
Symbol Parameter Test Conditions Min Typ Max Unit
V
CC
V
USD
USDhyst
V
OV
R
ON
I
S
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Operating Supply Voltage 5.5 13 36 V Undervoltage Shut-down 3 4 5.5 V Undervoltage Shut-down
hysteresis
0.5 V
Overvoltage Shut-down 36 V
I
=10A; Tj=25°C
OUT
On State Resistance
=10A
I
OUT
=3A; VCC=6V
I
OUT
Off State; V
Supply Current
Off State; V
Tj=25°C
On State; V
Off State Output Current VIN=V
OUT
Off State Output Current VIN=0V; V Off State Output Current VIN=V Off State Output Current VIN=V
OUT OUT
=13V; VIN=V
CC
=13V; VIN=V
CC
OUT OUT
=0V =0V;
10
10
=13V; VIN=5V; I
CC
OUT
=0A
=0V 0 50 µA
=3.5V -75 0 µA
OUT
=0V; VCC=13V; Tj =125°C 5 µA =0V; VCC=13V; Tj =25°C 3 µA
16 30 50 25
20
5
m m m
µA
µA
mA
Table 6. Switching (V
CC
=13V)
Symbol Parameter Test Conditions Min Typ Max Unit
dV
dV
t
d(on)
t
d(off)
dt
dt
OUT
(on)
OUT
(off)
Turn-on Delay Time RL=1.3 50 µs Turn-off Delay Time RL=1.3 50 µs
/
Turn-on Voltage Slope RL=1.3
See
relative
diagram
/
Turn-off Voltage Slope RL=1.3
See
relative
diagram
Table 7. Input Pin
Symbol Parameter Test Conditions M in Typ Max Unit
V
V
V
I
IL
V
IH
I
IH
I(hyst)
ICL
Input Low Level 1.25 V
IL
Low Level Input Current VIN=1.25V 1 µA Input High Level 3.25 V High Level Input Current VIN=3.25V 10 µA Input Hysteresis Voltage 0.5 V
Input Clamp Voltage
I
IN
I
IN
=1mA =-1mA
6 6.8
-0.7
8V
V/µs
V/µs
V
4/19
VN920DSP
ELECTRICAL CHARACTERISTICS (continued) Table 8. VCC - Output Diode
Symbol Parameter Test Conditions Min Typ Max Unit
V
Table 9. Status Pin
Symbol Parameter Test Conditions Min Typ Max Unit
V
STAT
I
LSTAT
C
STAT
V
SCL
Table 10. Protections (see note 1)
Symbol Parameter Test Conditions Min Typ Max Unit
T
TSD
T
T
hyst
t
SDL
I
lim
V
demag
Forward on Voltage -I
F
Status Low Output Voltage I Status Leakage Current Normal Operation V Status Pin Input
Capacitance Status Clamp Voltage
=5A; Tj=150°C 0.6 V
OUT
=1.6mA 0.5 V
STAT
=5V 10 µA
STAT
Normal Operation V I
=1mA
STAT
=-1mA
I
STAT
=5V 100 pF
STAT
66.8
-0.7
Shut-down Temperature 150 175 200 °C Reset Temperature 135 °C
R
Thermal Hysteresis 7 15 °C Status delay in overload
condition Current limitation Turn-off Output Clamp
Voltage
T
j>TTSD
30 45 75
5.5V<V I
OUT
<36V
CC
=2A; VIN=0V; L=6mH VCC-41 VCC-48 VCC-55 V
8V
20 µs
75
V
A A
Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles.
Table 11. Openload Detection
Symbol Parameter Test Conditions Min Typ Max Unit
I
OL
t
DOL(on)
V
OL
t
DOL(off)
Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Threshold Openload Detection Delay
at Turn Off
=5V 300 500 700 mA
V
IN
=0A 200 µs
I
OUT
=0V 1.5 2.5 3.5 V
V
IN
1000 µs
5/19
VN920DSP
Figure 5.
OPEN LOAD STATUS TIMING (with external pull-up)
V
> V
V
V
IN
ST AT
t
DOL(off)
OUT
OL
Figure 6. Switching time Waveforms
V
OUT
I
OUT
t
DOL(on)
< I
OL
V
V
IN
STA T
OVERTEMP ST ATUS TIMING
Tj > T
TSD
t
SDL
t
SDL
6/19
90%
80%
dV
/dt
OUT
dV
OUT
/dt
(on)
(off)
10%
t
V
IN
t
d(on)
t
d(off)
t
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