ST VN920 User Manual

Single channel high-side solid-state relay

Features

Type R

VN920
VN920-B5
VN920SO

■ CMOS compatible input

■ Proportional load current sense

■ Shorted load protection

■ Under-voltage and over-voltage shutdown

■ Over-voltage clamp

■ Thermal shutdown

■ Current limitation

■ Protection against loss of ground and loss of

V

CC

■

Very low standby power dissipation

■ Reverse battery protected (see Application

schematic

DS(on)

16 mΩ 30 A 36 V

)

I

OUT

V

CC

VN920

PENTAWATT

Description

SO-16L

The VN920 is a monolithic device designed in
STMicroelectronics VIPower M0-3 technology.
The VN920 is intended for driving any type of load
with one side connected to ground. The active
V

pin voltage clamp protects the device against

CC

low energy spikes (see ISO7637 transient
compatibility table). Active current limitation
combined with thermal shutdown and automatic
restart protects the device against over-load.

The device integrates an analog current sense
output which delivers a current proportional to the
load current. The device automatically turns off in
the case where the ground pin becomes
disconnected.

P2PAK

Table 1. Device summary

Order codes

Package

Tube Tape and reel

PENTAWATT VN920 -

2

P

PAK VN920-B5 VN920-B513TR

SO-16L VN920SO VN920SO13TR

December 2008 Rev 5 1/34

www.st.com

34

Contents VN920

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.4 P

2

PAK maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . 18

3.5 SO-16L maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . 19

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.2 P

2

PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.2 PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.3 P

5.4 SO-16L packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

5.5 PENTAWATT packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

5.6 P

2

PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2

PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

2/34

VN920 List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Switching (V

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. Current sense (9V ≤ VCC ≤ 16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 9. V

output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

CC

Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 13. SO-16L thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 14. P

2

PAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 15. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 16. PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 17. P

2

PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

=13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

CC

3/34

List of figures VN920

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. I

OUT/ISENSE

Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 11. Over-voltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 14. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 15. Input high-level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 19. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 20. P

2

PAK maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 21. SO-16L maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 22. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 23. SO-16L Rthj-amb Vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . 20

Figure 24. SO-16L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 25. Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 26. P
Figure 27. P
Figure 28. P

2

PAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2

PAK Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . 23

2

PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 29. Thermal fitting model of a single channel HSD in P

Figure 30. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 31. PENTAWATT package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 32. P

2

PAK package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 33. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 34. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 35. PENTAWATT tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 36. P
Figure 37. P

2

PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

2

PAK tape and reel (suffix “13TR”). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

versus I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

OUT

2

PAK. . . . . . . . . . . . . . . . . . . . . . . . . . 24

4/34

VN920 Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

V

CC

CLAMP

GND

INPUT

LOGIC

OVERTEMPERATURE

DETECTION

OVERVOLTAGE

DETECTION

UNDERVOLTAGE

Figure 2. Configuration diagram (top view)

5

OUTPUT

4

C.SENSE

3

V

CC

2

INPUT

1

GND

P2PAK/ PENTAWATT

DETECTION

DRIVER

V

N.C.

GND

INPUT

C.SEN SE

N.C.

N.C.

V

Powe r CLAMP

OUTPUT

CURRENT LIMITER

VDS LIMITER

I

OUT CURRENT

CC

CC

K

1

8

16

9

V

CC

OUTPUT

OUTPUT

OUTPUT

OUTPUT

OUTPUT

OUTPUT

V

CC

SENSE

SO-16L

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current Sense N.C. Output Input

Floating X X X

To ground

Through 1KΩ

resistor

X

Through 10KΩ

5/34

resistor

Electrical specifications VN920

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

I

IN

V

IN

INPUT

CURRENT SENSE

2.1 Absolute maximum ratings

GND

CC

OUTPUT

I

GND

I

OUT

I

SENSE

V

SENSE

V

F

V

OUT

V

CC

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to Absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics sure
program and other relevant quality document.

Table 3. Absolute maximum ratings

Val ue

Symbol Parameter

V

- V

- I

I

OUT

- I

I

V

CSENSE

DC supply voltage 41 V

CC

Reverse DC supply voltage - 0.3 V

CC

DC reverse ground pin current - 200 mA

gnd

DC output current Internally limited A

Reverse DC output current - 21 A

OUT

DC input current +/- 10 mA

IN

Current sense maximum voltage

Electrostatic discharge
(human body model: R = 1.5KΩ;

C = 100pF)

V

ESD

INPUT
CURRENT SENSE
OUTPUT
V

CC

SO-16L PENTAWATT P

- 3

+ 15

4000
2000
5000
5000

2

PAK

Unit

V
V

V
V
V
V

6/34

VN920 Electrical specifications

Table 3. Absolute maximum ratings (continued)

Val ue

Symbol Parameter

Maximum switching energy

E

MAX

(L = 0.25mH; R

= 13.5V; T

V

bat

= 0Ω;

L

jstart

= 150ºC;

IL = 45A)

2

SO-16L PENTAWATT P

PAK

352 364 mJ

Unit

P

T

T

Power dissipation TC ≤ 25°C 8.3 96.1 96.1 W

tot

Junction operating temperature Internally limited °C

T

j

Case operating temperature - 40 to 150 °C

c

Storage temperature - 55 to 150 °C

stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter

R

thj-case

R

thj-lead

R

thj-amb

1.

When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins.

2. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick).

3. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35µm thick) connected to all VCC pins.

4. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35µm thick).

Thermalresistance
junction-case

Thermalresistance
junction-lead

Thermalresistance
junction-ambient

Max. value

Unit

SO-16L PENTAWATT P

2

PAK

-1.31.3°C/W

15 - °C/W

65

48

(1)

(3)

61.3

51.3

37

(4)

(2)

°C/W

°C/W

7/34

Electrical specifications VN920

2.3 Electrical characteristics

Values specified in this section are for 8V < V

< 36V; -40°C < Tj < 150°C, unless otherwise

CC

stated.

Table 5. Power

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

R

V

CLAMP

I

L(off1)

I

L(off2)

I

L(off3)

Operating supply voltage 5.5 13 36 V

CC

Under-voltage shutdown 3 4 5.5 V

USD

Over-voltage shutdown 36 V

OV

I

= 10A; Tj = 25°C;

OUT

On-state resistance

ON

Clamp voltage I

Supply current

I

S

Off-state output current V

Off-state output current V

Off-state output current

I

= 10A;

OUT

= 3A; V

I

OUT

= 20mA 41 48 55 V

CC

Off-state; V

= V

V

IN

OUT

Off-state; V

= V

V

IN

OUT

On-state; V

= 0A; R

I

OUT

= V

IN

OUT

= 0V; V

IN

V

= V

IN

OUT

= 6V

CC

= 13V;

CC

= 0V

= 13V;

CC

= 0V; Tj = 25°C

= 13V; V

CC

SENSE

= 5V;

IN

= 3.9 kΩ

= 0V 0 50 µA

= 3.5V -75 0 µA

OUT

= 0V; V

CC

= 13V;

Tj = 125°C

16
32
55

101025

20

5

5µA

mΩ
mΩ
mΩ

µA

µA

mA

V

= V

IN

Tj = 25°C

Note: V

I

L(off4)

CLAMP

Table 6. Switching (VCC=13V)

Off-state output current

and VOV are correlated. Typical difference is 5V.

Symbol Parameter Test conditions Min. Typ. Max. Unit

Turn-on delay time RL = 1.3Ω (see Figure 4.)50µs

Turn-off delay time RL = 1.3Ω (see Figure 4.)50µs

/dt

Turn-on voltage slope RL = 1.3Ω (see Figure 4.) See Figure 10. V/µs

(on)

/dt

Turn-off voltage slope RL = 1.3Ω (see Figure 4.) See Figure 12. V/µs

(off)

dV

dV

t

d(on)

t

d(off)

OUT

OUT

8/34

OUT

= 0V; V

CC

= 13V;

3µA

VN920 Electrical specifications

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

I(hyst)

V

Table 8. Current sense (9V ≤ V

Input low level voltage 1.25 V

IL

Low level input current V

I

IL

Input high-level voltage 3.25 V

IH

I

High-level input current V

IH

= 1.25V 1 µA

IN

= 3.25V 10 µA

IN

Input hysteresis voltage 0.5 V

Input clamp voltage

ICL

CC

≤ 16V)

I

IN

= - 1mA

I

IN

= 1mA

66.8

- 0.7

8V

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

dK

dK

K

1

1/K1

K

2

2/K2

K

3

I

OUT/ISENSE

Current sense
ratio drift

I

OUT/ISENSE

Current sense
ratio drift

I

OUT/ISENSE

= 1A; V

OUT

= -40°C...150°C

T

j

= 1A; V

I

OUT

= - 40°C...150°C

T

j

I

= 10A; V

OUT

= - 40°C

T

j

= 25°C...150°C

T

j

= 10A; V

I

OUT

= -40°C...150°C

T

j

I

= 30A; V

OUT

= -40°C

T

j

Tj = 25°C...150°C

SENSE

SENSE

SENSE

SENSE

SENSE

= 0.5V;

= 0.5V;

= 4V;

= 4V;

= 4V;

3300 4400 6000

-10 +10 %

4200

4900

6000

4400

4900

5750

-8 +8 %

4200

4900

5500

4400

4900

5250

V

dK

3/K3

I

SENSE0

V

SENSE

V

SENSEH

Current sense
ratio drift

Analog sense
current

Max analog
sense output
voltage

Sense voltage in
over-temperature
condition

= 30A; V

I

OUT

= -40°C...150°C

T

j

= 6...16V; I

V

CC

V
T

V
R
V
R

V

= 0V;

SENSE

= -40°C...150°C 0 10 µA

j

= 5.5V; I

CC

= 10kΩ

SENSE

> 8V, I

CC

SENSE

CC

OUT

= 10kΩ

= 13V; R

= 4V;

SENSE

OUT

OUT

= 0A;

= 5A;

-6 +6 %

2

= 10A;

4

= 3.9kΩ 5.5 V

SENSE

9/34

V

V

Electrical specifications VN920

Table 8. Current sense (9V ≤ V

≤ 16V) (continued)

CC

Symbol Parameter Test conditions Min. Typ. Max. Unit

Analog sense

R

VSENSEH

output
impedance in
over-temperature

= 13V; Tj > T

V

CC

output open

TSD

;

400 Ω

condition

t

DSENSE

Current sense
delay response

To 9 0 % I

1. Current sense signal delay after positive input slope.

Table 9. VCC output diode

SENSE

(1)

500 µs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

F

Table 10. Protections

Forward on voltage - I

(1)

= 5A; Tj = 150°C 0.6 V

OUT

Symbol Parameter Test conditions Min. Typ. Max. Unit

T

TSD

T

T

hyst

I

lim

V

demag

V

1. To ensure long term reliability under heavy over-load or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.

Shutdown temperature 150 175 200 °C

Reset temperature 135 °C

R

Thermal hysteresis 7 15 °C

V

Current limitation

Turn-off output clamp
voltage

Output voltage drop

ON

limitation

= 13V

CC

5V < V

I

OUT

V

CC

IN

< 36V

= 2 A;

= 0V;

L = 6mH

= 1 A;

I

OUT

= -40°C...150°C

T

j

30 45 75

V

CC

- 41 V

CC

- 48 V

50 mV

75

- 55 V

CC

A
A

10/34

VN920 Electrical specifications

Table 11. Truth table

Conditions Input Output Sense

Normal operation

Over-temperature

Under-voltage

Over-voltage

Short circuit to GND

Short circuit to V

CC

L
H

L
H

L
H

L
H

L
H
H

L
H

L

H

L
L

L
L

L
L

L
L
L

H
H

Nominal

V

SENSEH

(T

(T

j>TTSD

< Nominal

0

0

0
0

0
0

0

j<TTSD

) V

0

) 0

SENSEH

Negative output voltage clamp L L 0

Table 12. Electrical transient requirements

ISO T/R

Test level

7637/1

Test pulse

1- 25V

2 + 25V

3a - 25V

3b + 25V

4- 4V

5+ 26.5V

1. All functions of the device are performed as designed after exposure to disturbance.

2. One or more functions of the device is not performed as designed after exposure and cannot be returned to
proper operation without replacing the device.

I II III IV Delays and impedance

(1)

(1)

(1)

(1)

(1)

(1)

- 50V

+ 50V

- 50V

+ 50V

- 5V

+ 46.5V

(1)

(1)

(1)

(1)

(1)

(2)

- 75V

+ 75V

- 100V

+ 75V

- 6V

+ 66.5V

(1)

(1)

(1)

(1)

(1)

(2)

- 100V

+ 100V

- 150V

+ 100V

- 7V

+ 86.5V

(1)

(1)

(1)

(1)

(1)

(2)

2ms, 10Ω

0.2ms, 10Ω

0.1µs, 50Ω

0.1µs, 50Ω

100ms, 0.01Ω

400ms, 2Ω

11/34

Electrical specifications VN920

Figure 4. Switching characteristics

V

OUT

Figure 5. I

I

OUT/ISENSE

6500

dV

/dt

OUT

(on)

I

SENSE

INPUT

t

d(on)

OUT/ISENSE

80%

t

r

90%

t

DSENSE

versus I

OUT

10%

t

d(off)

90%

t

f

dV

OUT

/dt

(off)

t

t

t

6000

5500

max.Tj=25...150°C

5000

min.Tj=25...150°C

4500

4000

3500

3000

0 2 4 6 8 1012141618202224262830 32

12/34

I

OUT

max.Tj=-40°C

typical value

min.Tj=-40°C

(A)

VN920 Electrical specifications

Figure 6. Waveforms

NORMAL OPERATION

INPUT

LOAD CURRENT

SENSE

UNDERVOLTAGE

V

CC

INPUT

LOAD CURRENT

SENSE

V

CC

INPUT
LOAD CURRENT
SENSE

V

USD

V

VCC > V

OV

USD

V

USDhyst

OVERVOLTAGE

V

OVhys t

INPUT

LOAD CURRENT
LOAD VOLTAGE
SENSE

INPUT

LOAD VOLTAGE
LOAD CURRENT
SENSE

T

j

INPUT

LOAD CURRENT

SENSE

SHORT TO GROUND

SHORT TO V

<Nominal

T

TSD

T

R

OVERTEMPERATURE

CC

<Nominal

I

SENSE

=

V

SENSEH

R

SENSE

13/34

Electrical specifications VN920

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High-level input current

Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope

Vicl (V)

10

9.5

8.5

7.5

6.5

5.5

Iin =1mA

9

8

7

6

5

-50 -25 0 25 50 75 100 125 150 175

Tc (°C )

dVout/dt(on) (V/ms)

700

650

600

550

500

450

400

350

300

250

Vcc=13V

Rl=1.3Ohm

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC )

Figure 11. Over-voltage shutdown Figure 12. Turn-off voltage slope

Vov (V)

50

48

46

44

42

40

38

36

34

32

30

-50 -25 0 25 50 75 100 125 150 175

Tc (°C )

dVout/dt(off) (V/ms)

550

500

450

400

350

300

250

200

150

100

Vcc=13V

Rl=1.3Ohm

50

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

14/34

VN920 Electrical specifications

Figure 13. I

vs T

LIM

case

Ili m (A )

100

90

Vcc=13V

80

70

60

50

40

30

20

10

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 14. On-state resistance vs V

Ron (mOhm)

50

45

40

35

30

25

20

15

10

5

0

5 10152025303540

Tc = 150ºC

Tc = 25ºC

Tc = - 40ºC

Vcc (V)

Figure 15. Input high-level Figure 16. Input hysteresis voltage

Vih (V)

3.6

3.4

3.2

3

2.8

2.6

2.4

2.2

2

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vhyst (V)

1.5

1.4

1.3

1.2

1.1

1

0.9

0.8

0.7

0.6

0.5

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

CC

Figure 17. On-state resistance vs Tcase Figure 18. Input low level

Ron (mOhm)

50

45

40

35

30

25

20

15

10

5

0

Iout=10A

Vc c=8V ; 36V

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC )

15/34

Vil (V)

2.6

2.4

2.2

2

1.8

1.6

1.4

1.2

1

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Application information VN920

3 Application information

Figure 19. Application schematic

+5V

GND

V

CC

OUTPUT

D

GND

R

prot

INPUT

R

µ

C

prot

R

SENSE

CURRENT SENSE

V

GND

R

GND

3.1 GND protection network against reverse battery

3.1.1 Solution 1: resistor in the ground line (R

This can be used with any type of load.

GND

only)

D

ld

The following is an indication on how to dimension the R

1. R

2. R

where - I

≤ 600mV / (I

GND

≥ (- VCC) / (- I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

).

)

maximum rating section of the device datasheet.

Power Dissipation in R

P

= (- VCC)2/ R

D

GND

GND

(when V

CC

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground then the
R

will produce a shift (I

GND

S(on)max

* R

GND

values. This shift will vary depending on how many devices are ON in the case of several
high-side drivers sharing the same R

GND

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).

16/34

resistor.

GND

< 0: during reverse battery situations) is:

S(on)max

becomes the sum of the

) in the input thresholds and the status output

.

VN920 Application information

3.1.2 Solution 2: diode (D

A resistor (R

= 1kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈ 600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.

Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.

Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

max DC rating. The same applies if the device is subject to transients on the VCC line

CC

that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/Os pins to latch-up.

if the device drives an

GND

prot

) in line to

The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.

-V

CCpeak/Ilatchup

≤ R

prot

≤ (V

OHµC-VIH-VGND

) / I

IHmax

Calculation example:

For V

5kΩ ≤ R

Recommended values: R

CCpeak

prot

≤ 65kΩ.

= - 100V and I

latchup

=10kΩ .

prot

≥ 20mA; V

OHµC

≥ 4.5V

17/34

Application information VN920

3.4

P2PAK

Figure 20.

LMAX (A)

I

maximum demagnetization energy (VCC = 13.5V)

P2PAK

100

10

1

maximum turn-off current versus inductance

A

B

C

0.01 0.1 1 10 100

L(mH)

A: T

B: T

C: T

VIN, I

= 150°C single pulse

jstart

= 100°C repetitive pulse

jstart

= 125°C repetitive pulse

jstart

L

Note: Values are generated with R

demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.

Demagnetization Demagnetization Demagnetization

=0 Ω. In case of repetitive pulses, T

L

(at beginning of each

jstart

t

18/34

VN920 Application information

3.5 SO-16L maximum demagnetization energy (V

Figure 21. SO-16L maximum turn-off current versus inductance

= 13.5V)

CC

A: T

B: T

C: T

VIN, I

= 150°C single pulse

jstart

= 100°C repetitive pulse

jstart

= 125°C repetitive pulse

jstart

L

Note: Values are generated with R

demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.

Demagnetization Demagnetization Demagnetization

=0 Ω. In case of repetitive pulses, T

L

(at beginning of each

jstart

t

19/34

Package and PCB thermal data VN920

4 Package and PCB thermal data

4.1 SO-16L thermal data

Figure 22. SO-16L PC board

Note: Layout condition of R

thickness = 2mm, Cu thickness = 35µm, Copper areas: 0.5cm

Figure 23. SO-16L R

RTH j-amb (°C/W)

70

65

60

55

50

45

40

01234567

and Zth measurements (PCB FR4 area = 41mm x 48mm, PCB

th

thj-amb

Vs PCB copper area in open box free air condition

2

, 6cm2).

PC B C u heats ink area (cm^2)

20/34

VN920 Package and PCB thermal data

Figure 24. SO-16L thermal impedance junction ambient single pulse

Equation 1

Z

THδ

where

: pulse calculation formula

R

TH

δ Z

THtp

1 δ–()+⋅=

δ tpT⁄=

Figure 25. Thermal fitting model of a single channel HSD in SO-16L

Tj

C1

R1 R2

Pd

C2

C3

R3

C4

R4

T_amb

C5

R5

C6

R6

21/34

Package and PCB thermal data VN920

Table 13. SO-16L thermal parameters

Area / island (cm2) Footprint 6

R1 (°C/W) 0.02

R2 (°C/W) 0.1

R3 (°C/W) 2.2

R4 (°C/W) 12

R5 (°C/W) 15

R6 (°C/W) 35 20

C1 (W.s/°C) 0.0015

C2 (W.s/°C) 7E-03

C3 (W.s/°C) 1.5E-02

C4 (W.s/°C) 0.14

C5 (W.s/°C) 1

C6 (W.s/°C) 5 8

4.2 P2PAK t h e r m al da t a

Figure 26. P2PAK P C b oa r d

Note: Layout condition of R

thickness = 2 mm, Cu thickness = 35µm , Copper areas: 0.97cm

and Zth measurements (PCB FR4 area = 60mm x 60mm, PCB

th

2

, 8cm2).

22/34

VN920 Package and PCB thermal data

0

)

Figure 27. P2PAK R

RTHj_amb (°C/W)

55

50

45

40

35

30

024681

Vs. PCB copper area in open box free air condition

thj-amb

Tj-Tamb=50°C

PCB Cu heatsink area (cm^2

2

Figure 28. P

PAK thermal impedance junction ambient single pulse

ZT H (°C /W)

1000

100

10

1

0.1

0.01

0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

0.97 cm

6 cm

2

2

23/34

Package and PCB thermal data VN920

Equation 2: pulse calculation formula

Z

THδ

where δ = t

R

TH

/T

P

δ Z

THtp

1 δ–()+⋅=

Figure 29. Thermal fitting model of a single channel HSD in P

Table 14. P2PAK thermal parameter

Area/island (cm2)0.976

R1 (°C/W) 0.02

2

PAK

R2 (°C/W) 0.1

R3 (°C/W) 0.22

R4 (°C/W) 4

R5 (°C/W) 9

R6 (°C/W) 37 22

C1 (W·s/°C) 0.0015

C2 (W·s/°C) 0.007

C3 (W·s/°C) 0.015

C4 (W·s/°C) 0.4

C5 (W·s/°C) 2

C6 (W·s/°C) 3 5

24/34

VN920 Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

Figure 30. SO-16L package dimensions

Table 15. SO-16L mechanical data

DIM.

Min. Typ. Max.

A 2.65

a1 0.1 0.2

a2 2.45

b 0.35 0.49

b1 0.23 0.32

C0.5

c1 45° (typ.)

mm.

25/34

Package and packing information VN920

Table 15. SO-16L mechanical data (continued)

mm.

DIM.

Min. Typ. Max.

D 10.1 10.5

E 10.0 10.65

e1.27

e3 8.89

F7.4 7.6

L 0.5 1.27

M 0.75

S 8° (max.)

5.2 PENTAWATT mechanical data

Figure 31. PENTAWATT package dimensions

26/34

VN920 Package and packing information

Table 16. PENTAWATT mechanical data

mm

Dim.

Min. Typ. Max.

A 4.8

C 1.37

D2.4 2.8

D1 1.2 1.35

E 0.35 0.55

F 0.8 1.05

F1 1 1.4

G3.23.43.6

G1 6.6 6.8 7

H2 10.4

H3 10.05 10.4

L17.85

L1 15.75

L2 21.4

L3 22.5

L5 2.6 3

L6 15.1 15.8

L7 6 6.6

M4.5

M1 4

Diam. 3.65 3.85

27/34

Package and packing information VN920

5.3 P2PAK mechanical data

Figure 32. P2PAK package dimensions

28/34

P010R

VN920 Package and packing information

Table 17. P2PAK mechanical data

mm

Dim.

Min. Typ. Max.

A 4.30 4.80

A1 2.40 2.80

A2 0.03 0.23

b 0.80 1.05

c 0.45 0.60

c2 1.17 1.37

D 8.95 9.35

D2 8.00

E 10.00 10.40

E1 8.50

e 3.20 3.60

e1 6.60 7.00

L 13.70 14.50

L2 1.25 1.40

L3 0.90 1.70

L5 1.55 2.40

R

0.40

V2 0º 8º

Package weight 1.40 Gr (typ)

29/34

Package and packing information VN920

5.4 SO-16L packing information

Figure 33. SO-16L tube shipment (no suffix)

Base Q.ty 50
Bulk Q.ty 1000

C

B

Tube length (± 0.5) 532
A 3.5
B 13.8
C (± 0.1) 0.6

A

All dimensions are in mm.

Figure 34. SO-16L tape and reel shipment (suffix “TR”)

Tape dimensions

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Reel dimensions

Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4

30/34

Top

cover

tape

500mm min

Empty components pockets
saled with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

VN920 Package and packing information

5.5 PENTAWATT packing information

Figure 35. PENTAWATT tube shipment (no suffix)

Base Q.ty 50
Bulk Q.ty 1000

B

C

A

Tube length (± 0.5) 532
A 18
B 33.1
C (± 0.1) 1

All dimensions are in mm.

5.6 P2PAK packing information

Figure 36. P2PAK tube shipment (no suffix)

Base Q.ty 50
Bulk Q.ty 1000

B

C

A

Tube length (± 0.5) 532
A 18
B 33.1
C (± 0.1) 1

All dimensions are in mm.

31/34

Package and packing information VN920

Figure 37. P2PAK tape and reel (suffix “13TR”)

REEL DIMENSIONS

All dimensions are in mm.

Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4

TAPE DIMENSIONS

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986

Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Top

cover

tape

500mm min

Empty components pockets
saled with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

32/34

VN920 Revision history

6 Revision history

Table 18. Document revision history

Date Revision Changes

22-Jun-2004 1 Initial release.

Current and voltage convention update (page 2).

07-Jul-2004 2

09-Jul-2004 3

03-May-2006 4 Suggested connections for unused and n.c.pins? correction (page 2).

17-Dec-2008 5

Configuration diagram (top view) & suggested connections for unused
and n.c. pins insertion (page 2).

6cm2 Cu condition insertion in thermal data table (page 3).

- output diode section update (page 5).

V

CC

Protections note insertion (page 5).
Revision history table insertion (page 24).
Disclaimers update (page 25).

Document reformatted and restructured.
Added content, list of figures and tables.

®

Added ECOPACK
Updated Figure 37.: P

packages information.

2

PAK tape and reel (suffix “13TR”): changed

component spacing (P) in tape dimensions table from 16 mm to 12
mm.

33/34

VN920

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34/34