VN800PS-E
High-side driver
Features
Type R
DS(on)
VN800PS-E 135 mΩ 0.7 A 36 V
■ ECOPACK
■ Automotive Grade: compliance with AEC
®
: lead free and RoHS compliant
guidelines
■ Very low standby current
■ CMOS compatible input
■ Thermal shutdown protection and diagnosis
■ Undervoltage shutdown
■ Overvoltage clamp
■ Load current limitation
■ Reverse battery protection
■ Electrostatic discharge protection
I
OUT
V
CC
SO-8
Description
The VN800PS-E is monolithic device made by
using STMicroelectronics™ VIPower™ M0-3
technology, intended for driving any kind of load
with one side connected to ground.
Active V
against low energy spikes. Active current
limitation combined with thermal shutdown and
automatic restart protect the device against
overload. Device automatically turns off in case of
ground pin disconnection.
pin voltage clamp protects the device
CC
This device is especially suitable for industrial
applications in norms conformity with IEC1131
(Programmable Controllers International
Standard).
Table 1. Device summary
Package
Tube Tape a n d reel
SO-8 VN800PS-E VN800PSTR-E
February 2011 Doc ID 15610 Rev 3 1/27
Order codes
www.st.com
1
Contents VN800PS-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 15
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 15
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 16
3.2 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 SO-8 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . 19
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2/27 Doc ID 15610 Rev 3
VN800PS-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Switching (V
Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. V
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 12. Electrical transient requirements on V
Table 13. Electrical transient requirements on V
Table 14. Electrical transient requirements on V
Table 15. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 16. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
= 24 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
pin (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
pin (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
pin (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
Doc ID 15610 Rev 3 3/27
List of figures VN800PS-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Status timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Peak short circuit current test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Avalanche energy test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13. On-state resistance vs T
Figure 14. On-state resistance vs V
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 18. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 20. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. I
LIM
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
case
Figure 22. SO-8 maximum turn off current versus load inductance. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. Demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 24. SO-8 PC board
Figure 25. SO-8 R
thj-amb
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . 20
Figure 26. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. Thermal fitting model of a single channel HSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 30. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
CC
4/27 Doc ID 15610 Rev 3
VN800PS-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
9
&&
29(592/7$*(
81'(592/7$*(
*1'
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Figure 2. Configuration diagram (top view)
9
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'(7(&7,21
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Table 2. Suggested connections for unused and not connected pins
Connection/pin Status N.C. Output Input
Floating X X X X
To ground X Through 10 KΩ resistor
Doc ID 15610 Rev 3 5/27
Electrical specifications VN800PS-E
2 Electrical specifications
Figure 3. Current and voltage conventions
,
6
9
,
,1
9
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,
67$7
9
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9
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2.1 Absolute maximum ratings
Table 3. Absolute maximum ratings
Symbol Parameter
V
CC
- V
- I
GND
I
OUT
- I
OUT
I
IN
V
IN
V
STAT
V
ESD
P
tot
E
MAX
DC supply voltage 41 V
Reverse DC supply voltage -0.3 V
CC
DC reverse ground pin current -200 mA
DC output current Internally limited A
Reverse DC output current -6 A
DC input current +/- 10 mA
Input voltage range -3/+V
DC status voltage +V
Electrostatic discharge (human body model: R = 1.5 KΩ;
C=100pF)
- Input
- Status
- Output
- V
CC
Power dissipation TC=25°C 4.2 W
Maximum switching energy
(L = 77.5 mH; R
=0Ω; V
L
=13.5V; T
bat
67$786
*1'
,
*1'
= 150 °C; IL=1.5A)
jstart
287387
,
287
9
287
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Value
SO-8
CC
CC
4000
4000
5000
5000
121 mJ
Unit
V
V
V
V
V
V
9
&&
6/27 Doc ID 15610 Rev 3
VN800PS-E Electrical specifications
Table 3. Absolute maximum ratings (continued)
Value
Symbol Parameter
SO-8
Unit
T
T
T
stg
Junction operating temperature Internally limited °C
j
Case operating temperature -40 to 150 °C
c
Storage temperature -55 to 150 °C
2.2 Thermal data
Table 4. Thermal data
Symbol Parameter
R
thj-lead
R
thj-amb
1. When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35 µm thick) connected to all VCC pins.
2. When mounted on FR4 printed circuit board with 2 cm
Value
SO-8
Thermal resistance junction-lead max 30 °C/W
(1)
Thermal resistance junction-ambient max
2
of copper area (at least 35 µm thick).
93
82
(2)
Unit
°C/W
°C/W
Doc ID 15610 Rev 3 7/27
Electrical specifications VN800PS-E
2.3 Electrical characteristics
Values specified in this section are for 8 V< VCC<36V; -40°C<Tj< 150 °C, unless
otherwise stated.
Table 5. Power
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC
V
USD
V
OV
R
ON
I
S
I
LGND
I
L(off1)
I
L(off2)
I
L(off3)
Table 6. Switching (VCC = 24 V)
Operating supply
voltage
5.5 36 V
Undervoltage shutdown 3 4 5.5 V
Overvoltage shutdown 36 42 V
I
On-state resistance
OUT
I
OUT
Off-state; V
Supply current
On-state; V
On-state; V
V
Output current at turn-off
CC=VSTAT=VIN=VGND
V
OUT
Off-state output current VIN=V
V
Off-state output current
Off-state output current
IN=VOUT
Tj=125°C
V
IN=VOUT
Tj=25°C
= 0.5 A; Tj=25°C
=0.5A
=24V; T
CC
=24V
CC
=24V; T
CC
case
case
=25°C
= 100 °C
10
1.5
=24V;
=0V
=0V 0 50 µA
OUT
=0V; VCC=13V;
=0V; VCC=13V;
135
270mΩmΩ
20
3.5
2.6
1mA
5µA
3µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
=48Ω from VIN rising edge to
R
L
=2.4V
V
OUT
=48Ω from VIN falling edge to
R
L
= 21.6 V
V
OUT
=48Ω from V
R
L
= 19.2 V
V
OUT
OUT
=2.4V to
-10-µs
-40-µs
See
-
relative
-V/µs
diagram
dV
t
t
OUT
d(on)
d(off)
/dt
Turn-on delay time
Turn-off delay time
Turn-on voltage slope
(on)
µA
mA
mA
=48Ω from V
R
dV
/dt
OUT
Table 7. Input pin
Turn-off voltage slope
(off)
V
L
OUT
=2.4V
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
INL
I
INL
V
INH
Input low level - 1.25 V
Low level input current VIN=1.25V 1 - µA
Input high level 3.25 - V
8/27 Doc ID 15610 Rev 3
=21.6V to
OUT
-
See
relative
diagram
-V/µs
VN800PS-E Electrical specifications
Table 7. Input pin (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
INH
V
I(hyst)
I
IN
Table 8. VCC - output diode
High level input current VIN=3.25 V - 10 µA
Input hysteresis voltage 0.5 - V
Input current VIN=VCC= 36 V - 200 µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
F
Table 9. Status pin
Forward on voltage -I
= 0.6 A; Tj= 150 °C - - 0.6 V
OUT
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
STAT
I
LSTAT
C
STAT
Table 10. Protections
Status low output voltage I
=1.6 mA - - 0.5 V
STAT
Status leakage current Normal operation; V
Status pin input
capacitance
(1)
Normal operation; V
STAT=VCC
STAT
=36V - - 10 µA
=5V - - 30 pF
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
TSD
T
R
T
hyst
T
SDL
I
lim
V
demag
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals
must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must
limit the duration and number of activation cycles.
Shutdown temperature 150 175 200 °C
Reset temperature 135 °C
Thermal hysteresis 7 15 °C
Status delay in overload
condition
DC short circuit current VCC=24V; R
Turn-off output clamp voltage I
T
j>Tjsh
=10mΩ 0.7 2 A
LOAD
=0.5A; L=6mH VCC-47 VCC-52 VCC-57 V
OUT
20 µs
Doc ID 15610 Rev 3 9/27
Electrical specifications VN800PS-E
Figure 4. Status timing
29(57(0367$7867,0,1*
!7
7
MVK
9
,1
9
67$7
W
6'/
Table 11. Truth table
Conditions Input Output Status
M
W
6'/
*$3*&)7
Normal operation
Current limitation
Over temperature
Undervoltage
Overvoltage
L
H
L
H
H
L
H
L
H
L
H
L
H
L
X
X
L
L
L
L
L
L
(T
(T
< T
j
> T
j
H
H
H
H
L
X
X
H
H
TSD
TSD
) H
) L
10/27 Doc ID 15610 Rev 3
VN800PS-E Electrical specifications
Figure 5. Switching time waveforms
9
287
W
GW
G9
RII
287
I
G9
287
GW
RQ
W
U
W
9
,1
7
GRQ
7
GRII
W
*$3*&)7
Doc ID 15610 Rev 3 11/27
Electrical specifications VN800PS-E
Table 12. Electrical transient requirements on VCC pin (part 1/3)
ISO T/R 7637/1
Test levels
test pulse
I II III IV
1 -25 V -50 V -75 V -100 V 2 ms, 10 Ω
2 +25 V +50 V +75 V +100 V 0.2 ms, 10 Ω
3a -25 V -50 V -100 V -150 V 0.1 µs, 50 Ω
3b +25 V +50 V +75 V +100 V 0.1 µs, 50 Ω
4 -4 V -5 V -6 V -7 V 100 ms, 0.01
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2
Table 13. Electrical transient requirements on VCC pin (part 2/3)
ISO T/R 7637/1
Test pulse
I II III IV
1CCCC
2CCCC
3aCCCC
3bCCCC
4CCCC
Test levels results
Delays and
impedance
Ω
Ω
5C E E E
Table 14. Electrical transient requirements on VCC pin (part 3/3)
Class Contents
C
E
All functions of the device are performed as designed after exposure to
disturbance.
One or more functions of the device is not performed as designed after
exposure to disturbance and cannot be returned to proper operation without
replacing the device.
12/27 Doc ID 15610 Rev 3
VN800PS-E Electrical specifications
Figure 6. Peak short circuit current test circuit
9
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67$786
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5
,1
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Nё
67$786
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5
,1
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Pё
5
/
*$3*&)7
9
&&
9
&&
*1'
/2$'
*1'
*$3*&)7
Doc ID 15610 Rev 3 13/27
Electrical specifications VN800PS-E
Figure 8. Waveforms
1250$/23(5$7,21
,1387
/2$'92/7$*(
67$786
81'(592/7$*(
9
9
&&
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/2$'92/7$*(
67$786
9
&&
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/2$'92/7$*(
67$786
9
86'
9
9
29
&&
86'K\VW
XQGHILQHG
29(592/7$*(
!9
9
&&
29
29(57(03(5$785(
7
76'
7
7
M
5
,1387
/2$'&855(17
67$786
*$3*&)7
14/27 Doc ID 15610 Rev 3
VN800PS-E Application information
3 Application information
Figure 9. Application schematic
9
&&
9
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9'&
5HJXODWRU
9ROW
9
&RQWURO
GLDJQRVWLF,2
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3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (R
This can be used with any type of load.
The following is an indication on how to dimension the R
1) R
2) R
where -I
maximum rating section of the device’s datasheet.
Power dissipation in R
P
This resistor can be shared amongst several different HSD. Please note that the value of this
resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not common with the device ground then
the R
values. This shift varies depending on many devices are on in the case of several high side
drivers sharing the same R
≤ 600 mV / (I
GND
≥ (-VCC) / (-I
GND
GND
= (-VCC)2/R
D
produces a shift (I
GND
S(on)max
GND
)
)
is the DC reverse ground pin current and can be found in the absolute
(when VCC< 0: during reverse battery situations) is:
GND
GND
S(on)max
GND
* R
.
) in the input thresholds and the status output
GND
only)
GND
GND
S(on)max
/
'*1'
*$3*&)7
resistor.
becomes the sum of the
Doc ID 15610 Rev 3 15/27
Application information VN800PS-E
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then the ST suggests to utilize Solution 2 (see Section 3.1.2).
3.1.2 Solution 2: diode (D
A resistor (R
=1kΩ) should be inserted in parallel to D
GND
) in the ground line
GND
inductive load.
This small signal diode can be safely shared amongst several different HSD. Also in this
case, the presence of the ground network produces a shift (≈600 mV) in the input threshold
and the status output values if the microprocessor ground is not common with the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
Series resistor in input and status lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused input and status pin is to leave them unconnected.
3.2 Microcontroller I/Os protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (R
the microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
-V
CCpeak/Ilatchup
Calculation example:
≤ R
prot
≤ (V
OHµC-VIH-VGND
) / I
IHmax
if the device is driving an
GND
) in line to prevent
prot
For V
CCpeak
5k Ω ≤ R
Recommended R
= -100 V and I
≤ 65 kΩ.
prot
latchup
value is 10 kΩ.
prot
≥ 20 mA; V
OHµC
≥ 4.5 V
16/27 Doc ID 15610 Rev 3
VN800PS-E Application information
)
3.3 Electrical characteristics curves
Figure 10. Off-state output current Figure 11. High level input current
IL(off1) (µA)
2.5
2.25
2
1.75
1.5
1.25
1
0.75
0.5
0.25
0
-50 -25 0 25 50 75 100 125 150 175
Off state
Vcc=36V
Vin=Vout=0V
Tc (ºC)
Iih (µA)
8
7
Vin=3.25V
6
5
4
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
Figure 12. Status leakage current Figure 13. On-state resistance vs T
Ilstat (µA)
0.1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
Vstat=Vcc=36V
0
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
Figure 14. On-state resistance vs V
CC
Ron (mOhm)
400
350
300
250
200
150
100
50
0
5 10152025303540
Iout=0.5A
Tc= 150ºC
Tc= 25ºC
Tc= - 40ºC
Vcc (V)
Ron (mOhm)
400
350
300
250
200
150
100
50
0
-50 -25 0 25 50 75 100 125 150 175
Iout=0.5A
Vcc=8V; 13V; 36V
Tc (ºC)
Figure 15. Input high level
Vih (V)
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
-50 -25 0 25 50 75 100 125 150 175
Tc (°C
case
Doc ID 15610 Rev 3 17/27
Application information VN800PS-E
Figure 16. Input low level Figure 17. Turn-on voltage slope
Vil (V)
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
-50 -25 0 2 5 50 75 100 125 150 175
Tc (°C)
dVout/dt(on) (V/ms)
1600
1400
1200
1000
800
600
400
200
Vcc=24V
Rl=48Ohm
0
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
Figure 18. Overvoltage shutdown Figure 19. Input hysteresis voltage
Vov (V)
50
48
46
44
42
40
38
36
34
32
30
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vhyst (V)
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Figure 20. Turn-off voltage slope Figure 21. I
dVout/dt(off) (V/ms)
800
700
600
500
400
300
200
100
18/27 Doc ID 15610 Rev 3
Vcc=24V
Rl=48Ohm
0
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
vs T
LIM
case
Ilim (A)
2.5
2.25
2
1.75
1.5
1.25
1
0.75
0.5
0.25
0
-50 -25 0 25 50 75 100 125 150 175
Vcc=24V
Rl=10mOhm
Tc (ºC)
VN800PS-E Application information
3.4 SO-8 maximum demagnetization energy
Figure 22. SO-8 maximum turn off current versus load inductance
LMAX (A)
I
10
A
1
0.1
1 10 100 1000
L(mH)
B
C
Note: Legend
A = Single pulse at T
B = Repetitive pulse at T
C = Repetitive Pulse at T
Jstart
= 150 ºC
=100ºC
Jstart
= 125 ºC
Jstart
Conditions:
V
=13.5V
CC
Values are generated with R
In case of repetitive pulses, T
=0Ω
L
(at beginning of each demagnetization) of every pulse
jstart
must not exceed the temperature specified above for curves B and C.
Figure 23. Demagnetization
,
9
/
,1
'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ
W
*$3*&)7
Doc ID 15610 Rev 3 19/27
Package and PCB thermal data VN800PS-E
4 Package and PCB thermal data
4.1 SO-8 thermal data
Figure 24. SO-8 PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm,
Cu thickness = 35 µm, Copper areas: 0.14 cm2, 2 cm2).
Figure 25. SO-8 R
thj-amb
(1)
vs PCB copper area in open box free air condition
20/27 Doc ID 15610 Rev 3
VN800PS-E Package and PCB thermal data
Figure 26. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
2
100
0.5 cm
2 cm
2
10
1
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
Figure 27. Thermal fitting model of a single channel HSD in SO-8
Tj
C1
R1 R2
Pd
C2
C3
R3
C4
R4
C5
R5
C6
R6
T_amb
Equation 1 Pulse calculation formula
Z
THδ
R
TH
δ Z
THtp
1 δ–()+⋅=
where
δ t
T⁄=
p
Doc ID 15610 Rev 3 21/27
Package and PCB thermal data VN800PS-E
Table 15. Thermal parameter
Area/island (cm2)0.142
R1 (°C/W) 0.24
R2 (°C/W) 1.2
R3 (°C/W) 4.5
R4 (°C/W) 21
R5 (°C/W) 16
R6 (°C/W) 58 28
C1 (W.s/°C) 0.00015
C2 (W.s/°C) 0.0005
C3 (W.s/°C) 7.50E-03
C4 (W.s/°C) 0.045
C5 (W.s/°C) 0.35
C6 (W.s/°C) 1.05 2
22/27 Doc ID 15610 Rev 3
VN800PS-E Package and packing information
5 Package and packing information
5.1 ECOPACK
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
5.2 SO-8 package information
Table 16. SO-8 mechanical data
Dim.
Min. Typ. Max.
A 1.75
a1 0.1 0.25
a2 1.65
a3 0.65 0.85
b 0.35 0.48
b1 0.19 0.25
C 0.25 0.5
mm
c1 45
D4.8 5
E 5.8 6.2
e1.27
e3 3.81
F3.8 4
L 0.4 1.27
M 0.6
S 8
L1 0.8 1.2
Doc ID 15610 Rev 3 23/27
Package and packing information VN800PS-E
Figure 28. SO-8 package dimensions
0016023 D
24/27 Doc ID 15610 Rev 3
VN800PS-E Package and packing information
5.3 SO-8 packing information
The devices can be packed in tube or tape and reel shipments (see the Device summary on
page 1).
Figure 29. SO-8 tube shipment (no suffix)
B
C
A
Figure 30. SO-8 tape and reel shipment (suffix “TR”)
Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A 3.2
B 6
C (± 0.1) 0.6
All dimensions are in mm.
REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Start
No componentsNo components Components
500mm min
All dimensions are in mm.
Doc ID 15610 Rev 3 25/27
Revision history VN800PS-E
6 Revision history
Table 17. Document revision history
Date Revision Changes
21-Apr-2009 1 Initial release
Updated Features list.
31-May-2010 2
07-Feb-2011 3
Updated Table 3: Absolute maximum ratings.
Reformatted entire document.
Updated Features list.
Updated following tables:
– Table 4: Thermal data
– Table 16: SO-8 mechanical data
26/27 Doc ID 15610 Rev 3
VN800PS-E
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Doc ID 15610 Rev 3 27/27
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