ST VN750SM User Manual

VN750SM

High-side driver

Features

Type	RDS(on)	IOUT	VCC
VN750SM	55 mΩ	6 A	36 V

■CMOS compatible input

■On-state open load detection

■Off-state open load detection

■Shorted load protection

■Under-voltage and over-voltage shutdown

■Protection against loss of ground

■Very low stand-by current

■Reverse battery protected (see Application schematic )

SO-8

Description

The VN750SM is a monolithic device designed in STMicroelectronics VIPower M0-3 technology. The VN750SM is intended for driving any type of load with one side connected to ground. The active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).

Active current limitation combined with thermal shutdown and automatic restart protects the device against over-load. The device detects the open load condition in both the on and off-state.

The open load threshold is aimed at detecting the 5 W / 12 V standard bulb as an open load fault in the on-state.

In the off-state the device detects if the output is shorted to VCC. The device automatically turns off in the case where the ground pin becomes disconnected.

Table 1.	Device summary
	Package		Order codes
		Tube		Tape and reel
	SO-8	VN750SM		VN750SM13TR

December 2008

Rev 3

1/27

www.st.com

Contents	VN750SM

Contents

1	Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 5
2	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		6
	2.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
	2.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.4	Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
3	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		16
	3.1	GND protection network against reverse battery . . . . . . . . . . . . . . . . . . .	16

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 19

4	Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		20
	4.1	SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
5	Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		23
	5.1	ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
	5.2	SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
	5.3	SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
6	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		26

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VN750SM	List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 6. Switching (VCC=13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 8. VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 11. Open load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 14. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 15. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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List of figures	VN750SM

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 13. On-state resistance Vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 14. On-state resistance Vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 15. Open load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 16. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 17. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 19. Over-voltage shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 20. Open load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 23. Ilim Vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 25. Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 26. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 27. PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 28. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20 Figure 29. SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 30. Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 31. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 32. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 33. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

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VN750SM	Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

VCC

VCC				OVER-VOLTAGE
CLAMP				DETECTION

UNDER-VOLTAGE

DETECTION

GND
		Power CLAMP
INPUT		DRIVER
		OUTPUT
	LOGIC
		CURRENT LIMITER
STATUS		ON-STATE OPEN LOAD
		DETECTION
OVER-TEMPERATURE		OFF-STATE OPEN LOAD
DETECTION
		AND OUTPUT SHORTED TO VCC
		DETECTION

Figure 2. Configuration diagram (top view)

VCC	5	4		N.C.
OUTPUT				STATUS
OUTPUT				INPUT
VCC	8	1		GND

Table 2.	Suggested connections for unused and not connected pins
Connection / pin		Status	N.C.	Output	Input
Floating		X	X	X	X
To ground			X		Through 10KΩ resistor

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Electrical specifications	VN750SM

2 Electrical specifications

Figure 3. Current and voltage conventions

IS

IIN

VF

INPUT

VCC

ISTAT

IOUT

STATUS

OUTPUT

VCC

VIN

GND

VOUT

IGND

VSTAT

2.1Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality document.

	Table 3.	Absolute maximum ratings
	Symbol	Parameter	Value	Unit
	VCC	DC supply voltage	41	V
	- VCC	Reverse DC supply voltage	- 0.3	V
	- Ignd	DC reverse ground pin current	- 200	mA
	IOUT	DC output current	Internally limited	A
	- IOUT	Reverse DC output current	- 6	A
	IIN	DC input current	+/- 10	mA
	ISTAT	DC status current	+/- 10	mA
		Electrostatic discharge
		(human body model: R =1.5KΩ; C =100pF)
	VESD	INPUT	4000	V
		STATUS	4000	V
		OUTPUT	5000	V
		VCC	5000	V
	EMAX	Maximum switching energy (L = 1.3mH; RL= 0Ω;	90	mJ
		Vbat = 13.5V; Tjstart = 150ºC; IL = 10A)

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VN750SM			Electrical specifications
	Table 3.	Absolute maximum ratings (continued)
	Symbol	Parameter	Value	Unit
	Ptot	Power dissipation TC=25°C	4.2	W
	Tj	Junction operating temperature	Internally limited	°C
	Tstg	Storage temperature	- 55 to 150	°C

2.2Thermal data

Table 4.	Thermal data
Symbol	Parameter	Max. value			Unit
Rthj-lead	Thermal resistance junction-lead	30			°C/W
R	Thermal resistance junction-ambient	93(1)		82(2)	°C/W
thj-amb

1.When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow.

2.When mounted on a standard single-sided FR-4 board with 2 cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air flow.

2.3Electrical characteristics

Values specified in this section are for 8V < VCC < 36V; -40°C < Tj < 150°C, unless otherwise stated.

Table 5.	Power
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
VCC	Operating supply voltage		5.5	13	36	V
VUSD	Under-voltage shutdown		3	4	5.5	V
VUSDhyst	Under-voltage shutdown			0.5		V
	hysteresis
VOV	Over-voltage shutdown		36			V
RON	On-state resistance	IOUT = 2A; Tj = 25°C; VCC > 8V			55	mΩ
		IOUT = 2A; VCC > 8V			110	mΩ
		Off-state; VCC = 13V;
		VIN = VOUT = 0V		10	25	µA
IS	Supply current	Off-state; VCC = 13V;
		VIN = VOUT = 0V; Tj = 25°C		10	20	µA
		On-state; VCC = 13V; VIN = 5V;
		IOUT = 0A		2	3.5	mA
IL(off1)	Off-state output current	VIN = VOUT = 0V	0		50	µA
IL(off2)	Off-state output current	VIN = 0V; VOUT = 3.5V	-75		0	µA

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Electrical specifications

VN750SM

Table 5.

Power (continued)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

IL(off3)

Off-state output current

VIN = VOUT = 0V; VCC = 13V;

5

µA

Tj

= 125°C

IL(off4)

Off-state output current

VIN = VOUT = 0V; VCC = 13V;

3

µA

Tj

= 25°C

Table 6.

Switching (VCC=13V)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

td(on)

Turn-on delay time

RL = 6.5Ω from VIN rising edge to

40

µs

VOUT = 1.3V

td(off)

Turn-off delay time

RL = 6.5Ω from VIN falling edge to

30

µs

VOUT = 11.7V

dVOUT/dt(on)

Turn-on voltage slope

RL = 6.5Ω from VOUT = 1.3V to

See Figure 21.

V/µs

VOUT=10.4V

dVOUT/dt(off)

Turn-off voltage slope

RL = 6.5Ω from VOUT = 11.7V to

See Figure 22.

V/µs

VOUT=1.3V

Table 7.

Input pin

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VIL

Input low level

1.25

V

IIL

Low level input current

VIN = 1.25V

1

µA

VIH

Input high level

3.25

V

IIH

High level input current

VIN = 3.25V

10

µA

Vhyst

Input hysteresis voltage

0.5

V

VICL

Input clamp voltage

IIN = 1mA

6

6.8

8

V

IIN = -1mA

- 0.7

V

Table 8.

VCC output diode

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VF

Forward on voltage

- IOUT = 1.4A; Tj = 150°C

0.6

V

Table 9.

Status pin

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VSTAT

Status low output voltage

ISTAT = 1.6mA

0.5

V

ILSTAT

Status leakage current

Normal operation; VSTAT = 5V

10

µA

CSTAT

Status pin input capacitance

Normal operation; VSTAT = 5V

100

pF

VSCL

Status clamp voltage

ISTAT = 1mA

6

6.8

8

V

ISTAT= - 1mA

- 0.7

V

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VN750SM				Electrical specifications
	Table 10.	Protections(1)
	Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
	TTSD	Shutdown temperature		150	175	200	°C
	TR	Reset temperature		135			°C
	Thyst	Thermal hysteresis		7	15		°C
	tSDL	Status delay in over-load	Tj > Tjsh			20	µs
		condition
	Ilim	Current limitation	9V < VCC < 36V	6	10	12	A
			5V < VCC < 36V			12	A
	Vdemag	Turn-off output clamp	IOUT = 2 A; VIN = 0V;	VCC - 41	VCC - 48	VCC - 55	V
		voltage	L = 6mH

1.To ensure long term reliability under heavy over-load or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles.

	Table 11.	Open load detection
	Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
	IOL	Open load on-state	VIN = 5V	0.6	0.9	1.2	A
		detection threshold
	tDOL(on)	Open load on-state	IOUT = 0A			200	µs
		detection delay
		Open load off-state
	VOL	voltage detection	VIN = 0V	1.5	2.5	3.5	V
		threshold
	tDOL(off)	Open load detection				1000	µs
		delay at turn-off

Figure 4. Status timings

OPEN LOAD STATUS TIMING (with external pull-up)

OVER-TEMP STATUS TIMING

V

> V

IOUT< IOL

OUT

OL

VIN

Tj > Tjsh

VSTAT

VIN

VSTAT

tDOL(off)

t

t

t

DOL(on)

SDL

SDL

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