ST VN750 User Manual

VN750

High-side driver

Features

	Type	RDS(on)	IOUT	VCC
	VN750
	VN750S	60 mΩ	6 A	36 V
	VN750PT
	VN750-B5

■CMOS compatible input

■On-state open-load detection

■Off-state open-load detection

■Shorted load protection

■Undervoltage and overvoltage shutdown

■Protection against loss of ground

■Very low standby current

■Reverse battery protection

Datasheet − production data

SO-8 PENTAWATT

P2PAK

PPAK

Description

The VN750 is a monolithic device designed using STMicroelectronic® VIPower® M0-3 technology. The VN750 is intended for driving any type of load with one side connected to ground. The active VCC pin voltage clamp protects the device against low energy spikes.

Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device detects the openload condition in both the on-state and

off-state. In the off-state the device detects if the output is shorted to VCC. The device automatically turns off where the ground pin becomes disconnected.

Table 1.	Device summary
	Package		Order codes
		Tube		Tape and reel
	PENTAWATT	VN750		—
	SO-8	VN750S		VN750S13TR
	P2PAK	VN750-B5		VN750-B513TR
	PPAK	VN750PT		VN750PT13TR
May 2012		Doc ID 6942 Rev. 4	1/46

This is information on a product in full production.

www.st.com

Contents	VN750

Contents

1	Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 7
2	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		8
	2.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
	2.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	2.3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
	2.4	Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
	2.5	GND protection network against reverse battery . . . . . . . . . . . . . . . . . . .	19

2.5.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 19 2.5.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 20

2.6 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.7 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.8 Open-load detection in Off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.9 SO-8 maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . 22 2.10 PPAK/P2PAK maximum demagnetization energy (VCC = 13.5V) . . . . . . 23

3	Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		24
	3.1	SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	3.2	P2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
	3.3	PPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29

4	Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		32
	4.1	ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
	4.2	SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
	4.3	PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	34
	4.4	P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	36
	4.5	PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	38
	4.6	SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	40
	4.7	PENTAWATT packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	41
	4.8	P2PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	41
	4.9	PPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	43

2/46	Doc ID 6942 Rev. 4

VN750		Contents
5	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 45

Doc ID 6942 Rev. 4

3/46

List of tables	VN750

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 6. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 8. VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 13. Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 14. Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 15. Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 17. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 18. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 19. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 20. PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 21. P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 22. PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 23. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

4/46	Doc ID 6942 Rev. 4

VN750	List of figures

List of figures

Figure 1.	Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 7
Figure 2.	Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 7
Figure 3.	Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 8
Figure 4.	Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 5.	Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 6.	Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
Figure 7.	Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 8.	High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 9.	Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 10.	Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 11.	Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 12.	Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 13.	On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 14.	On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 15.	Open-load On-state detection threshold. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 16.	Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 17.	Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 18.	Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 19.	Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 20.	Open-load Off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 21.	Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 22.	Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 23.	Ilim vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 24.	Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
Figure 25.	Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
Figure 26.	SO-8 maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
Figure 27.	PPAK /P2PAK maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . .	23
Figure 28.	SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
Figure 29.	Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . .	24
Figure 30.	SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . .	25
Figure 31.	Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
Figure 32.	P2PAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
Figure 33.	Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . .	27
Figure 34.	P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . .	27
Figure 35.	Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	28
Figure 36.	PPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29
Figure 37.	Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . .	29
Figure 38.	PPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . .	30
Figure 39.	Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	30
Figure 40.	SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
Figure 41.	PENTAWATT package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	34
Figure 42.	P2PAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	36
Figure 43.	PPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	38
Figure 44.	SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	40
Figure 45.	SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	40
Figure 46.	PENTAWATT tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	41
Figure 47.	P2PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	41
Figure 48.	P2PAK tape and reel (suffix “13TR”). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	42

Doc ID 6942 Rev. 4

5/46

List of figures	VN750

Figure 49. PPAK suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 50. PPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 51. PPAK tape and reel (suffix “13TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

6/46	Doc ID 6942 Rev. 4

VN750	Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

VCC

VCC		OVERVOLTAGE
CLAMP		DETECTION
		UNDERVOLTAGE
		DETECTION
GND
		Power CLAMP
INPUT		DRIVER
		OUTPUT
	LOGIC
		CURRENT LIMITER
STATUS		ON STATE OPENLOAD
		DETECTION
OVERTEMPERATURE		OFF STATE OPENLOAD
DETECTION
		AND OUTPUT SHORTED TO VCC
		DETECTION

Figure 2. Configuration diagram (top view)

VCC	5	4	N.C.
OUTPUT			STATUS
OUTPUT			INPUT
VCC	8	1	GND

SO-8

	5	OUTPUT	5	OUTPUT
				STATUS
	4	STATUS	4
	3	V	3	VCC
		CC	2	INPUT
	2	INPUT
	1	GND	1	GND
				PC10000

PPAK / P2PAK

PENTAWATT

Table 2.	Suggested connections for unused and not connected pins
Connection / pin		Status	N.C.	Output	Input
Floating		X	X	X	X
To ground			X		Through 10KΩ resistor

Doc ID 6942 Rev. 4

7/46

Electrical specifications	VN750

2 Electrical specifications

Figure 3. Current and voltage conventions

IS

IIN

VF

INPUT

VCC

ISTAT

IOUT

STATUS

OUTPUT

VCC

VIN

GND

VOUT

IGND

VSTAT

2.1Absolute maximum ratings

Stressing the device above the rating listed in the Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability.

	Table 3.	Absolute maximum ratings
	Symbol	Parameter		Value			Unit
			SO-8	PENTAWATT	P2PAK	PPAK
	VCC	DC supply voltage		41			V
	-VCC	Reverse DC supply voltage		-0.3			V
	-Ignd	DC reverse ground pin current		-200			mA
	IOUT	DC output current		Internally limited			A
	-IOUT	Reverse DC output current		-6			A
	IIN	DC input current		+/- 10			mA
	ISTAT	DC Status current		+/- 10			mA
		Electrostatic discharge
		(human body model: R = 1.5 KΩ;
		C = 100 pF)
	VESD	– INPUT		4000			V
		– STATUS		4000			V
		– OUTPUT		5000			V
		– VCC		5000			V

8/46	Doc ID 6942 Rev. 4

VN750				Electrical specifications
	Table 3.	Absolute maximum ratings (continued)
	Symbol	Parameter		Value				Unit
			SO-8	PENTAWATT		P2PAK	PPAK
		Maximum switching energy
	EMAX	(L = 1.8 mH; RL = 0 Ω;	100					mJ
		Vbat = 13.5 V; Tjstart = 150°C;
		IL = 9 A)
		Maximum switching energy
	EMAX	(L = 2.46 mH; RL = 0 Ω;				138	138	mJ
		Vbat = 13.5 V; Tjstart = 150°C;
		IL = 9 A)
	Ptot	Power dissipation TC = 25°C	4.2	60		60	60	W
	Tj	Junction operating temperature		Internally limited				°C
	Tc	Case operating temperature		-40 to 150				°C
	Tstg	Storage temperature		-55 to 150				°C

2.2Thermal data

	Table 4.	Thermal data
	Symbol	Parameter		Max. value			Unit
			S0-8	PENTAWATT	P2PAK	PPAK
	Rthj-case	Thermal resistance junction-case	-	2.1	2.1	2.1	°C/W
	Rthj-lead	Thermal resistance junction-lead	30	-	-	-	°C/W
	Rthj-amb	Thermal resistance junction-ambient	93(1)	62.1	52.1(2)	77.1(2)	°C/W
			82(3)	62.1	37(4)	44(4)	°C/W

1.When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow.

2.When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.

3.When mounted on a standard single-sided FR-4 board with 2 cm2 of Cu (at least 35 µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow.

4.When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.

Doc ID 6942 Rev. 4

9/46

Electrical specifications	VN750

2.3Electrical characteristics

Values specified in this section are for 8 V < VCC < 36 V; -40°C < Tj < 150°C, unless otherwise stated.

Table 5.

Power

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VCC

Operating supply voltage

5.5

13

36

V

VUSD

Undervoltage shutdown

3

4

5.5

V

VUSDhyst

Undervoltage shutdown

0.5

V

hysteresis

VOV

Overvoltage shutdown

36

V

RON

On state resistance

IOUT = 2 A; Tj = 25°C; VCC > 8 V

60

mΩ

IOUT = 2 A; VCC > 8 V

120

mΩ

Off-state; VCC = 13 V;

10

25

µA

VIN = VOUT = 0 V

IS

Supply current

Off-state; VCC = 13 V;

10

20

µA

VIN = VOUT = 0 V; Tj = 25°C

On-state; VCC = 13 V; VIN = 5 V;

2

3.5

mA

IOUT = 0 A

IL(off1)

Off-state output current

VIN = VOUT = 0 V

0

50

µA

IL(off2)

Off-state output current

VIN = 0 V; VOUT = 3.5 V

-75

0

µA

IL(off3)

Off-state output current

VIN = VOUT = 0 V; VCC = 13 V;

5

µA

Tj = 125°C

IL(off4)

Off-state output current

VIN = VOUT = 0 V; VCC = 13 V;

3

µA

Tj = 25°C

Table 6.

Switching (VCC = 13 V)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

td(on)

Turn-on delay time

RL = 6.5 Ω from VIN rising edge to

40

µs

VOUT = 1.3V

td(off)

Turn-off delay time

RL = 6.5 Ω from VIN falling edge to

30

µs

VOUT = 11.7 V

dVOUT/dt(on)

Turn-on voltage slope

RL = 6.5 Ω from VOUT = 1.3 V to

See Figure 21

V/µs

VOUT=10.4 V

dVOUT/dt(off)

Turn-off voltage slope

RL = 6.5 Ω from VOUT = 11.7 V to

See Figure 22

V/µs

VOUT=1.3 V

Table 7.

Input pin

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VIL

Input low level

1.25

V

IIL

Low level input current

VIN = 1.25 V

1

µA

VIH

Input high level

3.25

V

10/46

Doc ID 6942 Rev. 4

VN750

Electrical specifications

Table 7.

Input pin (continued)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

IIH

High level input current

VIN = 3.25 V

10

µA

Vhyst

Input hysteresis voltage

0.5

V

VICL

Input clamp voltage

IIN = 1 mA

6

6.8

8

V

IIN = -1 mA

-0.7

V

Table 8.

VCC output diode

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VF

Forward on voltage

-IOUT = 1.3 A; Tj = 150°C

—

—

0.6

V

Table 9.

Status pin

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VSTAT

Status low output voltage

ISTAT = 1.6 mA

0.5

V

ILSTAT

Status leakage current

Normal operation; VSTAT = 5 V

10

µA

CSTAT

Status pin input capacitance

Normal operation; VSTAT = 5 V

100

pF

VSCL

Status clamp voltage

ISTAT = 1 mA

6

6.8

8

V

ISTAT = -1 mA

-0.7

V

Table 10.

Protections(1)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

TTSD

Shutdown temperature

150

175

200

°C

TR

Reset temperature

135

°C

Thyst

Thermal hysteresis

7

15

°C

t

Status delay in overload

T

> T

20

ms

SDL

condition

j

jsh

Ilim

Current limitation

9 V < VCC < 36 V

6

9

15

A

5 V< VCC < 36 V

15

A

Vdemag

Turn-off output clamp

IOUT = 2 A; VIN = 0 V;

VCC - 41

VCC - 48

VCC - 55

V

voltage

L = 6 mH

1.To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles.

Table 11.	Open-load detection
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
IOL	Open-load ON-state	VIN = 5 V	50		200	mA
	detection threshold
tDOL(on)	Open-load ON-state	IOUT = 0 A			200	µs
	detection delay

Doc ID 6942 Rev. 4

11/46

Electrical specifications

VN750

Table 11.

Open-load detection (continued)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VOL

Open-load OFF-state

VIN = 0 V

1.5

3.5

V

voltage detection threshold

tDOL(off)

Open-load detection delay

1000

µs

at turn-off

Figure 4.

Status timings

OPEN LOAD STATUS TIMING (with external pull-up)

OVERTEMP STATUS TIMING

V > V

OL

IOUT< IOL

OUT

VIN

Tj > Tjsh

VSTAT

VIN

VSTAT

tDOL(off)

t

DOL(on)

t

t

SDL

SDL

Figure 5.	Switching time waveforms
	VOUT
			90%
		80%
		dVOUT/dt(on)	dVOUT/dt(off)
			10%
			t
	VIN	td(on)	t
			d(off)

t

12/46

Doc ID 6942 Rev. 4

VN750				Electrical specifications
	Table 12. Truth table
	Conditions	Input	Output		Status
	Normal operation	L	L		H
		H	H		H
		L	L		H
	Current limitation	H	X		(Tj < TTSD) H
		H	X		(Tj > TTSD) L
	Overtemperature	L	L		H
		H	L		L
	Undervoltage	L	L		X
		H	L		X
	Overvoltage	L	L		H
		H	L		H
	Output voltage > VOL	L	H		L
		H	H		H
	Output current < IOL	L	L		H
		H	H		L

Doc ID 6942 Rev. 4

13/46

Electrical specifications											VN750
	Table 13.	Electrical transient requirements on VCC pin (part 1)
	ISO T/R 7637/1					Test levels
	Test pulse		I		II	III			IV		Delays and
											impedance
	1		- 25 V		- 50 V	- 75 V			- 100 V		2 ms 10 Ω
	2		+ 25 V		+ 50 V	+ 75 V			+ 100 V		0.2 ms 10 Ω
	3a		- 25 V		- 50 V	- 100 V			- 150 V		0.1 µs 50 Ω
	3b		+ 25 V		+ 50 V	+ 75 V			+ 100 V		0.1 µs 50 Ω
	4		- 4 V		- 5 V	- 6 V			- 7 V		100 ms, 0.01 Ω
	5		+ 26.5 V	+ 46.5 V		+ 66.5 V			+ 86.5 V		400 ms, 2 Ω
	Table 14.	Electrical transient requirements on VCC pin (part 2)
	ISO T/R 7637/1				Test levels results
	test pulse
			I		II			III			IV
	1		C		C			C			C
	2		C		C			C			C
	3a		C		C			C			C
	3b		C		C			C			C
	4		C		C			C			C
	5		C		E			E			E

Table 15. Electrical transient requirements on VCC pin (part 3)

Class

Contents

C All functions of the device are performed as designed after exposure to disturbance.

E

One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.

14/46

Doc ID 6942 Rev. 4