ST VN5E050AJ-E User Manual

Single channel high side driver with analog current sense
Features
Max supply voltage V
Operating voltage range V
Max On-State resistance R
Current limitation (typ) I
Off state supply current I
1. Typical value with all loads connected.
General
power limitation – Very low stand-by current – 3.0V CMOS compatible inputs – Optimized electromagnetic emissions – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC
european directive – Very low current sense leakage
Diagnostic functions
– Proportional load current sense – High current sense precision for wide
currents range – Current sense disable – Off state open load detection – Output short to V
detection
CC
– Overload and short to ground (power
limitation) indication – Thermal shutdown indication
Protections
– Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss
of V
CC
– Over-temperature shutdown with
autorestart (thermal shutdown)
CC
CC
ON
LIMH
S
4.5 to 28V
41 V
50 m
27 A
2 µA
(1)
VN5E050AJ-E
for automotive applications
PowerSSO-12
– Reverse battery protected ( see Figure 32.) – Electrostatic discharge protection
Application
All types of resistive, inductive and capacitive
loads
Suitable as LED driver
Description
The VN5E050AJ-E is a single channel high-side driver manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-12 package. The VN5E050AJ-E is designed to drive 12V automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over-temperature shut-off with auto-restart and over-voltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide Ehnanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, over­temperature indication, short-circuit to Vcc diagnosis and ON & OFF state open load detection.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to allow sharing of the external sense resistor with other similar devices.
March 2008 Rev 1 1/37
www.st.com
37
Contents VN5E050AJ-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2 Solution 2: diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to VCC and OFF state open load detection . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 28
) in the ground line . . . . . . . . . . . . . . . . . . . . . . 25
GND
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
VN5E050AJ-E List of tables
List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (V
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Open load detection (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 14. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 15. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
= 13V; Tj= 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
3/37
List of figures VN5E050AJ-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Open load Off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. I
OUT/ISENSE
Figure 10. Maximum current sense ratio drift vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. OFF-State Open Load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to V Figure 16. T
evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
J
Figure 17. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Input clamp level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. On state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. On state resistance vs. VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. ILIMH Vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Maximum turn-Off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 35. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 30
Figure 38. Thermal fitting model of a single channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 30
Figure 39. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 41. PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
vs. I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
OUT
4/37
VN5E050AJ-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V
CC
Signal Clamp
Undervolta ge
IN
CS_ DIS
CS
LOG IC

Table 1. Pin function

C ontrol & Diagnostic
DRIVER
Over
te mp.
V
SENSEH
OVERLOAD PROTECTION
(AC TIVE POWE R LIMITATION)
Name Function
Current
Limitation
Current
Sense
Power Clamp
V
ON
L im ita tion
OFF State Open load
OUT
GND
V
CC
Battery connection.
OUTPUT Power output.
GND
INPUT
CURRENT
SENSE
Ground connection. Must be reverse battery protected by an external diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state.
Analog current sense pin, delivers a current proportional to the load current.
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
5/37
Block diagram and pin description VN5E050AJ-E

Figure 2. Configuration diagram (top view)

TAB = Vcc
N.C.
GND
INPUT
CURRENT SENSE
CS_DIS
N.C.

Table 2. Suggested connections for unused and not connected pins

Connection /
pin
Floating Not allowed X X X X
Current sense N.C. Output Input CS_DIS
1
2
3
4
5
6
12
11
10
9
8
7
N.C.
OUTPUT
OUTPUT
OUTPUT
OUTPUT
N.C.
To ground
Through 1 K
resistor
X
Through 22 K
resistor
Through 10 K
resistor
Through 10 K
resistor
6/37
VN5E050AJ-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
V
CSD
I
CSD
V
CC
GND
OUTPUT
CURRENT SENSE
I
GND
CS_DIS
I
IN
IN
INPUT
I
SENSE
V
SENSE
VF
I
OUT
V
CC
V
OUT
Note: V
F
= V
- VCC during reverse battery condition.
OUT

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
-V
- I
I
- I
I
-I
CSENSE
V
CSENSE
E
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
OUT
Reverse DC output current 20 A
OUT
DC input current -1 to 10 mA
I
IN
DC current sense disable input current -1 to 10 mA
CSD
DC reverse CS pin current 200 mA
Current sense maximum voltage
Maximum switching energy (single pulse)
MAX
(L= 3mH; R
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(Typ.) )
V
- 41 to
CC
+V
CC
104 mJ
V
7/37
Electrical specifications VN5E050AJ-E
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (Human Body Model: R=1.5KΩ; C=100pF)
4000 2000 4000 5000 5000
V V V V V
V
V
ESD
ESD
T
T
- INPUT
- CURRENT SENSE
- CS_DIS
- OUTPUT
- V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
j
Storage temperature -55 to 150 °C
stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (with one channel ON) 2.7 °C/W
Thermal resistance junction-ambient See Figure 36. °C/W
8/37
VN5E050AJ-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8V <VCC< 28V; -40°C< Tj <150°C, unless otherwise stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
I
L(off1)
1. PowerMOS leakage included.
Table 6. Switching (VCC= 13V; Tj= 25°C)
Operating supply
CC
voltage
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shutdown hysteresis
I
= 2 A; Tj= 25°C
OUT
On state resistance
ON
Clamp voltage IS= 20 mA 41 46 52 V
clamp
I
Supply current
S
Off state output current
Output - VCC diode
V
F
voltage
I
= 2 A; Tj= 150°C
OUT
= 2 A; VCC= 5V; Tj= 25°C
I
OUT
Off state; V VIN=V
On State; V I
OUT
VIN=V VIN=V
-I
OUT
CC
OUT=VSENSE=VCSD
CC
=0A
=0V; VCC=13V; Tj=25°C
OUT
=0V; VCC=13V; Tj=125°C
OUT
= 2A; Tj= 150°C 0.7 V
=13V; Tj=25°C;
=0V
=13V; VIN=5V;
4.5 13 28 V
0.5 V
m
50
100
m
65
m
(1)
2
1.5
000.01 3
(1)
5
3µAmA
5
µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
(dV
(dV
t
d(on)
t
d(off)
OUT
OUT
W
W
ON
OFF
Turn- On delay time RL= 6.5Ω (see Figure 6.) 20 µs
Turn- Off delay time RL= 6.5Ω (see Figure 6.) 40 µs
/dt)onTurn- On voltage slope RL= 6.5
/dt)
Turn- Off voltage slope RL= 6.5
off
Switching energy losses during t
on
Switching energy losses during t
off
RL= 6.5Ω (see Figure 6.) 0.20 mJ
RL= 6.5Ω (see Figure 6.)0.3 mJ
See
Figure 26.
See
Figure 28.
9/37
V/ µs
V/ µs
Electrical specifications VN5E050AJ-E

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
I
V
I(hyst)
V
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL

Table 8. Protections and diagnostics

Input low level voltage 0.9 V
IL
Low level input current VIN=0.9V 1 µA
I
IL
Input high level voltage 2.1 V
IH
High level input current VIN=2.1V 10 µA
IH
Input hysteresis voltage 0.25 V
Input clamp voltage
ICL
I
IN
I
IN
=1mA
=-1mA
5.5
-0.7
CS_DIS low level voltage 0.9 V
Low level CS_DIS current V
=0.9V 1 µA
CSD
CS_DIS high level voltage 2.1 V
High level CS_DIS current V
=2.1V 10 µA
CSD
CS_DIS hysteresis voltage 0.25 V
CS_DIS clamp voltage
(1)
I
CSD
I
CSD
=1mA
=-1mA
5.5
-0.7
7V
V
7V
V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
DC short circuit current
limH
Short circuit current
I
limL
during thermal cycling
VCC= 13V
5V < V
V
= 13V; TR<Tj<T
CC
CC
< 28V
TSD
19 27 38
38
7A
A A
T
T
V
DEMAG
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
Shutdown temperature 150 175 200 °C
TSD
Reset temperature TRS + 1 TRS + 5 °C
T
R
Thermal reset of status 135 °C
T
RS
Thermal hysteresis
HYST
(T
Turn- Off output voltage clamp
Output voltage drop
V
ON
limitation
diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
TSD-TR
)
I
OUT
10/37
C
= 2A; VIN=0; L= 6mH VCC-41 VCC-46 VCC-52 V
I
=0.1A;
OUT
=-40°C...150°C
T
j
25 mV
(see Figure 8.)
VN5E050AJ-E Electrical specifications

Table 9. Current sense (8V<VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
K
K
dK
1/K1
K
dK
2/K2
K
dK
3/K3
I
SENSE0
I
OL
V
SENSE
=0.05A; V
0
1
I
OUT/ISENSE
I
OUT/ISENSE
Current sense
(1)
ratio drift
2
I
OUT/ISENSE
Current sense
(1)
ratio drift
3
I
OUT/ISENSE
Current sense
(1)
ratio drift
Analog sense
OUT
Tj= -40°C...150°C 1170 2000 3090
I
= 1A; V
OUT
SENSE
Tj= -40°C...150°C
=25°C...150°C
T
j
= 1A; V
I
OUT
= -40 °C to 150 °C
T
J
I
OUT
= -40°C...150°C
T
j
=25°C...150°C
T
j
I
OUT
=-40 °C to 150 °C
T
J
I
OUT
= -40°C...150°C
T
j
= 25°C...150°C
T
j
I
OUT
= -40 °C to 150 °C
T
J
I
OUT
V
CSD
V
CSD
SENSE
= 2A; V
SENSE
= 2A; V
SENSE
= 4A; V
SENSE
= 4A; V
SENSE
=0A; V
SENSE
=5V; VIN=0V; Tj=-40°C to 150°C =0V; VIN=5V; Tj=-40°C to 150°C
leakage current
I
=2A; V
OUT
V
CSD
SENSE
=5V; VIN=5V; Tj=-40°C to 150°C
Open load ON
= 5V, 8V<VCC<18V
state current detection threshold
Max analog sense output voltage
V
IN
I
SENSE
I
OUT
= 5 µA
=4A; V
CSD
SENSE
=4 V; V
= 4 V; V
= 4V; V
=4V; V
= 4 V; V
=0.5V;V
= 4V; V
CSD
CSD
CSD
CSD
CSD
CSD
CSD
=0V
=0V;
=0V;
=0V;
=0V;
=0V;
=0V;
1575
2000
2750
1575
2000
2465
-10 10 %
1765
2000
2315
1765
2000
2155
-7 7 %
1840
2000
2135
1840
2000
2080
-4 4 %
=0V;
0 0
1 2
=0V;
0
1
420mA
=0V 5 V
µA µA
µA
V
SENSEH
I
SENSEH
t
DSENSE1H
t
DSENSE1L
Analog sense output voltage in fault condition
Analog sense output current in fault condition
Delay response time from falling edge of CS_DIS pin
Delay response time from rising edge of CS_DIS pin
(2)
(2)
VCC= 13V; R
VCC= 13V; V
V I
<4V, 0.5A<Iout<4A
SENSE
= 90% of I
SENSE
= 3.9 K 8V
SENSE
= 5V 9 mA
SENSE
SENSE max
50 100 µs
(see Figure 4.)
V I
< 4V, 0.5A<Iout<4A
SENSE
= 10% of I
SENSE
SENSE max
52s
(see Figure 4.)
11/37
Electrical specifications VN5E050AJ-E
Table 9. Current sense (8V<VCC<18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V I (see Figure 4.)
V I I I
t
DSENSE2H
t
DSENSE2H
Delay response time from rising edge of INPUT pin
Delay response time between rising edge of output current and rising edge of current sense
Delay response
t
DSENSE2L
time from falling edge of INPUT pin
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load OFF state detection.

Table 10. Open load detection (8V<VCC<18V)

V I (see Figure 4.)
< 4V, 0.5A<Iout<4A
SENSE
= 90% of I
SENSE
<4V,
SENSE
=90% of I
SENSE
= 90% of I
OUT
OUTMAX
=2A (see Figure 7)
< 4V, 0.5A<Iout<4A
SENSE
= 10% of I
SENSE
SENSE max
SENSEMAX,
OUTMAX
SENSE max
80 250 µs
40 µs
100 250 µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
Open load OFF state
V
voltage detection
OL
VIN = 0V 2
threshold
See
Figure 5.
4V
Output short circuit to
t
DSTKON
VCC detection delay at
See Figure 5. 180 1200 µs
turn Off
I
L(off2)r
I
L(off2)f
Off state output current at V
OUT
= 4V
Off state output current at V
OUT
= 2V
=0V; V
V
IN
rising from 0V to 4V
V
OUT
=0V; V
V
IN
falling from VCC to 2V
V
OUT
=0V
SENSE
SENSE=VSENSEH
-120 0 µA
;
-50 90 µA
Delay response from
= 4 V; VIN= 0V
V
OUT
V
SENSE
= 90% of V
SENSEH
20 µs
td_vol
output rising edge to
SENSE
rising edge in
V open load
12/37
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