VN5E025ASO-E
Single channel high-side driver with analog current sense for automotive applications
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Datasheet − production data |
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Features |
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Max supply voltage |
VCC |
41 V |
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SO-16L |
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Operating voltage range |
VCC |
4.5 to 28 V |
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("1($'5 |
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Max on-state resistance |
RON |
25 mΩ |
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Overtemperature shutdown with |
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Current limitation (typ) |
ILIMH |
60 A |
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autorestart (thermal shutdown) |
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Reverse battery protected |
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Off-state supply current |
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2 µA(1) |
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Electrostatic discharge protection |
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S |
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1. Typical value with all loads connected.
Application
■General
–Inrush current active management by power limitation
–Very low standby current
–3.0 V CMOS compatible inputs
–Optimized electromagnetic emissions
–Very low electromagnetic susceptibility
–Compliant with European directive 2002/95/EC
–Very low current sense leakage
–AEC-Q100 qualified
■Diagnostic functions
–Proportional load current sense
–High current sense precision for wide currents range
–Current sense disable
–Off-state open-load detection
–Output short to VCC detection
–Overload and short to ground (power limitation) indication
–Thermal shutdown indication
■Protections
–Undervoltage shutdown
–Overvoltage clamp
–Load current limitation
–Self limiting of fast thermal transients
–Protection against loss of ground and loss of VCC
■All types of resistive, inductive and capacitive loads
■Suitable as LED driver
Description
The VN5E025ASO-E is a single channel highside driver manufactured using ST proprietary VIPower® M0-5 technology and housed in SO-16L package. The device is designed to drive 12 V automotive grounded loads, and to provide protection and diagnostics. It also implements a 3 V and 5 V CMOS-compatible interface for use with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with autorestart and overvoltage active clamp. A dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, shortcircuit to VCC diagnosis and on-state and off-state open-load detection. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to share the external sense resistor with similar devices.
June 2012 |
Doc ID 022463 Rev 3 |
1/37 |
This is information on a product in full production. |
www.st.com |
Contents |
VN5E025ASO-E |
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Contents
1 |
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 5 |
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2 |
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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2.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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2.2 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8 |
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2.3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8 |
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2.4 |
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
18 |
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2.5 |
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
21 |
3 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
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3.1 |
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . |
24 |
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . . 25
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28
4 |
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . |
29 |
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4.1 |
SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
29 |
5 |
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
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5.1 |
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
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5.2 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5.3 |
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6 |
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
35 |
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7 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
36 |
2/37 |
Doc ID 022463 Rev 3 |
VN5E025ASO-E |
List of tables |
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List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6. Switching characteristics (VCC = 13 V, Tj = 25°C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 10. Open-load detection (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 15. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 16. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Doc ID 022463 Rev 3 |
3/37 |
List of figures |
VN5E025ASO-E |
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List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. IOUT / ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 16. TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 19. Input clamp level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 24. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 27. ILIMH vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 34. Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 35. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 36. \Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29 Figure 37. SO-16L thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 38. Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 39. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 40. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 41. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4/37 |
Doc ID 022463 Rev 3 |
VN5E025ASO-E |
Block diagram and pin description |
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VCC |
Signal Clamp |
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Undervoltage |
Control & Diagnostic |
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Power |
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Clamp |
IN |
DRIVER |
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VON |
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Limitation |
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Over |
Current |
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temp. |
Limitation |
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OFF State |
CS_ |
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Open load |
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DIS |
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VSENSEH |
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CS |
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Current |
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Sense |
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OUT |
LOGIC |
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OVERLOAD PROTECTION |
(ACTIVE POWER LIMITATION) |
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GND |
Table 1. |
Pin function |
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Function |
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VCC |
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Battery connection. |
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OUTPUT |
Power output. |
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GND |
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Ground connection. Must be reverse battery protected by an external diode / |
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resistor network. |
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INPUT |
Voltage controlled input pin with hysteresis, CMOS compatible. It controls |
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output switch state. |
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CURRENT SENSE |
Analog current sense pin, it delivers a current proportional to the load current. |
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CS_DIS |
Active high CMOS compatible pin, to disable the current sense pin. |
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Doc ID 022463 Rev 3 |
5/37 |
Block diagram and pin description |
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VN5E025ASO-E |
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Figure 2. |
Configuration diagram (top view) |
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9FF |
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Table 2. |
Suggested connections for unused and not connected pins |
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Connection / pin |
Current sense |
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N.C. |
Output |
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Input |
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CS_DIS |
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Floating |
Not allowed |
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X(1) |
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To ground |
Through 1 kΩ |
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Through |
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Through 10 kΩ |
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Through 10 kΩ |
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resistor |
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22 kΩ resistor |
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resistor |
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resistor |
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1. X: do not care.
6/37 |
Doc ID 022463 Rev 3 |
VN5E025ASO-E |
Electrical specifications |
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IS |
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VCC |
VF |
VCC |
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ICSD |
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IOUT |
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OUTPUT |
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CS_DIS |
VOUT |
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V |
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CSD |
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IIN |
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INPUT |
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ISENSE |
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CURRENT SENSE |
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VIN |
GND |
VSENSE |
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IGND |
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Note: |
VF = VOUT - VCC during reverse battery condition. |
2.1Absolute maximum ratings
Applying stress which exceeds the rating listed in Table 3: Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability.
Table 3. |
Absolute maximum ratings |
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Symbol |
Parameter |
Value |
Unit |
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VCC |
DC supply voltage |
41 |
V |
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-VCC |
Reverse DC supply voltage |
0.3 |
V |
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-IGND |
DC reverse ground pin current |
200 |
mA |
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IOUT |
DC output current |
Internally limited |
A |
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-IOUT |
Reverse DC output current |
20 |
A |
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IIN |
DC input current |
-1 to 10 |
mA |
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ICSD |
DC current sense disable input current |
-1 to 10 |
mA |
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-ICSENSE |
DC reverse CS pin current |
200 |
mA |
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VCSENSE |
Current sense maximum voltage |
VCC-41 |
V |
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+VCC |
V |
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Maximum switching energy (single pulse) |
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EMAX |
L = 0.8 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150°C; |
140 |
mJ |
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IOUT = IlimL(Typ.) |
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Electrical specifications |
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Table 3. |
Absolute maximum ratings (continued) |
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Symbol |
Parameter |
Value |
Unit |
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Electrostatic discharge |
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(Human Body Model: R = 1.5 KΩ; C = 100 pF) |
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– INPUT |
4000 |
V |
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VESD |
– CURRENT SENSE |
2000 |
V |
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– CS_DIS |
4000 |
V |
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– OUTPUT |
5000 |
V |
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– VCC |
5000 |
V |
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VESD |
Charge device model (CDM-AEC-Q100-011) |
750 |
V |
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Tj |
Junction operating temperature |
-40 to 150 |
°C |
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Tstg |
Storage temperature |
-55 to 150 |
°C |
2.2Thermal data
Table 4. |
Thermal data |
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Symbol |
Parameter |
Typ. value |
Unit |
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Rthj-pcb |
Thermal resistance junction-pcb(1) |
19 |
°C/W |
Rthj-amb |
Thermal resistance junction-ambient |
See Figure 36 |
°C/W |
1. The measure is done in accordance with the JESD 51-8.
Values specified in this section are for 8 V < VCC < 28 V; -40°C < Tj < 150°C, unless otherwise stated.
Table 5. |
Power section |
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Symbol |
Parameter |
Test conditions |
Min. |
Typ. |
Max. |
Unit |
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VCC |
Operating supply |
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4.5 |
13 |
28 |
V |
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voltage |
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VUSD |
Undervoltage shutdown |
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3.5 |
4.5 |
V |
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VUSDhyst |
Undervoltage shutdown |
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0.5 |
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V |
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hysteresis |
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IOUT = 3 A; Tj = 25°C |
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25 |
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mΩ |
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Ron |
On-state resistance |
IOUT = 3 A; Tj = 150°C |
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50 |
mΩ |
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IOUT = 3 A; VCC = 5 V; Tj = 25°C |
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35 |
mΩ |
Vclamp |
Clamp voltage |
IS = 20 mA |
41 |
46 |
52 |
V |
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Off-state; VCC = 13 V; Tj = 25°C; |
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2 |
(1) |
(1) |
µA |
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VIN = VOUT = VSENSE = VCSD = 0 V |
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5 |
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IS |
Supply current |
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On-state; VCC = 13 V; VIN = 5 V; |
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1.5 |
3 |
mA |
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IOUT = 0 A |
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Electrical specifications |
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Table 5. |
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Power section (continued) |
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Symbol |
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Parameter |
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Test conditions |
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Min. |
Typ. |
Max. |
Unit |
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VIN = VOUT = 0 V; VCC = 13 V; |
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0 |
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0.01 |
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3 |
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µA |
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IL(off1) |
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Off-state output current |
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Tj |
= 25°C |
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VIN = VOUT = 0 V; VCC = 13 V; |
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0 |
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5 |
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µA |
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Tj |
= 125°C |
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VF |
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Output - VCC diode |
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-IOUT = 2 A; Tj = 150°C |
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0.7 |
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V |
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voltage |
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1. PowerMOS leakage included. |
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Table 6. |
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Switching characteristics (VCC = 13 V, Tj = 25°C) |
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Symbol |
Parameter |
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Test conditions |
Min. |
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Typ. |
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Max. |
|
Unit |
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td(on) |
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Turn-on delay time |
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RL = 4.3 Ω |
— |
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15 |
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— |
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µs |
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(see Figure 6) |
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td(off) |
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Turn-off delay time |
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RL = 4.3 Ω |
— |
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40 |
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— |
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µs |
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(see Figure 6) |
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(dVOUT/dt)on |
Turn-on voltage slope |
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RL = 4.3 Ω |
— |
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See |
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— |
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V/µs |
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Figure 26 |
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(dVOUT/dt)off |
Turn-off voltage slope |
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RL = 4.3 Ω |
— |
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See |
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— |
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V/µs |
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Figure 28 |
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WON |
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Switching energy losses |
|
RL = 4.3 Ω |
— |
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0.4 |
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— |
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mJ |
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during twon |
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(see Figure 6) |
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WOFF |
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Switching energy losses |
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RL = 4.3 Ω |
— |
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0.5 |
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— |
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mJ |
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during twoff |
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(see Figure 6) |
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Table 7. |
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Logic inputs |
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Symbol |
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Parameter |
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Test conditions |
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Min. |
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Typ. |
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Max. |
|
Unit |
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VIL |
|
Input low level voltage |
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0.9 |
|
V |
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IIL |
|
Low level input current |
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VIN = 0.9 V |
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1 |
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µA |
|||||
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VIH |
|
Input high level voltage |
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2.1 |
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V |
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IIH |
|
High level input current |
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VIN = 2.1 V |
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10 |
|
µA |
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VI(hyst) |
|
Input hysteresis voltage |
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0.25 |
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V |
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VICL |
|
Input clamp voltage |
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IIN = 1 mA |
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5.5 |
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7 |
|
V |
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IIN = -1 mA |
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-0.7 |
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V |
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VCSDL |
|
CS_DIS low level voltage |
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0.9 |
|
V |
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ICSDL |
|
Low level CS_DIS current |
|
|
VCSD = 0.9 V |
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1 |
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µA |
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VCSDH |
|
CS_DIS high level voltage |
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2.1 |
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|
V |
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ICSDH |
|
High level CS_DIS current |
|
|
VCSD = 2.1 V |
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10 |
|
µA |
||||
|
VCSD(hyst) |
|
CS_DIS hysteresis voltage |
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0.25 |
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V |
Doc ID 022463 Rev 3 |
9/37 |
Electrical specifications |
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Table 7. |
|
Logic inputs (continued) |
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Symbol |
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Parameter |
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Test conditions |
|
Min. |
Typ. |
|
Max. |
|
Unit |
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VCSCL |
|
CS_DIS clamp voltage |
|
ICSD = 1 mA |
|
5.5 |
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7 |
|
V |
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ICSD = -1 mA |
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-0.7 |
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V |
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Table 8. |
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Protection and diagnostics (1) |
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Symbol |
|
Parameter |
Test conditions |
|
Min. |
|
Typ. |
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Max. |
|
Unit |
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IlimH |
DC short circuit current |
VCC = 13 V |
|
43 |
|
60 |
85 |
|
A |
|||||
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5 V < VCC < 28 V |
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85 |
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A |
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IlimL |
Short circuit current |
VCC = 13 V; |
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15 |
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A |
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during thermal cycling |
TR < Tj < TTSD |
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TTSD |
Shutdown temperature |
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150 |
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175 |
200 |
|
°C |
||||
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TR |
Reset temperature |
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TRS + 1 |
|
TRS + 5 |
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°C |
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TRS |
Thermal reset of status |
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135 |
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°C |
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THYST |
Thermal hysteresis |
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7 |
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°C |
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(TTSD-TR) |
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VDEMAG |
Turn-off output voltage |
IOUT = 2 A; VIN = 0; |
|
VCC-41 |
|
VCC-46 |
VCC-52 |
|
V |
|||||
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clamp |
L = 6 mH |
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Output voltage drop |
IOUT = 0.1 A; |
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VON |
limitation |
Tj = -40°C...150°C |
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25 |
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mV |
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(see Figure 8) |
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1.To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles.
Table 9. |
Current sense (8 V < VCC < 18 V) |
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|||
Symbol |
Parameter |
|
|
Test conditions |
Min. |
Typ. |
Max. |
Unit |
|
|
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|
|
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|
KLED |
|
IOUT = 0.05 A; |
1370 |
3180 |
4930 |
|
||
IOUT/ISENSE |
VSENSE = 0.5 V; VCSD = 0 V; |
|
||||||
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Tj = -40°C...150°C |
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K0 |
|
IOUT = 0.5 A; VSENSE = 0.5 V; |
1990 |
3050 |
4120 |
|
||
IOUT/ISENSE |
VCSD = 0 V; |
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||||||
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Tj = -40°C...150°C |
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IOUT = 2 A; VSENSE = 4 V; |
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K1 |
IOUT/ISENSE |
VCSD = 0 V; |
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Tj = -40°C...150°C |
2100 |
2860 |
3840 |
|
||||
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||||||
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Tj = 25°C...150°C |
2220 |
2860 |
3500 |
|
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dK /K (1) |
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IOUT = 2 A; VSENSE = 4 V; |
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||
Current sense ratio drift |
V |
CSD |
= 0 V; |
-10 |
|
10 |
% |
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1 1 |
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|
Tj = -40°C...150°C |
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10/37 |
Doc ID 022463 Rev 3 |
VN5E025ASO-E |
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Electrical specifications |
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Table 9. |
Current sense (8 V < VCC < 18 V) (continued) |
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Symbol |
Parameter |
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Test conditions |
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Min. |
Typ. |
Max. |
Unit |
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||||
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IOUT = 3 A; VSENSE = 4 V; |
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K2 |
|
IOUT/ISENSE |
VCSD = 0 V; |
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||||
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Tj = -40°C...150°C |
|
2300 |
2850 |
3520 |
|
||||||
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Tj = 25°C...150°C |
|
2420 |
2850 |
3300 |
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dK /K (1) |
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IOUT = 3 A; VSENSE = 4 V; |
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Current sense ratio drift |
V |
CSD |
= 0 V; |
|
-7 |
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7 |
% |
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2 |
2 |
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Tj = -40°C...150°C |
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IOUT = 10 A; VSENSE = 4 V; |
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K3 |
|
IOUT/ISENSE |
VCSD = 0 V; |
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||||
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Tj = -40°C...150°C |
|
2690 |
2830 |
3060 |
|
||||||
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||||||||
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Tj = 25°C...150°C |
|
2700 |
2830 |
3020 |
|
||||
|
dK /K (1) |
|
IOUT = 10 A; VSENSE = 4 V; |
|
-4 |
|
4 |
% |
|||||
|
Current sense ratio drift |
V |
CSD |
= 0 V; |
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3 |
3 |
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Tj = -40°C...150°C |
|
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|
||||
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|
IOUT = 0 A; VSENSE = 0 V; |
|
0 |
|
1 |
µA |
||||
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|
|
VCSD = 5 V; VIN = 0 V; |
|
|
|||||||
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|
Tj = -40°C...150°C |
|
|
|
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|
||||
|
|
|
Analog sense leakage |
IOUT = 0 A; VSENSE = 0 V; |
|
0 |
|
2 |
µA |
||||
|
ISENSE0 |
current |
VCSD = 0 V; VIN = 5 V; |
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Tj = -40°C...150°C |
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IOUT = 2 A; VSENSE = 0 V; |
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1 |
µA |
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VCSD = 5 V; VIN = 5 V; |
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Tj = -40°C...150°C |
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Open-load on-state |
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VIN = 5 V, 8 V < VCC < 18 V; |
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IOL |
current detection |
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5 |
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30 |
mA |
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ISENSE = 5 µA |
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threshold |
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VSENSE |
Max analog sense output |
IOUT = 3 A; VCSD = 0 V |
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5 |
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V |
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voltage |
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(2) |
Analog sense output |
VCC = 13 V; RSENSE = 3.9 KΩ |
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VSENSEH |
voltage in fault condition |
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8 |
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V |
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(2) |
Analog sense output |
VCC = 13 V; VSENSE = 5 V |
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9 |
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mA |
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ISENSEH |
current in fault condition |
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VSENSE < 4 V; |
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tDSENSE1H |
Delay response time from |
0.5 A < IOUT < 10 A; |
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40 |
100 |
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falling edge of CS_DIS pin |
I |
SENSE |
= 90% of I |
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SENSE max |
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(see Figure 4) |
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VSENSE < 4 V; |
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tDSENSE1L |
Delay response time from |
0.5 A < IOUT < 10 A; |
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5 |
20 |
µs |
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rising edge of CS_DIS pin |
I |
SENSE |
= 10% of I |
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SENSE max |
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(see Figure 4) |
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VSENSE < 4 V; |
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tDSENSE2H |
Delay response time from |
0.5 A < IOUT < 10 A; |
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80 |
300 |
µs |
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rising edge of INPUT pin |
I |
SENSE |
= 90% of I |
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SENSE max |
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(see Figure 4) |
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Doc ID 022463 Rev 3 |
11/37 |
Electrical specifications |
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VN5E025ASO-E |
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Table 9. |
Current sense (8 V < VCC < 18 V) (continued) |
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Symbol |
Parameter |
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Test conditions |
Min. |
Typ. |
Max. |
Unit |
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Delay response time |
VSENSE < 4 V; |
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tDSENSE2H |
between rising edge of |
ISENSE = 90% of ISENSEMAX, |
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110 |
µs |
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output current and rising |
I |
OUT |
= |
90% of I |
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edge of current sense |
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OUTMAX |
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IOUTMAX = 3 A (see Figure 7) |
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VSENSE < 4 V; |
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tDSENSE2L |
Delay response time from |
0.5 A < IOUT < 10 A; |
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80 |
250 |
µs |
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falling edge of INPUT pin |
I |
SENSE |
= 10% of I |
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SENSE max |
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(see Figure 4) |
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1.Parameter guaranteed by design, it is not tested.
2.Fault condition includes: power limitation, overtemperature and open-load off-state detection.
Symbol |
Parameter |
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Test conditions |
Min. |
Typ. |
Max. |
Unit |
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Open-load off-state |
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VOL |
voltage detection |
VIN = 0 V |
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2 |
— |
4 |
V |
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threshold |
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Output short circuit to |
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tDSTKON |
VCC detection delay at |
See Figure 5 |
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180 |
— |
1200 |
µs |
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turn-off |
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IL(off2)r |
Off-state output current at |
VIN = 0 V; VSENSE = 0 V; |
-120 |
— |
0 |
µA |
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VOUT = 4 V |
VOUT rising from 0 V to 4 V |
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Off-state output current at |
VIN = 0 V; |
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I |
L(off2)f |
V |
SENSE |
= V |
SENSEH |
; V |
-50 |
— |
90 |
µA |
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VOUT = 2 V |
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OUT |
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falling from VCC to 2 V |
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Delay response from |
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td_vol |
output rising edge to |
VOUT = 4 V; VIN = 0 V; |
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20 |
µs |
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VSENSE rising edge in |
VSENSE = 90% of VSENSEH |
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open-load |
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INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H tDSENSE1L |
t |
t |
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DSENSE1H |
DSENSE2L |
12/37 |
Doc ID 022463 Rev 3 |