ST VN5E025ASO-E User Manual

VN5E025ASO-E

Single channel high-side driver with analog current sense for automotive applications

 

 

 

 

Datasheet production data

Features

 

 

 

 

Max supply voltage

VCC

41 V

 

SO-16L

 

 

Operating voltage range

VCC

4.5 to 28 V

 

("1($'5

Max on-state resistance

RON

25 mΩ

Overtemperature shutdown with

Current limitation (typ)

ILIMH

60 A

 

autorestart (thermal shutdown)

Reverse battery protected

Off-state supply current

I

2 µA(1)

Electrostatic discharge protection

 

S

 

1. Typical value with all loads connected.

Application

General

Inrush current active management by power limitation

Very low standby current

3.0 V CMOS compatible inputs

Optimized electromagnetic emissions

Very low electromagnetic susceptibility

Compliant with European directive 2002/95/EC

Very low current sense leakage

AEC-Q100 qualified

Diagnostic functions

Proportional load current sense

High current sense precision for wide currents range

Current sense disable

Off-state open-load detection

Output short to VCC detection

Overload and short to ground (power limitation) indication

Thermal shutdown indication

Protections

Undervoltage shutdown

Overvoltage clamp

Load current limitation

Self limiting of fast thermal transients

Protection against loss of ground and loss of VCC

All types of resistive, inductive and capacitive loads

Suitable as LED driver

Description

The VN5E025ASO-E is a single channel highside driver manufactured using ST proprietary VIPower® M0-5 technology and housed in SO-16L package. The device is designed to drive 12 V automotive grounded loads, and to provide protection and diagnostics. It also implements a 3 V and 5 V CMOS-compatible interface for use with any microcontroller.

The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with autorestart and overvoltage active clamp. A dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, shortcircuit to VCC diagnosis and on-state and off-state open-load detection. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to share the external sense resistor with similar devices.

June 2012

Doc ID 022463 Rev 3

1/37

This is information on a product in full production.

www.st.com

Contents

VN5E025ASO-E

 

 

Contents

1

Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. 5

2

Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

 

2.1

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

 

2.2

Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

 

2.3

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

 

2.4

Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

 

2.5

Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

3

Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

24

 

3.1

GND protection network against reverse battery . . . . . . . . . . . . . . . . . . .

24

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 27

3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28

4

Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . .

29

 

4.1

SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

29

5

Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

32

 

5.1

ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

32

 

5.2

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

32

 

5.3

Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

34

6

Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

35

7

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

36

2/37

Doc ID 022463 Rev 3

VN5E025ASO-E

List of tables

 

 

List of tables

Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6. Switching characteristics (VCC = 13 V, Tj = 25°C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 10. Open-load detection (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 15. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 16. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Doc ID 022463 Rev 3

3/37

List of figures

VN5E025ASO-E

 

 

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Delay response time between rising edge of output current and rising edge of current

sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. IOUT / ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 16. TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 19. Input clamp level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 24. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 27. ILIMH vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 34. Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 35. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 36. \Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29 Figure 37. SO-16L thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 38. Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 39. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 40. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 41. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

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VN5E025ASO-E

Block diagram and pin description

 

 

1 Block diagram and pin description

Figure 1. Block diagram

 

 

VCC

Signal Clamp

 

 

Undervoltage

Control & Diagnostic

 

 

Power

 

 

Clamp

IN

DRIVER

 

 

 

VON

 

 

Limitation

 

Over

Current

 

temp.

Limitation

 

 

OFF State

CS_

 

Open load

 

 

DIS

 

 

 

VSENSEH

 

CS

 

Current

 

 

 

 

Sense

 

 

OUT

LOGIC

 

OVERLOAD PROTECTION

(ACTIVE POWER LIMITATION)

 

 

GND

Table 1.

Pin function

Name

 

Function

 

 

 

VCC

 

Battery connection.

OUTPUT

Power output.

 

 

 

GND

 

Ground connection. Must be reverse battery protected by an external diode /

 

resistor network.

 

 

 

 

 

INPUT

Voltage controlled input pin with hysteresis, CMOS compatible. It controls

output switch state.

 

 

 

 

CURRENT SENSE

Analog current sense pin, it delivers a current proportional to the load current.

 

 

CS_DIS

Active high CMOS compatible pin, to disable the current sense pin.

 

 

 

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Block diagram and pin description

 

 

 

 

 

 

 

VN5E025ASO-E

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 2.

Configuration diagram (top view)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9FF

 

 

 

 

 

 

 

9FF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

*1'

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1&

 

 

 

 

 

 

1&

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1&

 

 

 

 

 

 

,1387

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1&

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

& 6(16(

 

 

 

 

 

 

 

287387

 

 

 

 

 

1&

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

287387

 

 

 

 

 

&6 ',6

 

 

 

 

 

 

 

287387

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9FF

 

 

 

 

 

 

9FF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

("1($'5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 2.

Suggested connections for unused and not connected pins

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Connection / pin

Current sense

 

 

N.C.

Output

 

 

Input

 

CS_DIS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Floating

Not allowed

 

 

X(1)

X

 

 

X

 

X

 

To ground

Through 1 kΩ

 

 

X

Through

 

Through 10 kΩ

 

Through 10 kΩ

 

resistor

 

 

22 kΩ resistor

 

resistor

 

resistor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1. X: do not care.

6/37

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Electrical specifications

 

 

2 Electrical specifications

Figure 3. Current and voltage conventions

 

 

IS

 

 

VCC

VF

VCC

 

 

 

ICSD

 

IOUT

 

OUTPUT

 

 

CS_DIS

VOUT

 

V

 

 

CSD

 

 

 

IIN

 

 

 

INPUT

 

ISENSE

 

CURRENT SENSE

 

 

VIN

GND

VSENSE

 

 

 

 

IGND

 

 

Note:

VF = VOUT - VCC during reverse battery condition.

2.1Absolute maximum ratings

Applying stress which exceeds the rating listed in Table 3: Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability.

Table 3.

Absolute maximum ratings

 

 

Symbol

Parameter

Value

Unit

 

 

 

 

VCC

DC supply voltage

41

V

-VCC

Reverse DC supply voltage

0.3

V

-IGND

DC reverse ground pin current

200

mA

IOUT

DC output current

Internally limited

A

-IOUT

Reverse DC output current

20

A

IIN

DC input current

-1 to 10

mA

ICSD

DC current sense disable input current

-1 to 10

mA

-ICSENSE

DC reverse CS pin current

200

mA

VCSENSE

Current sense maximum voltage

VCC-41

V

+VCC

V

 

 

 

Maximum switching energy (single pulse)

 

 

EMAX

L = 0.8 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150°C;

140

mJ

 

IOUT = IlimL(Typ.)

 

 

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Electrical specifications

VN5E025ASO-E

 

 

 

 

 

 

Table 3.

Absolute maximum ratings (continued)

 

 

 

 

 

 

 

 

Symbol

Parameter

Value

Unit

 

 

 

 

 

 

 

Electrostatic discharge

 

 

 

 

(Human Body Model: R = 1.5 KΩ; C = 100 pF)

 

 

 

 

– INPUT

4000

V

 

VESD

– CURRENT SENSE

2000

V

 

 

– CS_DIS

4000

V

 

 

– OUTPUT

5000

V

 

 

– VCC

5000

V

 

VESD

Charge device model (CDM-AEC-Q100-011)

750

V

 

Tj

Junction operating temperature

-40 to 150

°C

 

Tstg

Storage temperature

-55 to 150

°C

2.2Thermal data

Table 4.

Thermal data

 

 

Symbol

Parameter

Typ. value

Unit

 

 

 

 

Rthj-pcb

Thermal resistance junction-pcb(1)

19

°C/W

Rthj-amb

Thermal resistance junction-ambient

See Figure 36

°C/W

1. The measure is done in accordance with the JESD 51-8.

2.3Electrical characteristics

Values specified in this section are for 8 V < VCC < 28 V; -40°C < Tj < 150°C, unless otherwise stated.

Table 5.

Power section

 

 

 

 

 

 

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

VCC

Operating supply

 

4.5

13

28

V

voltage

 

VUSD

Undervoltage shutdown

 

 

3.5

4.5

V

VUSDhyst

Undervoltage shutdown

 

 

0.5

 

V

hysteresis

 

 

 

 

 

IOUT = 3 A; Tj = 25°C

 

25

 

Ron

On-state resistance

IOUT = 3 A; Tj = 150°C

 

 

 

50

 

 

IOUT = 3 A; VCC = 5 V; Tj = 25°C

 

 

 

35

Vclamp

Clamp voltage

IS = 20 mA

41

46

52

V

 

 

Off-state; VCC = 13 V; Tj = 25°C;

 

2

(1)

(1)

µA

 

 

VIN = VOUT = VSENSE = VCSD = 0 V

 

 

5

IS

Supply current

 

 

 

 

 

On-state; VCC = 13 V; VIN = 5 V;

 

1.5

3

mA

 

 

 

 

 

IOUT = 0 A

 

 

 

 

 

8/37

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Electrical specifications

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 5.

 

 

Power section (continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

 

 

Parameter

 

 

 

 

Test conditions

 

 

 

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN = VOUT = 0 V; VCC = 13 V;

 

 

 

0

 

 

0.01

 

3

 

µA

 

IL(off1)

 

Off-state output current

 

Tj

= 25°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN = VOUT = 0 V; VCC = 13 V;

 

 

 

0

 

 

 

 

5

 

µA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tj

= 125°C

 

 

 

 

 

 

 

 

 

 

 

 

 

VF

 

Output - VCC diode

 

-IOUT = 2 A; Tj = 150°C

 

 

 

 

 

 

 

 

 

0.7

 

V

 

 

voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1. PowerMOS leakage included.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 6.

 

 

Switching characteristics (VCC = 13 V, Tj = 25°C)

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

 

 

 

Test conditions

Min.

 

Typ.

 

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

td(on)

 

 

Turn-on delay time

 

 

RL = 4.3 Ω

 

 

 

15

 

 

µs

 

 

 

 

 

(see Figure 6)

 

 

 

 

 

 

td(off)

 

 

Turn-off delay time

 

 

RL = 4.3 Ω

 

 

 

40

 

 

µs

 

 

 

 

 

(see Figure 6)

 

 

 

 

 

 

(dVOUT/dt)on

Turn-on voltage slope

 

 

RL = 4.3 Ω

 

 

 

See

 

 

V/µs

 

 

 

 

 

Figure 26

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(dVOUT/dt)off

Turn-off voltage slope

 

 

RL = 4.3 Ω

 

 

 

See

 

 

V/µs

 

 

 

 

 

Figure 28

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WON

 

 

Switching energy losses

 

RL = 4.3 Ω

 

 

 

0.4

 

 

mJ

 

 

 

during twon

 

 

(see Figure 6)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WOFF

 

 

Switching energy losses

 

RL = 4.3 Ω

 

 

 

0.5

 

 

mJ

 

 

 

during twoff

 

 

(see Figure 6)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 7.

 

 

Logic inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

 

Parameter

 

 

 

Test conditions

 

 

Min.

 

 

Typ.

 

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

 

Input low level voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

0.9

 

V

 

IIL

 

Low level input current

 

 

 

VIN = 0.9 V

 

 

1

 

 

 

 

 

 

µA

 

VIH

 

Input high level voltage

 

 

 

 

 

 

2.1

 

 

 

 

 

 

V

 

IIH

 

High level input current

 

 

 

VIN = 2.1 V

 

 

 

 

 

 

 

 

 

10

 

µA

 

VI(hyst)

 

Input hysteresis voltage

 

 

 

 

 

 

0.25

 

 

 

 

 

 

V

 

VICL

 

Input clamp voltage

 

 

 

IIN = 1 mA

 

 

5.5

 

 

 

 

7

 

V

 

 

 

 

 

IIN = -1 mA

 

 

 

 

 

 

-0.7

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCSDL

 

CS_DIS low level voltage

 

 

 

 

 

 

 

 

 

 

 

 

0.9

 

V

 

ICSDL

 

Low level CS_DIS current

 

 

VCSD = 0.9 V

 

 

1

 

 

 

 

 

 

µA

 

VCSDH

 

CS_DIS high level voltage

 

 

 

 

 

2.1

 

 

 

 

 

 

V

 

ICSDH

 

High level CS_DIS current

 

 

VCSD = 2.1 V

 

 

 

 

 

 

 

 

 

10

 

µA

 

VCSD(hyst)

 

CS_DIS hysteresis voltage

 

 

 

0.25

 

 

 

 

 

 

V

Doc ID 022463 Rev 3

9/37

Electrical specifications

 

 

 

 

 

 

 

VN5E025ASO-E

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 7.

 

Logic inputs (continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

Parameter

 

Test conditions

 

Min.

Typ.

 

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCSCL

 

CS_DIS clamp voltage

 

ICSD = 1 mA

 

5.5

 

 

 

7

 

V

 

 

 

ICSD = -1 mA

 

 

 

 

-0.7

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 8.

 

Protection and diagnostics (1)

 

 

 

 

 

 

 

 

 

 

Symbol

 

Parameter

Test conditions

 

Min.

 

Typ.

 

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

IlimH

DC short circuit current

VCC = 13 V

 

43

 

60

85

 

A

 

5 V < VCC < 28 V

 

 

 

 

 

 

85

 

A

 

 

 

 

 

 

 

 

 

 

 

 

IlimL

Short circuit current

VCC = 13 V;

 

 

 

 

15

 

 

 

A

 

during thermal cycling

TR < Tj < TTSD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TTSD

Shutdown temperature

 

 

 

150

 

175

200

 

°C

 

TR

Reset temperature

 

 

 

TRS + 1

 

TRS + 5

 

 

 

°C

 

TRS

Thermal reset of status

 

 

 

135

 

 

 

 

 

 

°C

 

THYST

Thermal hysteresis

 

 

 

 

 

 

7

 

 

 

°C

 

(TTSD-TR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDEMAG

Turn-off output voltage

IOUT = 2 A; VIN = 0;

 

VCC-41

 

VCC-46

VCC-52

 

V

 

clamp

L = 6 mH

 

 

 

 

 

Output voltage drop

IOUT = 0.1 A;

 

 

 

 

 

 

 

 

 

 

 

VON

limitation

Tj = -40°C...150°C

 

 

 

 

25

 

 

 

mV

 

 

 

 

(see Figure 8)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles.

Table 9.

Current sense (8 V < VCC < 18 V)

 

 

 

 

Symbol

Parameter

 

 

Test conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

 

KLED

 

IOUT = 0.05 A;

1370

3180

4930

 

IOUT/ISENSE

VSENSE = 0.5 V; VCSD = 0 V;

 

 

 

Tj = -40°C...150°C

 

 

 

 

K0

 

IOUT = 0.5 A; VSENSE = 0.5 V;

1990

3050

4120

 

IOUT/ISENSE

VCSD = 0 V;

 

 

 

Tj = -40°C...150°C

 

 

 

 

 

 

IOUT = 2 A; VSENSE = 4 V;

 

 

 

 

K1

IOUT/ISENSE

VCSD = 0 V;

 

 

 

 

Tj = -40°C...150°C

2100

2860

3840

 

 

 

 

 

 

Tj = 25°C...150°C

2220

2860

3500

 

dK /K (1)

 

IOUT = 2 A; VSENSE = 4 V;

 

 

 

 

Current sense ratio drift

V

CSD

= 0 V;

-10

 

10

%

1 1

 

 

 

 

 

 

 

 

 

Tj = -40°C...150°C

 

 

 

 

10/37

Doc ID 022463 Rev 3

VN5E025ASO-E

 

 

 

 

 

 

 

Electrical specifications

 

 

 

 

 

 

 

 

 

 

Table 9.

Current sense (8 V < VCC < 18 V) (continued)

 

 

 

 

 

 

Symbol

Parameter

 

 

 

 

Test conditions

 

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOUT = 3 A; VSENSE = 4 V;

 

 

 

 

 

 

K2

 

IOUT/ISENSE

VCSD = 0 V;

 

 

 

 

 

 

 

Tj = -40°C...150°C

 

2300

2850

3520

 

 

 

 

 

 

 

 

 

 

 

Tj = 25°C...150°C

 

2420

2850

3300

 

 

dK /K (1)

 

IOUT = 3 A; VSENSE = 4 V;

 

 

 

 

 

 

Current sense ratio drift

V

CSD

= 0 V;

 

-7

 

7

%

 

2

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tj = -40°C...150°C

 

 

 

 

 

 

 

 

 

IOUT = 10 A; VSENSE = 4 V;

 

 

 

 

 

 

K3

 

IOUT/ISENSE

VCSD = 0 V;

 

 

 

 

 

 

 

Tj = -40°C...150°C

 

2690

2830

3060

 

 

 

 

 

 

 

 

 

 

 

Tj = 25°C...150°C

 

2700

2830

3020

 

 

dK /K (1)

 

IOUT = 10 A; VSENSE = 4 V;

 

-4

 

4

%

 

Current sense ratio drift

V

CSD

= 0 V;

 

 

 

3

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tj = -40°C...150°C

 

 

 

 

 

 

 

 

 

IOUT = 0 A; VSENSE = 0 V;

 

0

 

1

µA

 

 

 

 

VCSD = 5 V; VIN = 0 V;

 

 

 

 

 

 

Tj = -40°C...150°C

 

 

 

 

 

 

 

 

Analog sense leakage

IOUT = 0 A; VSENSE = 0 V;

 

0

 

2

µA

 

ISENSE0

current

VCSD = 0 V; VIN = 5 V;

 

 

 

 

 

 

Tj = -40°C...150°C

 

 

 

 

 

 

 

 

 

IOUT = 2 A; VSENSE = 0 V;

 

0

 

1

µA

 

 

 

 

VCSD = 5 V; VIN = 5 V;

 

 

 

 

 

 

Tj = -40°C...150°C

 

 

 

 

 

 

 

 

Open-load on-state

 

VIN = 5 V, 8 V < VCC < 18 V;

 

 

 

 

 

 

IOL

current detection

 

 

5

 

30

mA

 

ISENSE = 5 µA

 

 

 

 

 

threshold

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VSENSE

Max analog sense output

IOUT = 3 A; VCSD = 0 V

 

5

 

 

V

 

voltage

 

 

 

 

 

(2)

Analog sense output

VCC = 13 V; RSENSE = 3.9 KΩ

 

 

 

 

 

 

VSENSEH

voltage in fault condition

 

 

8

 

V

 

 

(2)

Analog sense output

VCC = 13 V; VSENSE = 5 V

 

 

9

 

mA

 

ISENSEH

current in fault condition

 

 

 

 

 

 

 

VSENSE < 4 V;

 

 

 

 

 

 

tDSENSE1H

Delay response time from

0.5 A < IOUT < 10 A;

 

 

40

100

µs

 

falling edge of CS_DIS pin

I

SENSE

= 90% of I

 

 

 

 

 

 

 

SENSE max

 

 

 

 

 

 

 

 

 

(see Figure 4)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VSENSE < 4 V;

 

 

 

 

 

 

tDSENSE1L

Delay response time from

0.5 A < IOUT < 10 A;

 

 

5

20

µs

 

rising edge of CS_DIS pin

I

SENSE

= 10% of I

 

 

 

 

 

 

 

SENSE max

 

 

 

 

 

 

 

 

 

(see Figure 4)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VSENSE < 4 V;

 

 

 

 

 

 

tDSENSE2H

Delay response time from

0.5 A < IOUT < 10 A;

 

 

80

300

µs

 

rising edge of INPUT pin

I

SENSE

= 90% of I

 

 

 

 

 

 

 

SENSE max

 

 

 

 

 

 

 

 

 

(see Figure 4)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Doc ID 022463 Rev 3

11/37

Electrical specifications

 

 

 

 

 

VN5E025ASO-E

 

 

 

 

 

 

 

 

 

Table 9.

Current sense (8 V < VCC < 18 V) (continued)

 

 

 

 

 

Symbol

Parameter

 

 

 

Test conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

 

 

Delay response time

VSENSE < 4 V;

 

 

 

 

 

tDSENSE2H

between rising edge of

ISENSE = 90% of ISENSEMAX,

 

 

110

µs

 

output current and rising

I

OUT

=

90% of I

 

 

 

 

edge of current sense

 

 

OUTMAX

 

 

 

 

 

 

IOUTMAX = 3 A (see Figure 7)

 

 

 

 

 

 

 

VSENSE < 4 V;

 

 

 

 

 

tDSENSE2L

Delay response time from

0.5 A < IOUT < 10 A;

 

80

250

µs

 

falling edge of INPUT pin

I

SENSE

= 10% of I

 

 

 

 

 

SENSE max

 

 

 

 

 

 

 

(see Figure 4)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.Parameter guaranteed by design, it is not tested.

2.Fault condition includes: power limitation, overtemperature and open-load off-state detection.

Table 10. Open-load detection (8 V < VCC < 18 V)

Symbol

Parameter

 

Test conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Open-load off-state

 

 

 

 

 

 

 

 

 

 

VOL

voltage detection

VIN = 0 V

 

 

2

4

V

 

 

threshold

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output short circuit to

 

 

 

 

 

 

 

 

 

tDSTKON

VCC detection delay at

See Figure 5

 

180

1200

µs

 

 

turn-off

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IL(off2)r

Off-state output current at

VIN = 0 V; VSENSE = 0 V;

-120

0

µA

VOUT = 4 V

VOUT rising from 0 V to 4 V

 

 

 

 

 

 

 

 

Off-state output current at

VIN = 0 V;

 

 

 

 

 

 

I

L(off2)f

V

SENSE

= V

SENSEH

; V

-50

90

µA

 

VOUT = 2 V

 

 

OUT

 

 

 

 

 

 

falling from VCC to 2 V

 

 

 

 

 

 

 

 

 

 

 

 

 

Delay response from

 

 

 

 

 

 

 

 

 

 

td_vol

output rising edge to

VOUT = 4 V; VIN = 0 V;

 

20

µs

 

VSENSE rising edge in

VSENSE = 90% of VSENSEH

 

 

 

open-load

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 4. Current sense delay characteristics

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

tDSENSE2H tDSENSE1L

t

t

 

DSENSE1H

DSENSE2L

12/37

Doc ID 022463 Rev 3

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