– Proportional load current sense
– Thermal shutdown indication on both the
high and low-side switches
Applications
■ DC motor driving in full or half-bridge
configuration
■ All types of resistive, inductive and capacitive
loads
Table 1.Device summary
Package
V
CC
36 V
SO-28
Description
The VN5772AK-E is a device formed by three
monolithic chips housed in a standard SO-28
package: a double high-side and two low-side
switches. The double high-side is made using
STMicroelectronics
while the low-side switches are fully protected
VIPower M0-5 OMNIFET III. This device is
suitable to drive a DC motor in a bridge
configuration as well as to be used as a quad
switch for any low-voltage application. The dual
high-side switches integrate built-in non latching
thermal shutdown with thermal hysteresis. An
output current limiter protects the device in
overload conditions. In the case of long overload
duration, the device limits the dissipated power to
a safe level-up to thermal shutdown intervention.
An analog current sense pin delivers a current
proportional to the load current (according to a
known ratio) and indicates overtemperature
shutdown of the relevant high-side switch through
a voltage flag.The low-side switches have built-in
non latching thermal shutdown with thermal
hysteresis, linear current limitation and
overvoltage clamping. In case of long overload
duration, the low-side switches limit the dissipated
power to a safe level up to the thermal shutdown
intervention. Fault feedback for overtemperature
shutdown of the low-side switch is indicated by
the relevant status pin.
16, 17SOURCE 4 Source of switch 4 (low-side switches)
22, 23SOURCE 2 Source of switch 2 (high-side switches)
20, 21SOURCE 1 Source of switch 1 (high-side switches)
26, 27SOURCE 3 Source of switch 3 (low-side switches)
Figure 2.Configuration diagram (top view)
DRAIN 3
INPUT 3
DRAIN 3
STATUS 3
STATUS 3
V
CC
GND
INPUT 2
DRAIN 3
SOURCE 3
SOURCE 3
DRAIN 3
V
CC
SOURCE 2
SOURCE 2
INPUT 1
C.SENSE
V
CC
STATUS 4
STATUS 4
DRAIN 4
INPUT 4
DRAIN 4
6/34 Doc ID 16084 Rev 5
SOURCE 1
SOURCE 1
V
CC
DRAIN 4
SOURCE 4
SOURCE 4
DRAIN 4
VN5772AK-EElectrical specification
2 Electrical specification
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in the tables below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE program
and other relevant quality document.
Table 3.Dual high-side switch
SymbolParameterValueUnit
V
-V
- I
GND
I
OUT
- I
OUT
I
-I
CSENSE
V
CSENSE
E
MAX
V
ESD
V
ESD
T
T
DC supply voltage41V
CC
Reverse DC supply voltage0.3V
CC
DC reverse ground pin current200mA
DC output currentInternally limitedA
Reverse DC output current -12A
DC input current -1 to 10mA
IN
DC reverse C.SENSE pin current 200mA
V
Current sense maximum voltage
CC
+V
Maximum switching energy (single pulse)
(L = 3 mH; RL=0Ω; V
= I
(Typ.)
I
OUT
limL
)
=13.5V; T
bat
jstart
= 150 °C;
104mJ
Electrostatic discharge (human body model: R = 1.5 KΩ;
C = 100 pF)
– Input
– Current sense
– SOURCE
–V
CC
/DRAIN
n
n
4000
2000
5000
5000
Charge device model (CDM-AEC-Q100-011)750V
Junction operating temperature-40 to 150°C
j
Storage temperature-55 to 150 °C
stg
- 41
CC
V
V
V
V
V
V
Doc ID 16084 Rev 57/34
Electrical specificationVN5772AK-E
Table 4.Low side switch
SymbolParameterValueUnit
V
I
I
-I
I
STAT
DSn
INn
Drain-source voltage (V
Input current -1 to 10mA
Drain current Internally limitedA
Dn
Reverse DC output current -4A
Dn
DC status current-1 to 10 mA
Electrostatic discharge (R = 1.5 KΩ, C = 100 pF):
V
ESD1
–Drain
– Supply, status, input
V
ESD2
T
Electrostatic discharge on output pins only
(R = 330 Ω, C = 150 pF)
2.3.1 Electrical characteristics for dual high-side switches
Values specified in this section are for 8 V < VCC<36V; -40°C<Tj< 150 °C, unless
otherwise specified (for each channel).
Table 6.Power section
SymbolParameterTest conditionsMin.Typ.Max.Unit
V
V
V
USDhyst
R
V
clamp
I
L(off)
1. PowerMOS leakage included.
2. For each channel.
Operating supply
CC
voltage
Undervoltage
USD
shutdown
Undervoltage
shutdown hysteresis
On-state resistance
ON
Voltage clampIS = 20 mA414652V
I
Supply current
S
Off-state output
(2)
current
Output - VCC diode
V
F
voltage
(2)
4.51336V
3.54.5V
0.5V
= 3 A; Tj = 25 °C50
I
OUT
= 3 A; Tj = 150 °C100
OUT
I
= 3 A; V
OUT
Off-state: V
V
IN=VOUT
On-state: V
=0A
I
OUT
VIN=V
OUT
=25°C
T
j
V
IN=VOUT
T
=125°C
j
I
= 3A, Tj = 150 °C0.7V
OUT
= 5 V; Tj = 25 °C65
CC
= 13 V; Tj = 25 °C,
CC
= V
CC
=0V; VCC=13V,
=0V; VCC=13V,
= 0 V
SENSE
=13V; VIN=5V,
00.01 3
05
(1)
2
36mA
mΩI
(1)
5
µA
µA
Table 7.Switching (VCC = 13 V)
SymbolParameterTest conditionsMin.Typ.Max. Unit
t
d(on)
t
d(off)
(dV
/dt)onTurn-on voltage slopeRL = 6.5 Ω —
OUT
(dV
OUT
/dt)
Turn-on delay time RL = 6.5 Ω (see
Turn-off delay time RL = 6.5 Ω (see
Turn-off voltage slopeRL = 6.5 Ω —
off
Figure 4
Figure 4
)—25— µs
)—20— µs
See
Figure 15
See
Figure 17
—V/µs
—V/µs
Doc ID 16084 Rev 59/34
Electrical specificationVN5772AK-E
Table 7.Switching (VCC = 13 V) (continued)
SymbolParameterTest conditionsMin.Typ.Max. Unit
W
ON
W
OFF
Table 8.Logic inputs
Switching energy
losses during t
won
Switching energy
losses during t
woff
RL = 6.5 Ω (see
RL = 6.5 Ω (see
Figure 4
Figure 4
)—0.24— mJ
)—0.2— mJ
SymbolParameterTest conditionsMin.Typ.Max.Unit
V
V
V
I(hyst)
V
Table 9.Protection and diagnostics
Low-level input voltage0.9V
IL
I
Low-level input currentV
IL
High-level input voltage2.1V
IH
I
High-level input current V
IH
= 0.9 V1µA
IN
= 2.1 V10µA
IN
Input voltage hysteresis0.25V
I
= 1 mA5.57
Input voltage clamp
ICL
IN
= -1 mA-0.7
I
IN
(1)
SymbolParameterTest conditionsMin.Typ.Max.Unit
V
= 13 V121824A
I
limH
DC short-circuit
current
CC
5V<VCC<36V24A
V
I
T
T
T
HYST
V
DEMAG
V
1. To ensure long-term reliability under heavy overload or short-circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Short-circuit current
limL
during thermal cycling
Shutdown
TSD
temperature
Reset temperatureTRS + 1 TRS + 5°C
T
R
Thermal reset of
RS
STATUS
Thermal hysteresis
(T
- TR)
TSD
Turn-off output voltage
clamp
Output voltage drop
ON
limitation
= 13 V; TR < Tj < T
V
CC
= 2 A; V
I
OUT
I
= 0.1 A,
OUT
= -40 °C to 150 °C
T
j
(see
Figure 5
IN
)
TSD
150175200°C
135°C
= 0; L = 6 mH VCC - 41 V
7A
7°C
CC
- 46 V
- 52V
CC
25mV
10/34 Doc ID 16084 Rev 5
VN5772AK-EElectrical specification
Table 10.Current sense (8 V < V
SymbolParameterTest conditionsMin. Typ. Max. Unit
K
K
K
K
I
OUT
I
OUT
I
OUT
I
OUT
/ I
/ I
/ I
/ I
SENSE
SENSE
SENSE
SENSE
0
1
2
3
< 16 V)
CC
I
= 0.35 A; V
OUT
SENSE
Tj = -40 °C to 50 °C
I
= 1 A; V
OUT
SENSE
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
I
= 2 A; V
OUT
SENSE
Tj = -40 °C to 150 °C
T
= 25 °C to 150 °C
j
I
= 6 A; V
OUT
T
= -40 °C to 150 °C
j
SENSE
Tj = 25 °C to 150 °C
= 0.5 V;
= 0.5 V;
= 4 V;
= 4 V;
1430 2140 2890
1470
2020
2610
1570
2020
2470
1740
2020
2320
1790
2020
2250
1890
2010
2140
1890
2010
2140
V
SENSE
I
SENSE0
V
SENSEH
I
SENSEH
t
DSENSE2H
t
DSENSE2L
Max analog sense output
voltage
Analog sense leakage
current
Analog sense output
voltage in overtemperature
condition
Analog sense output
current in overtemperature
condition
Delay response time from
rising edge of INPUT pin
Delay response time from
falling edge of INPUT pin
I
= 4 A; 5V
OUT
= 0 A,
I
OUT
V
V
SENSE
= 0 V,
IN
= 0 V,
01
Tj = -40 °C to 150 °C
= 0 A,
I
OUT
V
V
T
V
V
V
0.5 A < I
I
(see
V
0.5 A < I
I
(see
= 0 V,
SENSE
= 5 V,
IN
= -40 °C to 150 °C
j
= 13 V, R
CC
= 13 V, V
CC
SENSE
SENSE
Figure 3
SENSE
SENSE
Figure 3
SENSE
SENSE
< 4 V,
< 4 A,
OUT
= 90% of I
)
< 4 V,
< 4 A,
OUT
= 10% of I
)
02
= 10 KΩ9V
= 5 V8mA
80250µs
SENSE max
100250µs
SENSE max
µA
Doc ID 16084 Rev 511/34
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