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VN5050AJ-E
User Manual
31 pgs836.14 Kb0
Table of contents
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ST VN5050AJ-E User Manual

Features
Max supply voltage V
Operating voltage range V
Max On-State resistance R
Current limitation (typ) I
Off state supply current I
VN5050AJ-E
Single channel high side driver with analog
current sense for automotive applications
CC
CC
ON
LIMH
S
41 V
4.5 to 36V
50 mΩ
16.5 A
2 µA
PowerSSO-12
– Reverse battery protection ( see
Application schematic )
– Electrostatic discharge protection
■ General features
power limitation – Very low stand-by current – 3.0V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC
European directive
■ Diagnostic functions
– Proportional load current sense – High current sense precision for wide range
currents – Current sense disable – Thermal shutdown indication – Very low current sense leakage
■ Protection
– Undervoltage shut-down – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss
of V
CC
– Thermal shut down

Table 1. Device summary

Package
PowerSSO-12 VN5050AJ-E VN5050AJTR-E
Application
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VN5050AJ-E is a monolithic device made using STMicroelectronics VIPower technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shut-down intervention. Thermal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears.
Order codes
Tube Tape and Reel
CC
pin
February 2008 Rev 6 1/31
www.st.com
31
Contents VN5050AJ-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21
3.1.2 Solution 2: diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
) in the ground line . . . . . . . . . . . . . . . . . . . . . . 22
GND
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31
VN5050AJ-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (V
Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8V<V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 14. PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 15. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
3/31
List of figures VN5050AJ-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. I
Figure 9. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17. On state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. On state resistance vs. VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. ILIMH Vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. Maximum turn Off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 28. PowerSSO-12™ PC Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. PowerSSO-12™ thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 25
Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-12™ . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 33. PowerSSO-12™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 34. PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
OUT/ISENSE
Vs. I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OUT
4/31
VN5050AJ-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V
CC
V
CC
CLAMP
UNDERVOLTAGE
DRIVER
GND
LOGIC
INPUT
CS_DIS

Table 2. Pin function

Name Function
V
CC
Battery connection.
OUTPUT Power output.
GND
INPUT
Ground connection. Must be reverse battery protected by an external diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state.
Pwr
LIM
OVERTEMP.
I
OUT
PwCLAMP
I
LIM
V
DSLIM
K
OUTPUT
CURRENT SENSE
CURRENT SENSE Analog current sense pin, delivers a current proportional to the load current.
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
5/31
Block diagram and pin description VN5050AJ-E

Figure 2. Configuration diagram (top view)

TA B = V
N.C.
GND
INPUT
CURRENT SENSE
CS_DIS
N.C.
Note: The above pin configuration reflects the changes notified with PCN-APG-BOD/07/2886. The
new pinout is backaward compatible with existing PCB layouts where pins #1 and #6 are connected to Vcc and/or pins #7 and 12 are connected to OUTPUT. For new PCB designs, these pins should be left unconnected.

Table 3. Suggested connections for unused and N.C. pins

Connection / Pin Current Sense N.C. Output Input CS_DIS
1 2 3 4 5
6
12 11 10
9 8 7
cc
N.C. OUTPUT
OUTPUT OUTPUT OUTPUT
N.C.
Floating N.R. X X X X
Through 10kΩ
To ground Through 1kΩ resistor X N.R.
1. Not recommended.
(1)
resistor
Through
10kΩ resistor
6/31
VN5050AJ-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
CC
V
F
I
I
CSD
I
IN
V
CSD
V
IN
CS_DIS
INPUT
CURRENT SENSE
GND
OUTPUT
I
GND
OUT
I
SENSE
V
SENSE
V
CC
V
OUT
Note: V
= V
F
- VCC during reverse battery condition.
OUT

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit
V
-V
- I
I
OUT
- I
I
CSD
-I
CSENSE
V
CSENSE
E
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current
Reverse DC output current 30 A
OUT
DC input current -1 to 10 mA
I
IN
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
Current sense maximum voltage
Maximum switching energy (single pulse)
MAX
(L= 3mH; R
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(Typ.) )
Internally
limited
V
-41
CC
+V
CC
104 mJ
A
V V
7/31
Electrical specifications VN5050AJ-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (Human Body Model: R=1.5kΩ; C=100pF)
- INPUT
V
- CURRENT SENSE
ESD
- CS_DIS
- OUTPUT
- V
CC
V
T
Charge device model (CDM-AEC-Q100-011) 750 V
ESD
Junction operating temperature -40 to 150 °C
T
j
Storage temperature -55 to 150 °C
stg
4000 2000 4000 5000 5000
V V V V V

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Max value Unit
R
R
thj-case
thj-amb
Thermal resistance junction-case (MAX) 2.7 °C/W
Thermal resistance junction-ambient (MAX) See Figure 29. °C/W
8/31
VN5050AJ-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8V < VCC < 36V; -40°C < Tj < 150°C, unless otherwise specified.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
Operating supply
CC
voltage
Undervoltage
USD
shutdown
Undervoltage shutdown hysteresis
I
= 2A; Tj=25°C
OUT
On state resistance
ON
I
= 2A; Tj=150°C
OUT
= 2A; VCC=5V; Tj=25°C
I
OUT
Clamp voltage IS= 20mA 41 46 52 V
Off State; V
I
S
Supply current
VIN=V
OUT=VSENSE=VCSD
On State; V
I
L(off)
1. PowerMOS leakage included.
Table 7. Switching (VCC=13V, Tj=25°C)
Off state output current
Output - VCC diode
V
F
voltage
VIN=V VIN=V
-I
OUT
=0V; VCC=13V; Tj=25°C
OUT
=0V; VCC=13V; Tj=125°C
OUT
= 2A; Tj= 150°C 0.7 V
=13V; Tj=25°C;
CC
=13V; VIN=5V; I
CC
=0V
OUT
4.5 13 36 V
3.5 4.5 V
0.5 V
(1)
2
=0A
1.5
000.01 3
50
100
65
(1)
5
3µAmA
5
mΩ mΩ mΩ
µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
(dV
(dV
t
d(on)
t
d(off)
OUT
OUT
W
W
ON
OFF
Turn-on delay time RL= 6.5Ω (see Figure 7.)20µs
Turn-off delay time RL= 6.5Ω (see Figure 7.)40µs
/dt)onTurn-on voltage slope RL= 6.5Ω
/dt)
Turn-off voltage slope RL= 6.5Ω
off
Switching energy losses during
tw
on
Switching energy losses during tw
off
RL= 6.5Ω (see Figure 7.)0.20mJ
RL= 6.5Ω (see Figure 7.)0.3mJ
See
Figure 20
See
Figure 22
9/31
V/ µs
V/ µs
Electrical specifications VN5050AJ-E

Table 8. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
V
I(hyst)
V
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL

Table 9. Protection and diagnostics

Input low level voltage 0.9 V
IL
Low level input current VIN= 0.9V 1 µA
IL
Input high level voltage 2.1 V
IH
High level input current VIN= 2.1V 10 µA
IH
Input hysteresis voltage 0.25 V
Input clamp voltage
ICL
I
= 1mA
IN
= -1mA
I
IN
5.5
-0.7
CS_DIS low level voltage 0.9 V
Low level CS_DIS current V
= 0.9V 1 µA
CSD
CS_DIS high level voltage 2.1 V
High level CS_DIS current V
= 2.1V 10 µA
CSD
CS_DIS hysteresis voltage 0.25 V
CS_DIS clamp voltage
I
CSD
I
CSD
= 1mA = -1mA
(1)
5.5
-0.7
7V
7V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
I
limL
DC Short circuit current
Short circuit current during thermal cycling
= 13V
V
CC
5V<V
CC
V
=13V TR<Tj<T
CC
<36V
TSD
12 16.5 23
23
7A
V
V
A A
T
T
T
HYST
V
DEMAG
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles.
Shutdown
TSD
temperature
Reset temperature TRS + 1 TRS + 5 °C
T
R
Thermal reset of
RS
STATUS
Thermal hysteresis
TSD-TR
)
I
= 2A; VIN= 0; L= 6mH VCC-41 VCC-46 VCC-52 V
OUT
I
= 0.1A;
OUT
Tj= -40°C...+150°C (see Figure 5.)
(T
Turn-off output voltage clamp
Output voltage drop
ON
limitation
10/31
150 175 200 °C
135 °C
7°C
25 mV
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