ST VN5025AJ-E User Manual

Features

VN5025AJ-E

Single channel high side driver with analog sense

for automotive applications

Max supply voltage V

Operating voltage range V

Max on-state resistance R

Current limitation (typ) I

Off state supply current I

■ General features

CC

CC

ON

LIMH

S

4.5 to 36V

25 mΩ

– Inrush current active management by

power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

european directive

■ Diagnostic functions

– proportional load current sense
– high current sense precision for wide range

currents
– current sense disable
– thermal shutdown indication
– very low current sense leakage

■ Protection

– Undervoltage shut-down
– Overvoltage clamp
– package
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

cc

– Thermal shut down

Table 1. Device summary

Package

41 V

40 A

2 µA

PowerSSO-12

– Reverse battery protection (see Application

schematic )

– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VN5025AJ-E is a monolithic device made
using STMicroelectronics VIPower technology. It
is intended for driving resistive or inductive loads
with one side connected to ground. Active V
voltage clamp protects the device against low
energy spikes (see ISO7637 transient
compatibility table). This device integrates an
analog current sense which delivers a current
proportional to the load current (according to a
known ratio) when CS_DIS is driven low or left
open. When CS_DIS is driven high, the
CURRENT SENSE pin is in a high impedance
condition. Output current limitation protects the
device in overload condition. In case of long
overload duration, the device limits the dissipated
power to safe level up to thermal shut-down
intervention. Thermal shut-down with automatic
restart allows the device to recover normal
operation as soon as fault condition disappears.

Order codes

Tube Tape and Reel

CC

pin

PowerSSO-12 VN5025AJ-E VN5025AJTR-E

February 2008 Rev 5 1/31

www.st.com

31

Contents VN5025AJ-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolue maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21

3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 22

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23

4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1 PowerSSO-12TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.2 PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

2/31

VN5025AJ-E List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Switching (VCC=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 10. Current sense (8V<V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 13. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 14. PowerSSO-12

Table 15. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

TM

<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

3/31

List of figures VN5025AJ-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5. Delay response time between rising edge of ouput current and rising edge of current sense

(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. I

OUT/ISENSE

Figure 7. Maximum current sense ratio drift vs load current- to update . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 11. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 14. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 17. On state resistance vs. T
Figure 18. On state resistance vs. V

Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 20. Turn- On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 21. I

LIMH

vs. T

Figure 22. Turn- Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 24. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 25. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 27. Maximum turn Off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 28. PowerSSO-12

Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 24

Figure 30. PowerSSO-12
Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-12

Figure 32. PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 33. PowerSSO-12
Figure 34. PowerSSO-12

Vs. I

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

OUT

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

TM

PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

TM

thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 25

TM

tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

TM

tape and reel shipment (suffix “TR” . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

TM

. . . . . . . . . . . . . . . . . . 25

4/31

VN5025AJ-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

V

CC

CLAMP

UNDERVOLTAGE

GND

INPUT

CS_DIS

Table 2. Pin function

Name Function

V

CC

Battery connection.

OUTPUT Power output.

GND

INPUT

Ground connection. Must be reverse battery protected by an external
diode/resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.

LOGIC

DRIVER

Pwr

LIM

PwCLAMP

OVERTE MP.

I

OUT

I

V

DSLIM

LIM

OUTPUT

K

CURRENT
SENSE

CURRENT SENSE Analog current sense pin, delivers a current proportional to the load current.

CS_DIS Active high CMOS compatible pin, to disable the current sense pin.

5/31

Block diagram and pin description VN5025AJ-E

Figure 2. Configuration diagram (top view)

TA B = V

V

cc

GND

INPUT

CURRENT_SENSE

CS_DIS

V

cc

Table 3. Suggested connections for unused and N.C. pins

Connection / Pin Current Sense N.C. Output Input CS_DIS

Floating N.R.

To ground Through 1kΩ resistor X N.R.

(1)

1
2
3
4
5

6

XX X X

12
11
10

9
8
7

Through 10kΩ

cc

OUTPUT
OUTPUT
OUTPUT
OUTPUT

OUTPUT
OUTPUT

resistor

Through 10kΩ

resistor

1. Not recommended.

6/31

VN5025AJ-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

CC

V

I

I

CSD

I

IN

V

CSD

V

IN

CS_DIS

INPUT

CURRENT SENSE

GND

OUTPUT

I

GND

OUT

I

SENSE

V

SENSE

F

V

CC

V

OUT

Note: V

= V

F

- VCC during reverse battery condition.

OUT

2.1 Absolue maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

- I

I

OUT

- I

I

CSD

-I

CSENSE

V

CSENSE

E

DC supply voltage 41 V

CC

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

GND

DC output current Internally limited A

Reverse DC output current 24 A

OUT

I

DC input current -1 to 10 mA

IN

DC current sense disable input current -1 to 10 mA

DC reverse CS pin current 200 mA

Current Sense maximum voltage

Maximum switching energy (single pulse)

MAX

(L=0.8mH; R

=0Ω; V

L

=13.5V; T

bat

jstart

=150ºC; I

OUT

= I

limL

(Typ.) )

VCC-41

+V

CC

140 mJ

V
V

7/31

Electrical specifications VN5025AJ-E

Table 4. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge
(Human Body Model: R=1.5KΩ; C=100pF)

V

V

ESD

ESD

T

- INPUT

- CURRENT SENSE

- CS_DIS

- OUTPUT

- V

CC

4000
2000
4000
5000
5000

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature -40 to 150 °C

T

j

Storage temperature -55 to 150 °C

stg

V
V
V
V
V

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Max Value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case (MAX) 1.4 °C/W

Thermal resistance junction-ambient (MAX) See Figure 29 °C/W

8/31

VN5025AJ-E Electrical specifications

2.3 Electrical characteristics

The values specified in this section are for 8V<VCC<36V; -40°C<Tj<150°C, unless otherwise
stated.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

I

L(off)

1. PowerMOS leakage included.

Operating supply

CC

voltage

Undervoltage

USD

shutdown

Undervoltage
shutdown hysteresis

On State resistance

ON

Clamp voltage IS= 20 mA 41 46 52 V

clamp

I

Supply current

S

Off State output
current

Output - VCC diode

V

F

voltage

4.5 13 36 V

3.5 4.5 V

0.5 V

I

= 3A; Tj= 25°C

OUT

I

= 3A; Tj= 150°C

OUT

= 3A; VCC= 5V; Tj=25°C

I

OUT

Off State; V
VIN=V

OUT=VSENSE=VCSD

On State; V
I

=0A

OUT

V

IN=VOUT

VIN=V

OUT

=4A; Tj=150°C 0.7 V

-I

OUT

=13V; Tj=25°C;

CC

=0V

=13V; VIN=5V;

CC

=0V; VCC=13V; Tj=25°C
=0V; VCC=13V; Tj=125°C00

(1)

2

1.5

0.01 3

5

25
50
35

mΩ
mΩ
mΩ

(1)

µA

3

mA

µA

5

9/31

Electrical specifications VN5025AJ-E

Table 7. Switching (VCC=13V, Tj=25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

Turn-On delay time RL= 4.3Ω (see Figure 8.)30 µs

Turn-Off delay time RL= 4.3Ω (see Figure 8.)50 µs

/dt)onTurn-On voltage slope RL= 4.3Ω

/dt)

Turn-Off voltage slope RL= 4.3Ω

off

Switching energy losses
during twon

Switching energy losses
during t

woff

RL= 4.3Ω (see Figure 8)0.47 mJ

RL= 4.3Ω (see Figure 8)0.45 mJ

See

Figure 20

See

Figure 22

Table 8. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

I

V

I

I(hyst)

Input low level voltage 0.9 V

IL

Low level input current VIN= 0.9V 1 µA

IL

Input high level voltage 2.1 V

IH

High level input current VIN= 2.1V 10 µA

IH

Input hysteresis
voltage

0.25 V

V/ µs

V/ µs

V

ICL

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Input clamp voltage

CS_DIS low level
voltage

Low level CS_DIS
current

CS_DIS high level
voltage

High level CS_DIS
current

CS_DIS hysteresis
voltage

CS_DIS clamp voltage

IIN= 1mA

IIN= -1mA

= 0.9V 1 µA

V

CSD

5.5

-0.7

2.1 V

= 2.1V 10 µA

V

CSD

0.25 V

I

I

CSD

CSD

=1mA

= -1mA

5.5

-0.7

7V

V

0.9 V

7V

V

10/31