ST VN5016AJ-E User Manual
Features
VN5016AJ-E
Single channel high side driver with analog
current sense for automotive applications
Max supply voltage V
Operating voltage range V
Max On-State resistance (per ch.)
Current limitation (typ) I
Off state supply current I
■ Main features
CC
CC
R
ON
LIMH
S
4.5 to 36V
16 mΩ
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
■ Diagnostic functions
– Proportional load current sense
– High current sense precision for wide range
currents
– Current sense disable
– Thermal shutdown indication
– Very low current sense leakage
■ Protection
– Undervoltage shut-down
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Thermal shut down
– Reverse battery protection
– Electrostatic discharge protection
Table 1. Device summary
41V
65A
2 µA
PowerSSO-12
Application
■ All types of resistive, inductive and capacitive
loads
Description
The VN5016AJ-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground. Active V
device against low energy spikes (see ISO7637
transient compatibility table). This device
integrates an analog current sense which delivers
a current proportional to the load current
(according to a known ratio) when CS_DIS is
driven low or left open.
When CS_DIS is driven high, the CURRENT
SENSE pin is in a high impedance condition.
Output current limitation protects the device in
overload condition. In case of long overload
duration, the device limits the dissipated power to
safe level up to thermal shut-down intervention.
Thermal shut-down with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears.
pin voltage clamp protects the
CC
Package
Tube Tape & Reel
PowerSSO-12 VN5016AJ-E VN5016AJTR-E
February 2008 Rev 7 1/32
Order codes
www.st.com
32
Contents VN5016AJ-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
3.1.1 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 22
3.1.2 Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 23
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4 Maximum demagnetization energy (V
= 13.5V) . . . . . . . . . . . . . . . . . . 24
CC
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1 PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.2 PowerSSO-12™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3 PowerSSO-12™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2/32
VN5016AJ-E List of tables
List of tables
Table 2. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (V
Table 9. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8V<V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 14. PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 15. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
3/32
List of figures VN5016AJ-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Figure 6. IOUT/ISENSE Vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 11. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. On state resistance vs. T
Figure 18. On state resistance vs. V
Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 20. Turn - On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. I
LIMH
vs. T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Turn - Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 24. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 25. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. Maximum turn Off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 28. PowerSSO-12™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 29. Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 25
Figure 30. PowerSSO-12™ thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 26
Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-12™ . . . . . . . . . . . . . . . . . 26
Figure 32. PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 33. PowerSSO-12™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 34. PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4/32
VN5016AJ-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
CC
V
CC
CLAMP
UNDERVOLTAGE
LIM
PwCLAMP
I
OUT
I
V
DSLIM
LIM
K
GND
INPUT
CS_DIS
DRIVER
LOGIC
Pwr
OVERTEMP.
Table 2. Pin function
Name Function
V
CC
OUTPUT Power output.
GND
INPUT
CURRENT
SENSE
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
Battery connection.
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
Analog current sense pin, delivers a current proportional to the load current.
OUTPUT
CURRENT
SENSE
5/32
Block diagram and pin description VN5016AJ-E
Figure 2. Configuration diagram (top view)
TAB = V
V
CC
GND
INPUT
CURRENT SENSE
CS_DIS
V
CC
Table 3. Suggested connections for unused and N.C. pins
Connection / Pin Current Sense N.C. Output Input CS_DIS
Floating N.R.
To ground
(1) Not recommended.
Through 1KΩ
(1)
resistor
1
2
3
4
5
6
XX X X
XN.R.
(1)
12
11
10
9
8
7
Through 10KΩ
cc
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
resistor
Through 10KΩ
resistor
6/32
VN5016AJ-E Electrical specifications
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
CC
V
F
V
CC
I
Note: V
Fn
V
= V
CSD
CSD
- VCC during reverse battery condition.
OUTn
I
IN
V
IN
CS_DIS
INPUT
CURRENT SENSE
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.
Table 4. Absolute maximum ratings
Symbol Parameter Value Unit
GND
OUTPUT
I
GND
I
OUT
I
SENSE
V
SENSE
V
OUT
V
CC
-V
-I
GND
I
OUT
-I
OUT
I
IN
I
CSD
-I
CSENSE
V
CSENSE
E
MAX
DC supply voltage 41 V
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
DC output current Internally limited A
Reverse DC output current 30 A
DC input current -1 to 10 mA
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
Current sense maximum voltage
VCC-41
+V
CC
Maximum switching energy
(L=0.75mH; R
= I
I
OUT
limL
(Typ.) )
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC;
304 mJ
7/32
V
V
Electrical specifications VN5016AJ-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (Human Body Model: R=1.5KΩ;
V
V
ESD
ESD
T
C=100pF)
- INPUT
- CURRENT SENSE
- CS_DIS
- OUTPUT
- V
CC
4000
2000
4000
5000
5000
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
T
j
Storage temperature -55 to 150 °C
stg
V
V
V
V
V
2.2 Thermal data
Table 5. Thermal data
Symbol Parameter Max value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case 0.5 °C/W
Thermal resistance junction-ambient See Figure 29 °C/W
8/32
VN5016AJ-E Electrical specifications
2.3 Electrical characteristics
8V<VCC<36V; -40°C<Tj<150°C, unless otherwise specified.
.
Table 6. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC
V
USD
V
USDhyst
R
ON
V
clamp
I
I
L(off)
V
(1) PowerMOS leakage included.
Operating supply voltage 4.5 13 36 V
Undervoltage shutdown 3.5 4.5 V
Undervoltage Shut-down
hysteresis
On state resistance
Clamp voltage IS= 20mA 41 46 52 V
Supply current
S
Off state output current
Output - VCC diode
voltage
F
I
OUT
I
OUT
I
OUT
Off State; V
VIN=V
On State; V
I
OUT
VIN=V
=25°C
T
j
VIN=V
=125°C
T
j
I
OUT
0.5 V
16
32
20
(1)
5
3µAmA
mΩ
mΩ
mΩ
= 5A; Tj= 25°C
= 5A; Tj= 150°C
= 5A; VCC= 5V; Tj= 25°C
=13V; Tj=25°C;
CC
OUT=VSENSE=VCSD
=13V; VIN=5V;
CC
=0V
2
1.5
(1)
=0A
=0V; VCC=13V;
OUT
=0V; VCC=13V;
OUT
000.01 3
µA
5
= 6A; Tj= 150°C 0.7 V
Table 7. Switching (VCC=13V, Tj=25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
(dV
(dV
t
d(on)
t
d(off)
OUT
OUT
W
W
OFF
Turn-On delay time RL= 2.6Ω (see Figure 8)35µs
Turn-Off delay time RL= 2.6Ω (see Figure 8)50µs
/dt)onTurn-On voltage slope RL= 2.6Ω (see Figure 8)See Figure 20 V/ µs
/dt)
Turn-Off voltage slope RL= 2.6Ω (see Figure 8)See Figure 22 V/ µs
off
Switching energy losses
ON
during t
won
Switching energy losses
during t
woff
RL= 2.6Ω (see Figure 8)1.1mJ
RL= 2.6Ω (see Figure 8)0.8mJ
9/32
Electrical specifications VN5016AJ-E
Table 8. Logic input
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
IL
V
I
IH
V
I(hyst)
V
ICL
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL
Table 9. Protections and diagnostics
Input low level voltage 0.9 V
IL
Low level input current VIN=0.9V 1 µA
Input high level voltage 2.1 V
IH
High level input current VIN=2.1V 10 µA
Input hysteresis voltage 0.25 V
Input clamp voltage
CS_DIS low level voltage 0.9 V
Low level CS_DIS
current
CS_DIS high level
voltage
High level CS_DIS
current
CS_DIS hysteresis
voltage
CS_DIS clamp voltage
(1)
IIN=1mA
=-1mA
I
IN
=0.9V 1 µA
V
CSD
5.5
-0.7
2.1 V
V
=2.1V 10 µA
CSD
0.25 V
I
CSD
I
CSD
=1mA
=-1mA
5.5
-0.7
7V
V
7V
V
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
=13V
I
limH
I
limL
T
TSD
T
T
RS
T
HYST
V
DEMAG
V
ON
(1) To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
DC short circuit current
Short circuit current
during thermal cycling
Shutdown temperature 150 175 200 °C
Reset temperature
R
Thermal reset of
STATUS
Thermal hysteresis
TSD -TR
)
(T
Turn-Off output voltage
clamp
Output voltage drop
limitation
CC
5V<V
V
I
OUT
I
OUT
T
<36V
CC
=13V TR<Tj<T
CC
=2A; VIN=0; L=6mH
=0.3A;
= -40°C...+150°C
j
(see Figure 9)
TSD
46 65 91
91
24 A
T
+1 TRS +5 °C
R
S
135 °C
7°C
VCC-41
VCC-46
VCC-52
25 mV
A
A
V
10/32
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