ST VN5010AK-E User Manual
Features
Max supply voltage V
Operating voltage range V
Max on-state resistance R
Current limitation (typ) I
Off-state supply current (typ) I
CC
CC
ON
LIMH
S
VN5010AK-E
High side driver with analog current sense
for automotive applications
41 V
4.5 to 36 V
10 mΩ
65 A
2µA
PowerSSO-24
– Reverse battery protection (see Figure 26)
– Electrostatic discharge protection
TM
■ Main features
– Inrush current active management by
power limitation
– Very low standby current
– 3.0v CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
■ Diagnostic functions
– Proportional load current sense
– High current sense precision for wide range
currents
– Current sense disable
– Thermal shutdown indication
– Very low current sense leakage
■ Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Thermal shutdown
Table 1. Device summary
Package
PowerSSO-24
TM
Application
■ All types of resistive, inductive and capacitive
loads
Description
The VN5010AK-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground. Active V
device against low energy spikes (see ISO7637
transient compatibility table). This device
integrates an analog current sense which delivers
a current proportional to the load current
(according to a known ratio) when CS_DIS is
driven low or left open. When CS_DIS is driven
high, the CURRENT SENSE pin is in a high
impedance condition. Output current limitation
protects the device in overload condition. In case
of long overload duration, the device limits the
dissipated power to safe level up to thermal
shutdown intervention. Thermal shutdown with
automatic restart allows the device to recover
normal operation as soon as fault condition
disappears.
Order codes
Tub e Tap e a n d r eel
VN5010AK-E VN5010AKTR-E
pin voltage clamp protects the
CC
July 2009 Doc ID 13218 Rev 6 1/31
www.st.com
1
Contents VN5010AK-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 22
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4 Maximum demagnetization energy (V
=13.5V) . . . . . . . . . . . . . . . . . . . 23
CC
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 PowerSSO-24TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31 Doc ID 13218 Rev 6
VN5010AK-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Switching (VCC=13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Doc ID 13218 Rev 6 3/31
List of figures VN5010AK-E
List of figures
Figure 1. Connection diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 4. Delay response time between rising edge of output current and rising edge of Current Sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. IOUT/ISENSE vs IOUT (see Table 10 for details) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 10. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 11. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 16. On-state resistance vs T
Figure 17. On-state resistance vs V
Figure 18. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. I
LIMH
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
case
Figure 21. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 26. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 27. PowerSSO-24
Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. PowerSSO-24
TM
PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
TM
thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 25
Figure 30. Thermal fitting model of a double channel HSD in PowerSSO-24
Figure 31. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 32. PowerSSO-24
Figure 33. PowerSSO-24
TM
tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
TM
tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CC
TM
. . . . . . . . . . . . . . . . . 25
4/31 Doc ID 13218 Rev 6
VN5010AK-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
CC
V
CC
CLAMP
UNDERVOLTAGE
DRIVER
GND
LOGIC
INPUT
CS_DIS
Table 2. Pin function
Name Function
V
CC
Battery connection.
OUTPUT Power output.
GND
INPUT
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
Pwr
LIM
OVERTEMP.
I
OUT
PwCLAMP
I
LIM
V
DSLIM
K
OUTPUT
CURRENT
SENSE
CURRENT
SENSE
Analog current sense pin, delivers a current proportional to the load current.
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
Doc ID 13218 Rev 6 5/31
Block diagram and pin description VN5010AK-E
Figure 2. Connection diagram (top view)
V
CC
GND
NC
NC
INPUT
NC
CURRENT SENSE
NC
CS_DIS
NC
NC
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
NC
NC
NC
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
NC
NC
NC
TAB = Vc c
Table 3. Suggested connections for unused and not connected pins
Connection/pin Current sense N.C. Output Input CS_DIS
Floating N.R.
To ground
1. Not recommended.
(1)
Through 1 kΩ
resistor
XX X X
XN.R.
Through 10 kΩ
resistor
Through 10 kΩ
resistor
6/31 Doc ID 13218 Rev 6
VN5010AK-E Electrical specifications
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
CC
V
CC
I
V
CSD
CSD
I
IN
CS_DIS
INPUT
CURRENT SENSE
V
IN
Note: V
Fn
= V
- VCC during reverse battery condition.
OUT
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.
Table 4. Absolute maximum ratings
GND
OUTPUT
I
GND
I
OUT
I
SENSE
V
SENSE
V
OUT
Symbol Parameter Value Unit
V
-V
- I
I
OUT
- I
I
CSD
-I
CSENSE
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current
Reverse DC output current 30 A
OUT
DC input current -1 to 10 mA
I
IN
Internally
limited
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
A
Doc ID 13218 Rev 6 7/31
Electrical specifications VN5010AK-E
Table 4. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
V
V
CSENSE
E
MAX
V
ESD
V
ESD
T
Current sense maximum voltage
Maximum switching energy (single pulse)
(L=1.25mH; R
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(typ.))
Electrostatic discharge (Human Body Model: R=1.5KΩ; C=100pF)
– Input
– Current Sense
–CS_DIS
– Output
–V
CC
CC
+V
609 mJ
4000
2000
4000
5000
5000
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
j
-41
CC
V
V
V
T
Storage temperature -55 to 150 °C
stg
Table 5. Thermal data
Symbol Parameter Max value Unit
R
thj-case
R
thj-amb
Thermal resistance junction case (max) 0.3 °C/W
Thermal resistance junction ambient (max) See Figure 29 °C/W
2.2 Electrical characteristics
Values specified in this section are for 8 V< VCC< 36 V; -40 °C< Tj< 150 °C, unless
otherwise stated (for each channel).
Table 6. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
Operating supply
CC
voltage
Undervoltage
USD
shutdown
Undervoltage
shutdown hysteresis
On-state resistance
ON
Clamp voltage ICC= 20 mA 41 46 52 V
Supply current
I
S
I
= 6A; Tj= 25°C
OUT
= 6A; Tj= 150°C
I
OUT
=6A; VCC=5V;Tj=25°C
I
OUT
Off-state; V
V
IN=VOUT=VSENSE=VCSD
On-state; V
= 13V; Tj= 25°C;
CC
=13V; VIN=5V; I
CC
=0V
OUT
=0A
4.5 13 36 V
3.5 4.5 V
0.5 V
10
mΩ
20
mΩ
13
mΩ
(1)
(1)
5
3µAmA
2
1.5
8/31 Doc ID 13218 Rev 6
VN5010AK-E Electrical specifications
Table 6. Power section (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
L(off)
V
1. PowerMOS leakage included.
Table 7. Switching (VCC=13V)
Off-state output
current
Output - VCC diode
F
voltage
V
IN=VOUT
V
IN=VOUT
-I
OUT
=0V; VCC= 13V; Tj= 25°C
=0V; VCC= 13V; Tj= 125°C
= 10A; Tj= 150°C 0.7 V
000.01 3
5
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
(dV
OUT
(dV
OUT
W
ON
W
OFF
Table 8. Logic input
Turn-on delay time RL= 2.6Ω (see Figure 8)- 35 -µs
Turn-off delay time RL= 2.6Ω (see Figure 8)- 65 -µs
Turn-on voltage
/dt)
on
slope
Turn-off voltage
/dt)
off
slope
Switching energy
losses during t
Switching energy
losses during t
won
woff
= 2.6Ω -
R
L
R
= 2.6Ω -
L
RL= 2.6Ω (see Figure 8)- 1.5 -mJ
RL= 2.6Ω (see Figure 8)- 0.8 -mJ
See
Figure 20
See
Figure 22
-V/µs
-V/µs
µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
I
V
I(hyst)
V
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL
I
Input low level voltage 0.9 V
IL
Low level input current VIN= 0.9V 1 µA
IL
Input high level voltage 2.1 V
IH
High level input current VIN= 2.1V 10 µA
IH
Input hysteresis voltage 0.25 V
Input clamp voltage
ICL
= 1mA
IN
IIN= -1mA
5.5
-0.7
I
CS_DIS low level voltage 0.9 V
Low level CS_DIS current V
= 0.9V 1 µA
CSD
CS_DIS high level voltage 2.1 V
High level CS_DIS current V
= 2.1V 10 µA
CSD
CS_DIS hysteresis voltage 0.25 V
CS_DIS clamp voltage
I
CSD
I
CSD
= 1mA
= -1mA
5.5
-0.7
7V
V
7V
V
Doc ID 13218 Rev 6 9/31
Electrical specifications VN5010AK-E
Table 9. Protections and diagnostics
(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
T
T
T
HYST
V
DEMAG
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
Table 10. Current sense (8V<VCC<16V)
Short circuit current
limH
Short circuit current during
limL
thermal cycling
Shutdown temperature 150 175 200 °C
TSD
Reset temperature TRS+1 TRS+5 °C
T
R
Thermal reset of STATUS 135 °C
RS
Thermal hysteresis (T
TSD-TR
Turn-off output voltage clamp I
Output voltage drop
ON
limitation
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
VCC= 13V
5V<VCC<36V
= 13V;
V
CC
TR<Tj<T
TSD
)7°C
=2A; VIN=0; L=6mH
OUT
I
=0.5A (see Figure 9);
OUT
Tj= -40°C...+150°C
46 65 91
24 A
CC
V
-46
CC
V
-41
25 mV
V
-52
91
CC
A
A
V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 0.25A;
OUT
K
I
0
OUT/ISENSE
V
T
I
K
I
1
OUT/ISENSE
T
I
Tj= 25°C...150°C
I
V
T
dK
1/K1
Current sense ratio
(1)
drift
I
K
I
2
OUT/ISENSE
T
I
T
I
V
TJ= -40 °C to 150 °C
dK
2/K2
Current sense ratio
(1)
drift
I
K
I
3
OUT/ISENSE
Tj= -40°C...150°C
I
T
=0.5V;V
SENSE
= -40°C...150°C
j
= 6A; V
OUT
= -40°C...150°C
j
OUT
OUT
CSD
= -40 °C to 150 °C
J
OUT
=-40°C...150°C
j
OUT
=25°C...150°C
j
OUT
CSD
OUT
OUT
= 25°C...150°C
j
= 6A; V
= 6A; V
= 0V;
= 10A; V
= 10A; V
= 10A; V
=0V;
= 25A; V
= 25A; V
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
=0V;
CSD
=0.5V; V
=0.5V; V
= 0.5V;
=4V; V
=4V; V
= 4V;
=4V; V
=4V; V
CSD
CSD
CSD
CSD
CSD
CSD
=0V;
=0V;
=0V;
=0V;
=0V;
=0V;
2770 5490 8220
3610
4580
5630
3930
4580
5230
-8 +8 %
4000
4570
5220
4180
4570
4960
-5 +5 %
4480
4660
4980
4500
4660
4820
10/31 Doc ID 13218 Rev 6
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