The VL5510 is a 0.13 µm CMOS digital camera featuring a high dynamic range (1024 x 512
resolution) for automotive applications. This complete camera module is ready to connect to
the camera enabled baseband processor.
Video data is output from the VL5510 over a 12-bit parallel interface and a high speed serial
link (8/10/12 bits raw data output format supported on the compact camera port (CCP)
interface compatible with anSMIA (standard mobile imaging architecture)normative.
Control interface is an SPI (serial peripheral interface) or UART (universal asynchronous
receiver transmitter) interface or I
2
C (Inter Integrated Circuit) interface.
Power supplies delivered to the sensor are:
●3.3 V for the analog blocks,
●3.3 V for the digital interface,
●2.5 V for the high speed serial link interface,
●1.2 V for the internal digital core (generated internally using a low drop output
regulator).
The VL5510 is designed to operate in conjunction with an electronic central unit (ECU) that
manages the device in the car.
An input clock is required in the range 6 MHz to 27.77 MHz.
The device contains an embedded video processor and delivers monochrome processed
images at up to 34 frames per second. The video processor integrates a wide range of
image enhancement functions, designed to ensure high image quality. These include:
●Antidark sun correction
●Dark calibration
●Vertical fix pattern correction
●Frame crop
●Defect pixel correction
●Test patterns generation
●Statistics generation (histogram)
●Sensor status data embedding (SCL, trailer)
S
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VL5510Functional description
2 Functional description
The block diagram of the VL5510 is shown in Figure 1. VL5510 includes the following main
blocks:
●Internal host (eWARP microcontroller): This is the internal host which is responsible for
system operation sequencing and image data processing. It has the following features:
–Safe system startup from hardware standby to software standby
–System boot to drive it from software standby to streaming mode
–System streaming soft stop
–Device reinitialization to default mode (software reset)
–High Dynamic mode setting (take in charge the management of the hardware
knee point setting).
●ICB: Imager control block which contains all communication interfaces, transaction
routings and resets and clock management
●IDP: Imager data pipeline which is responsible for real-time data processing at pixel
clock rate. It implements a set of correction algorithms and dedicated block-IPs for data
coding.
●CAB: Custom analog macro which contains the pixel array and all analog components
that allow it to be driven.
●Data transmitters: Video data coders and transmitters, including serial and parallel
interface.
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Functional descriptionVL5510
Figure 1.VL5510 block diagram
27 MHz crystal
CAB
Pixel array
1024 x 512
On chip
regulator
On chip osc
PLL
IDP
Video Timing
ROM
RAM
System
Clock
Gen
clocks
Video processing pipe
ICB_bank
IDP_bank
eWARP
(m8051)
arbitrer
decoder
SLC +Trailer
I2C slave IF
SPI/UART
slave IF
SPI master IF
CCP Tx
Parallel Tx
ICB
I2C
SPI/UART
slave
SPI
LV DS
OUT
DOUT
On chip
POR
UIA interface
RAM
LUT
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VL5510Revision history
3 Revision history
Table 3.Document revision history
DateRevisionChanges
19-Jun-20071Initial release.
Changed data in Table 2: Technical specifications
13-Oct-20082
Updated information in Section 1.2: Description
Updated information inSection 2: Functional description
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VL5510
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